JP2825850B2 - Automatic load distribution between processors - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to an automatic load distribution method among processors in a multiprocessor system in which a plurality of processors cooperate to perform processing. The object of the present invention is to provide an optimum load distribution means for improving response time. A short-time processor selection table and a long-time processor selection table, and a predetermined short time interval and a long time are used to determine the load size of each processor. Means for periodically measuring each time interval and updating the processor arrangement of the short-time processor selection table and the long-time processor selection table according to the measurement results at each interval; Depending on whether the processor is short-term or long-term, select the corresponding short-time processor. Means for selecting a processor selection table or a processor selection table for a long time, further selecting one processor based on the processor rank in the table, and allocating the space, and optimally allocating the created space to the processors. With.

[Industrial applications]

The present invention relates to an automatic load distribution method between processors in a flexible-coupling multiprocessor system in which a plurality of processors cooperate to perform processing.

[Conventional technology]

As a method of improving performance by combining a plurality of CPUs, there is a tightly coupled multiprocessor system (hereinafter referred to as a TCMP system). However, in the TCMP system, since the memory and the cache are shared between the processors, there is a problem that the serialization causes an overhead, and the number of processors that can be combined is limited. To overcome this limitation, a flexible-coupling multiprocessor system (hereinafter referred to as FCMP) that connects processors by connecting multiple processors consisting of memory and CPU to a high-speed bus and performing message communication between the processors has been proposed. Appeared.

Unlike the TCMP system, the FCMP system does not share memory, so there is no overhead such as serialization between processors, and as a hard architecture, the performance of the entire system can be improved compared to the number of processors. is there.

However, since the FCMP does not share a memory, if a certain processing unit (space in this case) is allocated to a certain processor, there is a problem that processing is executed only by that processor. Therefore, optimizing the layout of the space in each processor is important for improving the processing performance of the FCMP system. However, there has been no effective means for this in the past.

[Problems to be solved by the invention]

To optimally allocate space for each processor in the FCMP system, monitor the number of startup spaces for each processor and
When creating a space, select the processors in a direction in which the number of activation spaces of each processor is equalized, check the method of allocating the created space, and check the load on each processor, and select the processor with the lowest load when creating the space. It is conceivable that the space is arranged.

However, in the former method of equalizing the number of startup spaces, if the processing capacity of the processor is large and the number of spaces that can be processed by one processor is large, the load on the processors is stochastically equalized by equalizing the number of spaces. Although it is highly likely that FCMP systems are originally designed to increase the processing capacity of the entire system by combining a large number of processors with low processing capacity, the number of boot spaces can be simply equalized. There is a high risk that the load on the processor will not be equalized just by making the processor load.

Therefore, scheduling considering the load between processors is required. If space activation requests are generated to some extent at random, it is highly likely that the load will be equalized if a method is selected simply based on the processor load at the time of space activation. Often occur in a concentrated manner. For example, activation of a subsystem space at the time of system activation or activation of a conversational space of a user immediately after lunch break.

After all, in order to distribute the load between processors, scheduling based on the load between processors is necessary, but it is not possible to distribute well by simply selecting the processor based on the processor load at the time of space creation. It is.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an optimal load distribution means for equalizing the processor load in a flexible coupling multiprocessor system and improving the system throughput and response time.

[Means for solving the problem]

The present invention solves the above-described problems by taking into account both the number of spaces and the load factor in each processor, and by taking into account the element of the life of the space, by optimally selecting the processor when creating the space. .

As a premise of the method of the present invention, the space is classified into the following two types.

-Short-time space A space in which the time from when a space is created to when it disappears is short.

 This mechanism regards the normal user space as a short-time type.

-Long-time space A space that takes a long time from the creation of a space to its disappearance.

This mechanism regards the system / subsystem space and server-type user space as long-time type.

According to the present invention, the load state of each processor is examined at a relatively short time interval because the load of the processor fluctuates according to the life of the activated space, and in the case of a short-time type space, it disappears in a short time even if it is allocated. At this point, if a new load (space) is distributed from a lightly loaded processor, the load can be averaged. On the other hand, in the case of a long-time type space, the period until the space disappears after startup is long. Therefore, when the method of allocating to the lightly loaded processor is adopted in the short-term load fluctuation of each processor, the load tends to be unbalanced, and the order of the processors allocating the long-term space is changed for a relatively long time. Focusing on the fact that it is desirable not to do so, the allocation of a new space to the processor is divided into a short-time space and a long-time space, and is separately performed according to each spatial characteristic. Than it is.

Therefore, the selection order of the processors which allocate the space of each type is determined according to the load amount, and the order of the results is selected for the short-time and long-time processor selection tables, respectively, and these tables are updated. Is performed by checking the load state of each processor at predetermined intervals of a short time and a long time, and based on the magnitude relation.

 FIG. 1 is a diagram illustrating the principle of the present invention.

In FIG. 1, reference numerals 1 and 2 denote processors PM1 and PM2 constituting a flexible coupling multiprocessor system. In this case, it is assumed that PM1 has a system management function, that is, a load distribution function. Here, the number of processors is set to 2 for simplicity of explanation.
Although the number is set to three, any number of three or more can be applied.

 A high-speed bus 3 connects PM1 and PM2.

 11, 17 are CPUs of PM1 and PM2, respectively.

 12 and 18 are memories of PM1 and PM2, respectively.

Reference numeral 13 denotes a short-time processor selection table, which indicates the order of the processors allocating the short-time space by the order of the lightest load.

Reference numeral 14 denotes a long-time processor selection table, which indicates the order of the processors that allocate the long-term space by the order of the lightest load.

Reference numeral 15 denotes a load distribution control program for determining whether the type of the created space is a short-time type or a long-time type, referring to a processor selection table according to the result, and selecting a processor to allocate the space.

16 is a processor load measurement program, and each PM1,
The load of PM2 is measured at short time intervals and long time intervals, and the processor arrangement order of the short-time and long-time processor selection tables 13 and 14 is determined according to the magnitude of the resulting PM1 and PM2 loads. Update.

[Action]

In FIG. 1, a short-time processor selection table 13 is shown.
Reflects the load status of each processor measured at short time intervals, and the load distribution control program 15 stores each short-time space created at any time on the current table until the next time this table is updated. In accordance with the order of the processors arranged according to the magnitude of the load, the processors are sequentially selected and assigned from the processor with the smallest load.

On the other hand, the long-time processor selection table 14 reflects the load status of each processor at long time intervals, and the load distribution control program 15 updates each long-time space created at any time, and then updates this table. Until this is done, the data is selected and assigned sequentially from the one with the smallest load according to the processor rank on the current table.

The processor load measurement program 16 monitors the time with a short-cycle timer and a long-cycle timer, measures the load of each processor as the time of each of these cycles arrives, and processes the processor according to the magnitude of the load. Is created, and the corresponding table 13 or 14 is updated.

By performing such processing, the short-time space follows the short-term load fluctuation of each processor relatively well, and is distributed more to the processor with the lighter load at that time. On the other hand, in the long-time space, the distribution to the processors is performed in a direction in which the load imbalance in a short time is not significantly affected and the imbalance of the load in a relatively long time is suppressed.

〔Example〕

An embodiment of the present invention will be described with reference to FIGS. In the following description, a processor is represented by PM.

FIG. 2 shows an embodiment of a short-term and long-term PM selection table. In the figure, 21 is a short-term PM selection table, 22 is a short-term PM selection pointer, 23 is a long-term PM selection table, and 24 is a long-term PM selection pointer. PMa to PMe are five processors that constitute the FCMP system.

The sequence of PM in each PM selection table 21 and 23, indicate the PM ranking by the magnitude of the load, for example in the case of short for PM selection table 21, PM from above _a, PM _b, PM _c, PM _d, PM _The load increases in the order of _e . Therefore, when a short time space is created, PMs are selected downward from PM _{a in} order.

The PM selection pointers 22, 24 are respectively assigned to the PM selection table 21,
23 points to the position of the PM to be selected next. Therefore, in the case of the short-time PM selection pointer 22 shown in the figure, since the position of PM _c is currently pointed in the table 21, space has already been allocated to the preceding PM _a and PM _b .
Next, it is shown that PM _c is selected when the space is allocated.

Note that the PM array in the long-term PM selection table 23 is different from the PM array in the short-time PM selection table 21. This is because the load measurement time of each processor, and therefore the table update time, is the same in both tables. The operation is performed in the same manner as in the short-time PM selection table 21.

FIG. 3 is a flow chart of an embodiment of a load distribution control program using the PM selection table of FIG.

The procedure of the flow in FIG. 3 will be briefly described. First, it is determined whether the created space is a short-time type or a long-time type, and a short-time PM selection pointer 22 or a long-time PM selection is performed according to each type. Find the value of pointer 24.

Next, according to the obtained PM selection pointer value, the corresponding short-term or long-term PM selection table (21, 2
3) and select the appropriate PM.

After that, if the next entry exists in the used PM selection table, the value of the PM selection pointer is set to the entry position. If the next entry does not exist, the PM entry pointer is set to the first entry position of the table. The value of the selection pointer is set to respond to the subsequent PM selection request.

FIG. 4 is a flow chart of an embodiment of a processor load measurement program for updating the PM selection table of FIG. 2 for the table.

The procedure of the flow shown in FIG. 4 will be briefly described. First, by monitoring the time by a timer, if the short time interval has expired, the PM selection pointer 22 and the PM selection table 21 for the short time are obtained. For example, a PM selection pointer 24 and a PM selection table 23 for a long time are obtained.

Then obtains the load of each PM (PM _a through PM _e), and sorts the PM of PM selection table corresponding to the ascending order of load, and updates the table. After that, the value of the corresponding PM selection pointer is selected as the position of the first entry of the table, and the processing ends.

[Effects of the Invention] According to the present invention, the optimal load distribution is performed to each processor in the system according to the type of space, so that the processor is uniformly distributed ignoring the type of space as in the conventional system. The processing performance can be remarkably improved as compared with the method.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining the principle of the present invention, FIG. 2 is a block diagram of a PM selection table according to an embodiment of the present invention, FIG. 3 is a flowchart of an embodiment of a load distribution control program, and FIG. It is an example flow figure. 1, processor PM1 2: processor PM2 3: high-speed bus 11,17: CPU 12, 18: memory 13: short-time processor selection table 14: long-time processor selection table 15: load distribution control program 16: Processor load measurement program

Claims (1)

(57) [Claims] 1. A flexible coupling multi-processor for performing message communication between processors in which a plurality of processors each including a memory and a CPU are connected by a high-speed bus, and allocating work to the plurality of processors in units of space and operating as one system. Means for preliminarily classifying a space into a short-time type and a long-time type according to the length of its life in a processor system, and determining which type of the created space to be allocated to the processor is; A short-term processor selection table and a long-time processor selection table in which processors are arranged according to the magnitude of their loads to determine the selection order of the processors for the short-time space and the long-time space; The magnitude of the load on each processor is periodically measured at predetermined short time intervals and long time intervals, respectively. Means for updating the processor arrangement of the short-time processor selection table and the long-time processor selection table in accordance with the measurement results at intervals of, and whether the type of the space determined for the created space is the short-time type A means for selecting a corresponding short-time processor selection table or a long-time processor selection table depending on whether it is a long-time type, and further selecting one processor based on the processor rank in the table and allocating space. Automatic load distribution between processors, characterized by optimally allocating the created space to processors.