JP2825104B2 - Implantable heart treatment device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an implantable cardiac treatment device, and more particularly, to a combination of a difibrillator and a Pacer, which is used during high energy defibrillation. An implantable cardiac treatment device having a pacer tip reed switch for circuit protection.

BACKGROUND ART In an example of a defibrillation / pacer combination device, two devices are used.
A pole pacer tip is mounted on the heart and two patch electrodes are mounted on or near the heart for defibrillation of the heart. The two patch electrodes are named a defibrillation patch electrode and a common patch electrode.
In such a configuration, the pace output transmission path extends from the bipolar pacer chip to the common patch. The defibrillation transmission line extends from the defibrillation patch to the common patch.

The problem with such an arrangement is that the pacer tip electrode acts as a probe during the high voltage defibrillation operation and relays the high voltage during the defibrillation operation to the input of the implantable device, and this high voltage is Destroy the shape device. One way to solve this problem is to use a diode,
The anode of the diode is connected to the pacer chip electrode, the cathode is connected to the common patch electrode, and the diode is located between the pacer chip electrode and the common loop. This diode clamps the high potential appearing on the pacer chip and protects the device from high voltage during defibrillation. However, this diode causes another problem.

That is, by inserting a diode between the pacer chip electrode and the common circuit, a current transmission path from the high voltage defibrillation patch electrode to the heart and the pacer chip electrode, and further to the common circuit via the diode is formed. . The current flowing through this current transmission path can be as high as 4 amps, sufficient to destroy heart tissue near the pacer tip electrode, increasing the pacer threshold.

As a solution to this problem, there is a method in which a large resistance is inserted in series with the pacer chip electrode to limit the current to cut off the current transmission path. However, this implantable unit is also used as a pacemaker, and such a large resistance makes the pace keeping action of the heart practically impossible unless the pulse pulse amplitude is reduced and the input energy is increased. .

SUMMARY OF THE INVENTION The basic object of the present invention is to solve the above problems,
In other words, the current path from the pacer tip electrode during defibrillation through the heart to the common annulus can efficiently deliver defibrillation and pacer pulses without destruction of the implantable unit or myocardial tissue. An implantable defibrillation and pacer device is provided.

It is another object of the present invention to provide a switch for preventing a current from flowing to a pacer tip electrode while an external defibrillation pulse is being supplied.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIG. 1, a defibrillation pacer combination device is shown wherein a defibrillation section 10 is disposed on or near a heart and a defibrillation electrode 12. Connected to the common patch electrode 16. Further, a pacer section 18 is connected via a control switch 22 to a pacer tip electrode 20 located on or near the heart. The control switch 22 is controlled by a plurality of control signals described in detail below.

The defibrillator 10 and the pacer 18 are controlled by the control unit 24. The control unit 24 includes an ECG amplifier and an ECG analyzer that determines the type of treatment to be administered to the heart. The pacer tip electrode 20 detects the cardiac activity of the heart and provides the detection information to the control unit 24.

The pacer section 18 is connected to the pacer tip electrode 20 via a lead wire 26.
Connected to The control switch 22 is inserted into a lead wire 26 between the pacer section 18 and the pacer chip 20.

The opening and closing of the control switch 22 is controlled by a control signal to selectively provide a current path from the pacer chip 20 to the pacer section 18.

FIG. 2 shows a circuit for processing a special control signal used to control the control switch 22. These special control signals include pace, recharge, time, discharge,
Drive and blank. As described above, the control switch 22 is open when the defibrillation pulse is to be delivered to the heart, and the high energy defibrillation pulse is transmitted to the pacer section 18 without being picked up by the pacer tip electrode 20. Nor. Control switch 22, on the other hand, must be closed when a pacer pulse is to be delivered to the heart via pacer chip 20. In FIG. 2, the transistor Q1 is shown as a MOSFET transistor and is inserted into the lead 26 between the pacer chip 20 and the pacer section 18. Transistor Q1 is selectively turned on and off to open and close lead 26.

The pace and recharge signals cause transistor Q1 to conduct, creating a current path between pacer section 18 and pacer tip electrode 20. Transistor Q1 is normally off and lead 26 is normally disconnected. Capacitor C1 is connected to the gate of transistor Q1 and is charged to 6 volts via diode D1 and resistor R1. Resistor R1 is connected to a negative 6 volt power supply. Pace or recharge signal is high and P-channel when transistor Q1 turns on
MOSFET transistor Q3 is triggered by NOR gate 30 to boost capacitor C1 above ground by 6 volts. This will give a positive 6 volts to the gate of transistor Q1. During the pacer operation, the source electrode of transistor Q1 is negative with respect to the ground potential. On the other hand, during recharging, the source electrode of transistor Q1 is maintained below 3 volts. Therefore,
When the gate electrode of transistor Q1 is maintained at a positive 6 volts by capacitor C1, the gate-to-source voltage of tracking error Q1 exceeds its threshold and transistor Q1 turns on. When the transistor Q1 is in the ON state, a pacer current or a recharge current flows to the chip electrode 20 via the lead wire 26.

During the defibrillation operation, transistor Q1 is kept off to prevent current from flowing through lead 26.
The drive and blank signals are high during the capacitor charging mode and during the defibrillation operation. These signals go through several digital logic gates
The MOSFET transistor Q is made conductive. In particular, the drive signal is connected to the clock input of D-type flip-flop 34 by an inverter.
Supplied via 32. The output of flip-flop 34 is NA
It is supplied to the ND gate 36. Blank signal from inverter 38
Is supplied to the NAND gate 36. The output of the NAND gate 36 is supplied to the gate of the transistor Q via the inverter 40. When the drive and blank signals are detected, transistor Q2 conducts, maintaining the gate of transistor Q1 one diode drop below ground potential. When the potential of the tip electrode with respect to the common electrode increases during the defibrillation operation, the potential difference between the source and the drain of the transistor Q1 becomes positive. Although the source potential does not follow the drain potential, if the source potential exceeds the diode drop of the Zener diode Z1, the source is clamped higher than one diode drop by the ground potential. The gate of transistor Q1 is clamped one diode drop below ground potential, and the potential difference from the gate to the source is not sufficient to make transistor Q1 conductive. Therefore, transistor Q1 remains off and no current flows through lead 26. The withstand voltage of transistor Q1 is designed to be at least 800 volts.

To reset the transistor Q1 to the normal off state, a period and a discharge signal are detected via the NAND gate 42. This NAND gate 42 is connected to the flip-flop via the inverter 44.
Connected to reset input of flop 34. The pace signal is connected to the input of NAND gate 42 via inverter 46. Transistor Q1 is reset to its normal off state when the appropriate combination of duration, pace, and discharge signal is detected.

When an external defibrillation pulse is applied to the patient, the source electrode of transistor Q1 is maintained one diode drop above ground potential and transistor Q1 automatically turns off for the reasons described above. In other words,
During the external defibrillation operation, the gate of the transistor Q1 is kept lower than the ground potential by one diode drop. When the chip potential rises above the common potential during the external defibrillation operation, the source potential follows the drain potential. Zener diode Z1 keeps the source potential of transistor Q1 high by one diode drop due to ground potential to prevent transistor Q1 from conducting. In such a state, the gate potential is lower than the threshold value, so that the transistor Q1 is off, and no current flows through the pacer chip.

The above embodiments are given by way of example only and do not limit the scope of the invention.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an implantable defibrillator / pacer combination device according to the present invention, and FIG. 2 is a circuit diagram showing details of a control switch in FIG.

Continuation of the front page (58) Field surveyed (Int.Cl. ⁶ , DB name) A61N 1/362 A61N 1/39

Claims (7)

(57) [Claims] 1. A device for performing cardiac pacing and defibrillation, comprising: defibrillation means for generating a defibrillation pulse; and defibrillation connected to the defibrillation means. Defibrillation electrode means for delivering ablation pulses to the patient's heart; pacing means for generating pacing pulses; paging electrode means for delivering the pacing pulses to the patient's heart; and pacing electrode means and the pacing means. A switch means connected between the pacing means and the pacing electrode means to form a transmission path between the pacing means and the pacing electrode means; The pacing pulse is supplied to the pacing device, and the pacing device and the pacing electrode are controlled by operating the switching device to capture the second state. Apparatus characterized by comprising a switch control means for cutting off the transmission path between the. 2. The switch control means sets the switch means to the first state in response to a first set of control signals;
The apparatus of claim 1 wherein said switch means is in said second state in response to a set of control signals. 3. The apparatus according to claim 1, wherein said switch means is a MOSFET transistor. 4. A switch disposed on a pacer lead between a pacing pulse generator and a pacing tip of a combined implantable cardiac pacer and defibrillation unit, the switch being triggered by switch control means to perform a defibrillation operation. A switch in which the unit is turned off to isolate the unit from high voltage defibrillation pulses and forms a low impedance conduction path from the pacing pulse generator to the pacing tip when turned on. . 5. An implantable pacer including a pacing pulse generator connected to an implantable casing tip electrode via a lead wire and a defibrillation pulse generator connected to the implantable defibrillation electrode. A combination device for defibrillation, comprising: switch means connected to a lead between the pacing pulse generator and the pacing tip electrode; and switch control means for selectively opening and closing the switch means. And equipment. 6. The apparatus according to claim 5, wherein said switch means is a MOSFET transistor. 7. A device for performing cardiac pacing and defibrillation, comprising: a defibrillation pulse generator for generating a defibrillation pulse; a pacing pulse generator for generating a pacing pulse; and analyzing an ECG of the heart. ECG analysis means for triggering the pacing pulse generator to generate a pacing pulse or triggering the defibrillation pulse generator to generate the defibrillation pulse; and on or near the heart First and second defibrillation electrodes mounted and connected to the defibrillation pulse generator to supply the defibrillation pulse to the heart; and the pacing pulse generator mounted on or near the heart. A pacing electrode connected to the pacing electrode for supplying the pacing pulse to the heart; and a pacing electrode connecting the pacing pulse generator to the pacing electrode. A MOSFET transistor connected to the pacing lead for selectively opening and closing the paging lead; triggering and closing the transistor switch during a pacing operation to generate the pacing pulse at the pacing lead; Forming a transmission path from the to the pacing electrode and opening the transistor switch during the defibrillation operation, the pacing pulse generator,
An apparatus comprising a defibrillation pulse generator and a switch control circuit for electrically isolating said ECG analysis means from the heart.