JP2820081B2 - Alignment method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an alignment method, and more particularly to a method of aligning a mask pattern on a wafer (semiconductor substrate) with high accuracy by a projection exposure apparatus.

[0002]

2. Description of the Related Art At present, a reduction projection exposure apparatus called a stepper is most commonly used in a lithography process in a semiconductor device manufacturing process. Since the stepper has a relatively low wafer processing capacity of about 30 to 60 wafers / hour,
Several to dozens of steppers are arranged in the production line. In manufacturing a semiconductor device, as described later, it is desirable to perform processing with a single stepper in order to ensure alignment accuracy, but processing of a specific device alone has caused a significant decrease in productivity.

[0003] Conventionally, as a typical method of aligning a mask pattern with a base in a semiconductor device manufacturing process, a die-by-die (die by die) for performing alignment for each chip.
dye) There is a global alignment that measures only two or three alignment marks to determine the alignment and the coordinate system in the wafer. As an eclectic method, the alignment marks of several to several tens of chips in the wafer are sampled. There was a statistical processing method to measure the data.

Next, these alignment methods will be described with reference to the drawings. FIGS. 10A and 10B are plan views showing one exposure field and an alignment mark therein. Usually, at least two of the x-direction alignment mark 3 and the y-direction alignment mark 4 are included in one exposure field. This is the same not only in the case of FIG. 10A in which a single chip is included in one exposure field, but also in the case of FIG. 10B in which a plurality of chips are included. The alignment mark is often formed at the center of the exposure field or, if there is no scribe area at that position, in the scribe area on the x, y coordinates passing through the center of the exposure field. This is because the central portion of the exposure field is less likely to be displaced from the ideal grating due to distortion, and it is desirable to place the alignment mark at a symmetrical position. In addition, a diffraction grating having a pattern having a constant pitch as shown in FIG. 10C is often used as the alignment mark.

When the mask pattern shown in FIG. 10A is repeatedly exposed on the entire surface of the wafer, a chip arrangement as shown in FIG. 11 is obtained. Die-by-die alignment is a method in which an alignment mark is measured for each exposure field, alignment is performed with a mask, and then exposure is performed.
There are problems that the throughput is extremely low because the number of measurement points of the alignment marks is very large, and that the dispersion accuracy such as asymmetry of each alignment mark cannot be corrected at all, so that the alignment accuracy cannot be sufficiently increased.

In order to solve these problems, the above-described statistical processing method has been devised. In this method, as shown in FIG. 12, several to dozens of chips (marked with an x mark attached to an alignment mark) are selected from each field in the wafer, and the coordinates of the alignment mark in the exposure field are measured and should be originally present. A plurality of position errors from coordinates are statistically processed to determine the position of each field to be exposed and to perform exposure. In this method, the number of alignment marks to be measured is reduced as compared with the die-by-die method, so that the throughput is improved. In addition, in order to reduce the process variation of each alignment mark, averaging is performed at a plurality of points, so that the alignment accuracy is slightly higher than in die-by-die alignment.

[0007] The simplest alignment method is global alignment. This method is roughly classified into two methods. The first method is to use the first alignment mark (the first x-direction alignment mark 25-3 and the first y
A set of directional alignment marks 25-4) and a second alignment mark (a second x-direction alignment mark 26-).
3, the x coordinate is determined from the set of the second y-direction alignment arcs 26-, and then the third alignment mark (the third x-direction alignment mark 27-3 and the third y-direction alignment mark 27-4) is determined. Set) and correct the rotation from y
Determine the coordinates. Only three points are measured, and exposure is performed by moving the wafer by the pitch of the exposure field based on the determined coordinates. The second method uses an alignment mark (global alignment mark 2) as shown in FIG.
8 or 8 are formed outside the exposure field, and the alignment marks are measured to determine the x and y coordinates for exposure.

[0008]

In the conventional alignment method described above, even in the die-by-die alignment having the largest number of measurement points, there is only one alignment mark for each of x and y in one exposure field. Therefore, the number of points to be aligned is one for each exposure field, and there is a problem that the overlay error cannot always be minimized over the entire exposure field in consideration of the lens distortion of the projection exposure apparatus described below and the positional accuracy of the reticle. Was.

Lens distortion is one of Seidel's five aberrations, and is an aberration whose projected image shape is not similar to that of a mask. FIG. 14 is a schematic diagram showing lens distortion. The grating that should be projected and exposed as the ideal grating is deformed by the lens distortion as shown in FIG. The size of the lens distortion varies depending on the design and manufacturing accuracy of the lens, but is about 50 to 80 nm in a reduction projection lens used in a lithography process. By the way, the lens distortion is different for each lens even if the lens is designed for similar use. Therefore, when the number of the exposure apparatus used in the previous lithography process is different from that in the current lithography process, it is impossible to perform alignment with zero positional error over the entire exposure field due to different lens distortion.

The same can be said for the overlay error due to the positional error of the pattern on the reticle as the error due to the lens distortion.

In the conventional alignment method, any of die-by-die alignment, statistical alignment, and global alignment is measured from an alignment mark (a set of x-direction alignment marks 3 and y-direction alignment marks 4) as shown in FIG. , Y coordinate is driven to zero. In this method, the difference between the image forming position 16 of the previous-step exposure apparatus and the image forming position 12 of the current-step exposure apparatus remains as an overlay error. An overlay error of the amount indicated by the vector 17 in FIG. 14 (its absolute value is represented by a) occurs.

Such an overlay error can be reduced by performing several exposures required in the manufacturing process of the semiconductor device, all with the same exposure apparatus, and this is currently the case. However, it cannot be said that sufficient alignment accuracy is still obtained. In addition, the same exposure apparatus must be used, which lowers productivity.

Accordingly, it is an object of the present invention to provide an alignment method capable of reducing an alignment error due to a distortion and / or mask distortion of an exposure apparatus.

[0014]

An alignment method according to the present invention uses a plurality of masks having a first alignment mark and a second alignment mark respectively corresponding to a center position and a peripheral position of an exposure field. When a semiconductor device is manufactured by sequentially forming patterns on the wafer, aligning a pattern to be projected with an exposure region of the wafer using the first alignment mark formed on the wafer; Measuring the position of the second alignment mark formed on the wafer, comparing the position of the second alignment mark on the mask given from the distortion or mask distortion of the exposure apparatus onto the wafer, Is to correct the relative position between the center of the pattern to be projected and the center of the exposure area so that the difference between them is minimized. It is intended.

In this case, the second alignment mark can be provided at a plurality of locations, and the relative position can be corrected so that the maximum value of the difference obtained for each location is minimized.

The correction of the relative position can be performed by translation or rotation.

By using the second alignment mark, an alignment error based on distortion or mask distortion can be obtained, and the position can be corrected so as to reduce it.

[0018]

Next, a first embodiment of the present invention will be described.

FIG. 1 is a plan view showing the arrangement of alignment marks in an exposure field.
FIG. 3 is a diagram in a case where one chip 2 is included. First alignment mark (first x-direction alignment mark 3-
1, the first set of y-direction alignment arcs 4-1) corresponds to the center position of the exposure field as in FIG. 10B. At each of the four corners of the exposure field, a second alignment mark (a second x-direction alignment mark 3-
2, a set of second y-direction alignment marks 4-2). Usually, the amount of displacement due to the distortion of the exposure apparatus usually becomes maximum at a point at a large distance from the center of the lens, and the second alignment marks are arranged at the four corners of the exposure field because the maximum value of the distortion is detected. It is. FIG. 2 shows a plan view of the wafer including the exposure field.

Next, as shown in FIG. 3, in step 41, the wafer is transferred to the reduction projection exposure apparatus, and the position of the first alignment mark on the wafer is measured through the alignment optical system of the apparatus. Next, in step 42, alignment is first performed by any of the conventional methods, ie, die-by-die, global, and statistical processing methods, and the alignment of the center of the exposure field is completed. For example, in the case of die-by-die alignment, the first alignment marks (the first x-direction alignment marks 3-1 and the first y-direction alignment marks 4-1 in FIG. 1) already formed on the wafer are used. To align the center of the exposure field. This is the same as before.

Next, in step 43, for one exposure field (selected exposure field) in the wafer, for example, the exposure field 6 shown in FIG. 2, the second alignment mark at the four corners shown in FIG. The position is measured and the deviation from the ideal lattice is determined. The distortion value is specific to each projection optical system and does not fluctuate in a short time. The reduction projection exposure apparatus to be used is stored in advance with the distortion of the apparatus itself. next,
In step 44, the measured values of the second alignment marks at the four corners formed on the wafer in the exposure field are compared with the lens distortion data. The alignment using the second alignment marks at the four corners is a superposition of the distortions of the reduced projection exposure apparatus in the previous step and the reduced projection exposure apparatus in the current step. Does not depend on Therefore, although there is no problem in measuring one exposure field as shown in FIG. 2, a plurality of exposure fields may be selected and statistically processed in order to further improve the accuracy.

FIG. 4 shows the relationship between the image forming position 16 of the pre-process exposure apparatus and the image forming position 12 of the current process exposure apparatus obtained from the measured values of the second alignment marks at the four corners. The ideal grating 7 shows an image forming position when there is no influence of distortion. It is assumed that the second position 9, the third position 10, and the fourth position 11 of the four corners have exactly the same image forming position when exposed by the previous and current exposure apparatuses. The first position 8 has moved outward on the wafer by the second vector 18 due to the distortion of the exposure apparatus in the previous process,
Assuming that the coordinates of the first position 8 are (−a, b), (−a−
c, b + c). On the other hand, in the exposure apparatus of the present process, the coordinates of the first position 8 are similarly moved inward by the distortion, and the coordinates (-a + c, b-
c). That is, the previously stored distortion of the exposure apparatus itself is 0 at the second to fourth positions, and the second vector 18 (the square root of 2 times the size c) at the first position 8. I do.

At this time, the first exposure field center 14
Even if the position error is zero at (the center when adjusted in step 42), the vector at the first position 8 is (-2c, 2c), and the length c is twice the square root of 2 An overlay error of only (first vector 17) occurs. Since the alignment margin in the semiconductor device manufacturing process is the same in the chip, it is necessary to suppress the maximum value of the overlay error.

The first to fourth positions 8, 9, 10 and 1 when the overlay error between the exposure field centers is zero.
1 are (−2)
c, 2c), (0, 0), (0, 0), (0, 0). Therefore, the position where the maximum value of the overlay error is minimum is given by the second exposure field center 15 obtained by adding the second vector 18 to the first exposure field center 14.

Next, in step 45, the wafer stage is moved by (c, -c), in other words, the first image forming position 12 in the current exposure apparatus is moved by (-c, c), and the second stage is moved. By setting the image position 13, the overlay error at the first to fourth positions is (-c, c), respectively.
(C, -c), (c, -c), and (c, -c). The maximum value of the overlay error including the center of the exposure field is c
From the value obtained by multiplying the square root of 2 by 2 times to the value obtained by multiplying the square root of 2 by c. Next, in step 46, exposure is started. The following steps are conventional.

Next, a second embodiment of the present invention will be described. In the first embodiment, the distortion correction is performed by moving the reticle (mask) or the wafer in parallel, but correction by rotation can also be performed. FIG. 5 is a plan view showing the arrangement of alignment marks in an exposure field according to the second embodiment. The second alignment mark is a second x-direction alignment mark 3-2 and two second y-direction alignment marks 4- at the outermost portion on the x and y axes passing through the center of the chip instead of the four corners of the chip.
2 are arranged. The first x-direction alignment mark 3-1 is the first y-direction alignment mark 4-1.
Constitutes a first alignment mark, but can be used as a second alignment mark at the same time. The distortion (non-orthogonal distortion) of the exposure apparatus is expressed as x
The angles are expressed as inclination angles θ1 to θ4 (FIG. 6) from the axis and the y-axis.

As in the first embodiment, FIG.
In step 71, the wafer is set in the reduction projection exposure apparatus, and in step 72, the center of the exposure field is aligned. Next, in step 73, the overlay error measurement in the rotation direction is performed. That is, the first formed on the wafer
Of the x-direction alignment arc 3-1, the second second y-direction alignment mark 4-2, and the position of the second x-direction alignment mark 3-2, and the deviation of the ideal lattice 7 is determined to obtain the inclination angle θ1. To θ4. The measured value is θ1
0 to θ40. However, in actuality, θ30 = 0 because the straight line determined by the first alignment mark (3-1, 4-1) is used as a reference. Next, the difference θ11 from the inclination angles θ11 to θ41 (previously stored) in the current exposure step.
−θ10, θ21−θ20, θ31−θ30, θ41−
The overlay error is obtained by calculating θ40. These are again referred to as θ1, θ2, θ3, θ4. Next, in step 74, the amount of rotation for minimizing the overlay error is calculated. That is, for example, the flow goes to the flow shown in FIG. 8, and the maximum value and the minimum value among θ1 to θ4 are extracted in step 81. Next, at step 82, Δθ = (maximum value−minimum value) /
2 is obtained and θ1-Δθ, θ2-Δθ, θ3-Δθ, θ4-
Find Δθ. Again, these are θ1, θ2, θ3, θ
In step 83, the absolute values of the maximum value and the minimum value are compared, and if they are equal, the correction amount Δθ is obtained. If not equal, the procedure returns to step 81 to repeat the same procedure. Thus, the reticle stage is rotated by the correction amount Δθ determined in step 84 (step 75). Next, in step 76, exposure is started.

Next, a third embodiment of the present invention will be described. As described above, the distortion is corrected in the first and second embodiments. However, with the recent miniaturization, the influence of the positional accuracy error at the time of manufacturing the reticle on the alignment accuracy cannot be ignored. As one of the positional errors at the time of manufacturing the reticle, there is a case where "reticle tilt", which is an orthogonality abnormality in the reticle shown in FIG. 9, occurs.
This is because pattern writing is performed with the reticle alignment mark 20 as a reference position using an electron beam, and the position accuracy of the pattern is slightly inferior in both directions. In order to correct the reticle manufacturing error, the coordinates of the check pattern 21 for checking the orthogonality of the reticle in advance are measured by a reticle position coordinate measuring device such as a light wave 5i manufactured by Nikon Corporation, and the ideal position is measured. Is calculated. The amount of rotation with respect to the center of the reticle is calculated from the amount of deviation, and stored in the exposure apparatus as reticle-specific data. The subsequent alignment method is the same as the method described in the second embodiment, except for the difference between the measured θ1, θ2, θ3, and θ4.
1 and θ4 are corrected based on the calculated value.
That is, in the flow of FIG. 7, the inclination angles θ11 to θ41 in the current exposure step in step 73 are exactly the same except that in the present embodiment, θ21 = θ31 = 0.

[0029]

As described above, according to the present invention, a plurality of alignment marks are set in an exposure field to correct an overlay error due to a distortion or a reticle manufacturing error in the exposure field, which cannot be corrected by the conventional alignment method. By performing the exposure at a position where the maximum value of the overlay error in the exposure field is minimized in comparison with the distortion or reticle manufacturing error data, the alignment accuracy can be improved. As a result, in some cases, it is not necessary to use the same exposure apparatus for all the exposures throughout the manufacturing process, and the productivity can be improved.

[Brief description of the drawings]

FIG. 1 is a plan view showing the arrangement of alignment marks in an exposure field for explaining a first embodiment.

FIG. 2 is a plan view of a wafer for describing a first embodiment.

FIG. 3 is a flowchart for explaining a first embodiment.

FIG. 4 is a plan view illustrating a crystal position of an exposure apparatus in a previous process and a current process for describing a first embodiment.

FIG. 5 is a plan view showing the arrangement of alignment marks in an exposure field for describing a second embodiment.

FIG. 6 is a plan view illustrating non-orthogonal distortion for describing a second embodiment.

FIG. 7 is a flowchart for explaining a second embodiment.

FIG. 8 is a flowchart for determining an optimal rotation amount in the second embodiment.

FIG. 9 is a plan view of the reticle showing an example of a reticle manufacturing error.

FIG. 10 is a plan view showing a first example of the arrangement of alignment marks in an exposure field (FIG. 10A);
10 (b) and a schematic diagram (FIG. 10 (c)) showing one example of an alignment mark.

FIG. 11 is a plan view of a wafer showing a state exposed by a stepper.

FIG. 12 is a wafer plan view for describing a first method of global alignment.

FIG. 13 is a plan view of a wafer for describing a second method of global alignment.

FIG. 14 is a plan view showing an image forming position of an exposure apparatus in a previous step and a current step in the related art.

[Explanation of symbols]

 Reference Signs List 1 exposure field 2 chip 3 x direction 3,3-1,3-2 x direction alignment mark 4,4-1,4-2 y direction alignment mark 5 wafer 6 selected exposure field 7 ideal grating 8 first position 9 2nd position 10 3rd position 11 4th position 12 Current process exposure apparatus 1st imaging position 13 Current process exposure apparatus 2nd imaging position 14 Center of 1st exposure field 15 2nd exposure field Center 16 Image forming position of pre-process exposure apparatus 17 First vector 18 Second vector 19 Reticle 20 Reticle alignment mark 21 Check pattern (A) 22 Reticle tilt amount 23 Selected x direction alignment mark 24 Selected y direction alignment Mark 25-3 First x-direction alignment mark 25-4 First y-direction alignment mark Click 26-3 second x-direction alignment mark 26-4 second y-direction alignment mark 27-3 third x-direction alignment mark 27-4 third y-direction alignment mark 28 global alignment mark

Claims (4)

(57) [Claims] 1. A first alignment mark and a second alignment mark respectively corresponding to a center position and a peripheral position of an exposure field.
When a semiconductor device is manufactured by sequentially forming patterns on a wafer using a plurality of masks having alignment marks, the wafer is exposed using the first alignment marks formed on the wafer. Aligning an area with a pattern to be projected, measuring the position of a second alignment mark formed on the wafer, and adjusting the position of the second alignment mark on the mask from distortion or mask distortion of the exposure apparatus Comparing the position of the pattern to be projected onto the wafer and correcting the relative position between the center of the pattern to be projected and the center of the exposure region so that the difference between the two is minimized. 2. The alignment method according to claim 1, wherein the second alignment mark is provided at a plurality of locations, and the relative position is corrected so that the maximum value of the difference obtained for each location is minimized. 3. The alignment method according to claim 1, wherein the relative position is corrected by translation. 4. The alignment method according to claim 1, wherein the relative value is corrected by rotation.