JP2817424B2 - Video data correction circuit and correction method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is incorporated in a reproducing circuit of a device for recording / reproducing video data (signal) such as a VTR and a magneto-optical disk recorder, and corrects video data or corrects image quality. The present invention relates to a correction circuit and a correction method.

[0002]

2. Description of the Related Art A reproduction circuit of a device for recording and reproducing video data (signal) such as a VTR and a magneto-optical disk recorder generally includes a correction circuit for correcting video data or an image quality correction circuit. The correction circuit is supplied with video data and an error flag indicating whether or not the video data is erroneous. When the error flag indicates that there is an error, the correction circuit corrects (corrects) the error data by replacing the error data with video data of the same phase before N fields.

[0003]

However, the conventional correction circuit has a drawback that when errors occur frequently in one field, distortion due to correction is conspicuous at an edge portion. This is because the luminance signal and the color component change greatly at the edge of the screen.

The present invention has been made in view of the above problems, and provides a video data correction circuit and a correction method capable of obtaining a high-quality image by reducing image distortion and image roughness due to correction. The purpose is to do.

[0005]

A video data correction circuit according to the present invention receives video data for a line scan to which an error flag has been added, and corrects an error in the video data using the error flag. If, connected to said correction circuit, a conversion circuit for converting the block scan from line scan scanning method of the corrected error flag input video data, is connected to the conversion circuit, the scan converted error flag Based on each bro
Of error flags in video data
In a correction factor is calculated for each block, cotton throughout one screen
A correction factor distribution calculation circuit for calculating the distribution of the correction factor that is connected to the correction factor distribution calculation circuit, and a filter coefficient circuit for obtaining the filter coefficients for each block the distribution of the correction factor,
A filtering circuit connected to the filter coefficient circuit and the conversion circuit, for filtering the video data after scan conversion with the obtained filter coefficient; and a filtering circuit connected to the filtering circuit for filtering the filtered video data for line scan video data. And a circuit for performing reverse scan conversion into a column.

In addition, a video signal correction method according to the present invention includes a correction step of receiving a video signal and correcting an error in the video signal using an error flag attached to the video signal, based on the error flag. Calculating the number of error flags for each block when one screen is divided into a plurality of blocks, and obtaining a filter coefficient for adjusting a video signal for each block based on the obtained number of error flags for each block a step, said video signal, characterized by a step of filtering by the filter coefficients of a block that the video signal belongs.

[0007]

In the video data correction circuit according to the present invention, for each block when one screen is divided into a plurality of blocks, a correction rate distribution indicating the ratio of corrected samples among the samples in the block is obtained. The optimum filter coefficient is obtained for each block based on the distribution of the correction rates. Then, the corrected video data is filtered by a filter having the obtained filter coefficients. As a result, it is possible to suppress the roughness of the screen due to the corrected video data in the peripheral portion of the screen.

In the video signal correction method according to the present invention, an optimum filter coefficient is obtained for each block when one screen is divided into a plurality of blocks in order to prevent image distortion and the like. Then, the corrected video signal is filtered by a filter having the obtained filter coefficients. Thereby, it is possible to suppress the roughness of the screen due to the correction of the video signal in the peripheral portion of the screen.

[0009]

Embodiments of the present invention will be specifically described below with reference to the accompanying drawings.

As shown in FIGS. 1 to 4, in the video data correction circuit according to the embodiment of the present invention, an 8-bit parallel video data (video signal) 11 and an accompanying 1-bit error flag The signal is supplied from the circuit to the correction circuit 1. The error flag is set when the error detection circuit determines that an error has occurred in the video data based on the parity bit or the like.

The correction circuit 1 corrects (corrects) a video data sample in which an error has occurred (one sample = 8 bits) according to the on / off state of an error flag. As a correction method, a conventionally known method such as replacing a video data sample having an error with a nearby sample having the same phase or taking an average value of a plurality of nearby samples can be used.

The video data corrected (corrected) by the correction circuit 1 is supplied to the scan conversion circuit 2A of the scan conversion unit 2. The scan conversion circuit 2A converts the video data supplied from the correction circuit 1 in the order for line scan into the order for block scan and outputs it (see FIG. 2). More specifically, the scan conversion circuit 2A includes:
One screen is divided into a plurality of blocks of 16 samples × 16 samples, and video data (910 samples in the H direction, 263 lines or 262 lines in the V direction) is rearranged into data for each block and output.

FIG. 3 shows an example of the configuration of the scan conversion circuit 2A. In the scan conversion circuit 2A shown in FIG. 3, the address controller 22 controls the address, stores video data for line scan in the RAM 21 for one screen, and performs scan conversion by reading the stored data in block units.

The error flag is also supplied to a delay circuit D1. The delay circuit D1 delays the error flag by the time required for the correction circuit 1 to correct the data, and supplies the error flag to the scan conversion circuit 2B of the scan conversion unit 2. The scan conversion circuit 2B has a configuration similar to that of the scan conversion circuit 2A, and converts the error flags into a block scan order and outputs the error flags.

The error flag 14 output from the scan conversion circuit 2B is supplied to the correction coefficient distribution calculation circuit 3.
The correction coefficient distribution calculation circuit 3 includes a flag counter 31,
A peak detector 32 and a delay circuit D2 which receive the output of the flag counter 31;
And a correction distribution calculation circuit 33 receiving the output of.

The flag counter 31 calculates the total number of error flags for each block. The peak detection unit 32 calculates the maximum value among the obtained error flag numbers for each block. The delay circuit D2 delays the output of the flag counter 31 by the time required for the processing of the peak detection circuit 32. The correction distribution calculation circuit 33 includes, for example, a CPU, an arithmetic circuit, and the like, and performs normalization and normalization based on the peak value supplied from the peak detection circuit 32 and the number of error flags for each block supplied from the delay circuit D2. The distribution of the correction rate (a group of correction rates for each block) 15 over the entire smoothed one screen is calculated.

As the correction rate distribution 15, for example, a Gaussian distribution (normal distribution), a set of values obtained by dividing the number of error flags of each block by the value obtained by the peak detection circuit 32, and the number of error flags of each block A set of square roots of values divided by the value obtained by the peak detection circuit 32 or the like can be used as appropriate.

The correction factor distribution 15 calculated by the correction coefficient distribution calculation circuit 3 is supplied to the filter coefficient calculation circuit 4. The ROM 41 is connected to the filter coefficient calculation circuit 4. The ROM 41 stores, for example, a filter lookup table indicating the relationship between the correction factor P and the filter coefficient α shown in FIG. The calculation circuit 4 addresses the look-up table using the received correction factor distribution 15, and calculates a filter coefficient distribution α (x, y) in one screen.
(X is the horizontal position of the sample on the screen, and y is the vertical position of the sample on the screen).
y) is the same value in one block). The calculated filter coefficient distribution α (x, y) is supplied to the control terminal of the filter 5. For example, according to the lookup table of FIG. 4, when the correction rate of a certain block is P2, the filter coefficient for that block is α2.

The video data 13 scan-converted by the scan conversion circuit 2A is supplied to a delay circuit D3. The delay circuit D3 delays the converted video data 13 by the time required for processing in the correction coefficient distribution calculation circuit 3 and the filter coefficient calculation circuit 4. The delay circuit D3 supplies the delayed data to the input terminal of the filter circuit 5 as data 13 '. The filter circuit 5 is a digital filter, and filters the input data 13 ′ with different filter coefficients for each block using the filter coefficient distribution α (x, y) calculated by the filter coefficient calculation circuit 4.

The output data 16 of the filter 5 is supplied to the reverse scan circuit 6. The reverse scan circuit 6 has substantially the same configuration as the scan circuit shown in FIG. 3, and converts an image for one screen supplied in the block scan order into RA.
The block scan is returned to the original line scan by storing the data in the M and reading out the data stored in the RAM in the order for the line scan.

The output data 12 of the inverse scan conversion circuit 6 is supplied to an A / D conversion unit and the like (not shown).

According to the above embodiment, the filter coefficient (for example, high cutoff value, low cutoff value, etc.) is controlled for each block. Therefore, video data having an abnormally large or small value in one block is adjusted to an appropriate value by the filter 5. Therefore, for example, even when an error occurs on a burst on one screen, it is possible to suppress correction distortion and roughness on the screen.

The present invention is not limited to the above embodiment, and various modifications are possible.

For example, in the above embodiment, one screen is divided into a plurality of blocks of 16 pixels × 16 pixels, but blocks of other sizes may be employed. Also,
The number of bits of the video data may be another value.

In the above embodiment, the scan conversion circuits 2A and 2B are provided independently, but the scan conversion circuits 2A and 2B
May be shared by one conversion circuit. Alternatively, the video data and the error flag may be connected, and the scan data may be scan-converted by one scan conversion circuit. After the conversion, the video data and the error flag may be separated.

In FIG. 1, the correction coefficient distribution calculation circuit 3 is constituted by hardware, but may be constituted by software, for example. Further, the correction coefficient distribution calculation circuit 3 and the filter coefficient calculation circuit 4 may be configured by software, for example. Although a lookup table is provided in the ROM 41 to obtain the filter coefficient for speeding up the calculation, the filter coefficient may be obtained by actual calculation.

In the above description, the filter coefficient is obtained according to the distribution 15 of the correction rate, but another method may be used. For example, the number of error flags of each block and the filter coefficient may be stored in the ROM 41 in association with each other according to a predetermined rule, and the filter coefficient may be directly obtained from the number of error flags of each block.

In the above embodiment, video data and error flags were actually converted from line scan to block scan. However, for example, an error flag for one screen is stored in the RAM, and a filter coefficient for each block is obtained.
It is also possible to filter the line scan video data with the filter coefficients for the block to which each data sample belongs.

[0029]

According to the present invention, video data is filtered using the filter coefficients for each block calculated by the filter coefficient calculation circuit. Therefore, for example, even when an error occurs on a burst on one screen, it is possible to suppress correction distortion and roughness on the screen.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of a video data correction circuit according to one embodiment of the present invention.

FIG. 2 is a diagram illustrating a line scan, a block, and a block scan.

FIG. 3 is a diagram illustrating a configuration of a scan conversion circuit.

FIG. 4 is a diagram illustrating an example of a lookup table.

[Explanation of symbols]

 1, a correction circuit; 2, a scan conversion unit; 2A, 2B; a scan conversion circuit; 3, a correction coefficient distribution calculation circuit; 4, a filter coefficient calculation circuit; 4, 5, a filter;

Claims (2)

(57) [Claims] 1. A receives the video data for error flag marked the line scan, a correction circuit for correcting an error of the video data using the error flag, is connected to the correction circuit, the correction video data each blow based on the conversion circuits and being connected to the conversion circuit, the scan-converted error flag the scanning method of the input error flag to convert from the line scan in the block scanning and
Of error flags in video data
The correction factor is calculated for each block is, a correction factor distribution calculation circuit for calculating the distribution of <br/> correction factor across the one side, is connected to the correction factor distribution calculation circuit, for each block the distribution of the correction factor A filter coefficient circuit for obtaining a filter coefficient; a filtering circuit connected to the filter coefficient circuit and the conversion circuit for filtering video data after scan conversion with the obtained filter coefficient; and a filtering circuit connected to the filtering circuit for filtering. A circuit for performing reverse scan conversion of the video data into a video data sequence for line scanning. 2. A process for receiving a video signal, correcting an error in the video signal using an error flag attached to the video signal, and dividing one screen into a plurality of blocks based on the error flag. Calculating the number of error flags per block at the time of, and obtaining a filter coefficient for adjusting a video signal for each block based on the calculated number of error flags for each block; and video data correction method characterized by a step of filtering by the filter coefficients of the block that the signal belongs.