JP2801893B2 - Plasma display panel driving method and plasma display device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to relates to the dynamic method and a plasma display device driving surface discharge AC plasma display panel.

[0002]

2. Description of the Related Art Plasma display panels (PDPs)
Since they are self-luminous, they have good visibility, are thin, and can perform large-screen display and high-speed display. In particular, the surface discharge AC type PDP is suitable for full-color display, is expected in the field of high-definition television, and is required to have high image quality. Higher image quality includes higher definition, higher gradation, higher luminance, lower luminance of black display, higher contrast, and the like. High definition is achieved by narrowing the pixel pitch, high gradation is achieved by increasing the number of subfields in a frame, and high brightness is achieved by increasing the number of sustain discharges. Reducing the luminance of black display is achieved by reducing the amount of light emission during the reset period.

FIG. 30 shows a schematic configuration of a conventional AC type and surface discharge type plasma display panel (PDP) PDP10P. One of the opposing glass substrates (observer side)
, Electrodes X1 to X5 are formed in parallel with each other at an equal pitch, and electrodes Y1 to Y5 are respectively formed in parallel and in pairs. On the other glass substrate, address electrodes A1 to A6 are formed in a direction orthogonal to these electrodes,
A phosphor is entirely coated thereon. Partitions 171 to 177 are provided between the opposing glass substrates in order to prevent the discharge of one pixel from affecting the adjacent pixels and causing erroneous display.
And the partitions 191 to 196 are arranged in a grid pattern so as to cross each other.

[0004] In the surface discharge type, since discharge occurs between adjacent electrodes on the same surface, it is possible to prevent the phosphor formed on the opposing surface from colliding with ions and thereby deteriorating the phosphor. Having. However, since a pair of electrodes are arranged in each of the display rows L1 to L5, narrowing of the pixel pitch is restricted, and high definition is prevented. Further, since the number of electrodes is large, the scale of the driving circuit is increased.

Therefore, a PDP 10Q as shown in FIG.
(JP-A-5-2993 and JP-A-2-220330). In the PDP 10Q, partitions 191 to 199 are arranged along the center line of the electrodes X1 to X5 and Y1 to Y4, which are surface discharge electrodes.
Electrodes X2 to X4 and electrodes Y1 to Y4 excluding 1 and X5
Are shared by display rows adjacent in the address electrode direction.
As a result, the number of electrodes is almost halved, so that the pixel pitch can be narrowed, and higher definition than in the case of FIG. 30 can be achieved. Further, the size of the driving circuit can be reduced.

[0006]

However, in the above publication, writing is performed line-sequentially on the display rows L1 to L8, and if there are no partitions 191 to 199, discharge affects adjacent pixels in the address electrode direction. However, since an erroneous display is performed, the partition walls 191 to 199 cannot be removed, and a high definition due to a reduced pixel pitch is prevented. Further, it is not easy to provide the partitions 191 to 199 along the center line of the electrode, which causes the PDP 10Q to be expensive. Furthermore, the above publication does not specifically disclose the electrode applied voltage waveform, and has not been put to practical use. In order to remove the partition wall in the direction of the surface discharge electrode, in the configuration of FIG. 30, it is necessary to increase the distance between the electrodes on both sides of each of the partition walls 191 to 196 to reduce the electric field. High definition is hindered. For example, the electrode X1-
When the distance between Y1 is 50 μm, the distance between electrodes Y1 and X2 is 300 μm
To be.

[0007]

[0008]

An object of the present invention is to solve such a problem.
Seen, Ru near to provide a driving method and a plasma display device of a plasma display panel capable of achieving a more reduced to high-definition pixel pitch.

[0010]

[0011]

Means and effects to an aspect of claim
1 denotes a plurality of X electrodes, for example, as shown in FIG. 1 or FIG.
And a plurality of Y electrodes are parallel to each other, and each Y electrode is
The X electrode and the Y electrode are arranged so as to be sandwiched between electrodes.
Multiple address electrodes are arranged to intersect
A driving method of the plasma display panel,
For example, as shown in FIGS. 7 and 8, or FIGS.
Between each Y electrode and one X electrode adjacent to each Y electrode
A first display step of performing display by discharge between the Y electrodes
And a discharge between each of the Y electrodes and the other of the adjacent X electrodes.
Is temporally separated from the second display step of performing display by
You. According to this plasma display panel driving method,
For example, the first electrode between the Y electrode and one adjacent X electrode
One display row, the Y electrode, and the other X electrode adjacent thereto
When one of the second display rows in between is discharging, the other discharges.
Since the power is not being supplied, the X
There is no need to provide partitions along the center line on the poles and Y electrodes.
As a result, the production of plasma display panels
Become easier and cheaper, and reduce the pixel pitch
There is an effect that high definition can be achieved.

A plasma display panel drive according to claim 2
In the moving method, for example, as shown in FIG.
In addition, the X electrodes and the Y electrodes are alternately arranged.
Are, the first display step, for example, in FIGS. 7 and 8
As shown, each Y electrode is selected according to the display data.
Address discharge is performed sequentially with the above address electrodes.
At the same time, the Y electrode and the
Discharge is performed between one adjacent X electrode and
An address period for accumulating wall charges necessary for electrodeposition, respective Y electrostatic
Supply an AC sustaining pulse between the pole and each of the X electrodes
And a sustain discharge is generated between each of the Y electrodes and one of the X electrodes.
And a sustain period to be performed, wherein the second display step
It is the A which is selected according to the respective Y electrodes and display data
While performing address discharge sequentially with the dress electrode,
Triggered by the address discharge, adjacent to the Y electrode
Discharge between the other X electrode, necessary for sustain discharge
Address period for accumulating various wall charges, each Y electrode and other
An AC sustaining pulse is supplied between each of the X electrodes and the Y electrode.
A sustain discharge between the electrode and each of the other X electrodes.
Having a stin period.

[0013] The plasma display panel drive of claim 3
In the moving method, in claim 2, for example, as shown in FIGS.
As shown, in the address period in the first display step,
Is the distance between the Y electrode and the one X electrode adjacent to the Y electrode.
The potential difference is triggered by the address discharge.
The pulse is selectively applied so as to exceed the discharge starting voltage between the XY electrodes.
Scan is applied, the address period in the second display step
Then, the Y electrode and the other X electrode adjacent to the Y electrode
The potential difference is triggered by the address discharge.
The pulse is selectively applied so as to exceed the discharge starting voltage between the XY electrodes.
Is applied.

A plasma display panel drive according to claim 4
In the moving method, in claim 2, for example, as shown in FIGS.
As shown, in the sustain period in the first display process,
Is the voltage waveform applied to the Y electrode and the other
The voltage waveform applied to the X electrode is in phase with the Y electrode;
And the applied voltage of the adjacent one X electrode.
The above-mentioned AC sustain pulse is supplied so that the
In the sustain period in the second display step,
The applied voltage waveform of the Y electrode and the one of the adjacent X electrodes
The applied voltage waveform is in phase and the applied voltage of the Y electrode is
The pressure waveform and the applied voltage waveform of the other adjacent X electrode are
The AC sustaining pulse is supplied so as to be in the opposite phase. This
According to the plasma display panel driving method,
The first display row and the second display row affect each other with respect to discharge.
Not effective.

[0015] The plasma display panel drive of claim 5
The dynamic method, according to claim 2, said plasma display
The lay panel is, for example, as shown in FIG.
One X electrode (X _{1 to} X _{n + 1} ) and n Y electrodes
The poles (Y _{1 to} Y _n ) are Y _i electrodes for each i = ₁ to _n.
As There is provided between the X _i electrodes and X _{i + 1} electrode, another
Are arranged alternately and parallel to each other, for example, as shown in FIG.
As shown in the figure, during the address period of the first display process,
Te sequentially run the Y _i electrodes per each i of i = 1 to n in this order
While査, performs address discharge, the second display step
, Y _{i for} each of i = 1 to n
The electrodes are sequentially scanned in that order, and an address discharge is performed.
U.

A plasma display panel drive according to claim 6
In the moving method, in claim 5, for example, as shown in FIGS.
As described above, in the address period of the first display step, an odd
When a scan pulse is applied to the number Y _2i-1 electrodes,
_Potential difference between _2i-1 electrode and one of the X electrodes adjacent to it
Is released between XY electrodes when triggered by an address discharge.
At one of the adjacent X electrodes so as to exceed the
Each odd-numbered X _2i-1 electrode has a polarity opposite to that of the scan pulse.
To the even-numbered Y _2i electrode by applying a positive pulse Vx
When applying a pulse, the Y _2i electrode and the
The potential difference with one X electrode is triggered by the address discharge
The discharge starting voltage between the XY electrodes
Each even-numbered X _2i electrode, which is one adjacent X electrode ,
A pulse Vx having a polarity opposite to that of the scanning pulse is applied.
In the address period of the second display step, an odd number
When a scan pulse is applied to the second Y _2i-1 electrode,
_Potential difference between _2i-1 electrode and the other adjacent X electrode
Is released between XY electrodes when triggered by an address discharge.
At the other adjacent X electrode so as to exceed the
Each even-numbered X _2i electrode has a polarity opposite to that of the scan pulse.
Pulse Vx is applied, and the scanning pulse is applied to the even-numbered Y _2i electrodes.
When applying a _{screw, the Y2i} electrode and the other
Potential difference with the other X electrode is triggered by the address discharge
In such a case that the voltage exceeds the discharge starting voltage between the X and Y electrodes.
Each odd-numbered X _2i-1 electrode, which is the other X electrode that meets ,
A pulse Vx having a polarity opposite to that of the scanning pulse is applied.

According to claim 7, in claim 5, for example,
As shown in FIGS. 7 and 8, the address of the first display step
In the period, when the scan pulse is applied to the Y _i electrode
To, with the Y _i electrode and the one X electrode adjacent thereto
XY voltage when potential difference is triggered by address discharge
One of the adjacent X
The electrode is selectively supplied with a pulse V having a polarity opposite to that of the scan pulse.
x in the address period of the second display step,
Upon application of the scan pulse to the Y _i electrodes, the Y _i electrode
And the potential difference between the other X electrode and the adjacent X electrode
Discharge start voltage between X and Y electrodes when triggered by
To the other adjacent X electrode so that the pressure is exceeded.
Then, a pulse Vx having a polarity opposite to that of the scanning pulse is applied.

A plasma display panel drive according to claim 8.
In the moving method, for example, as shown in FIG.
In addition, the plasma display panel has n
+1 X electrodes (X _{1 to} X _{n + 1} ) and n Y electrodes
The electrodes (Y _{1 to} Y _n ) have Y _i for each of i = ₁ to _n.
Distribution such that the electrode is provided between the X _i electrodes and X _{i + 1} electrode
6B, 10 and 11, for example.
As shown, during the address period of the first display step,
Between the odd-numbered Y _2i-1 electrodes and the even-numbered Y _2i electrodes.
After performing address discharge by scanning one in order, the other is scanned.
Scanning is performed in order to perform an address discharge, and the second display step is performed.
In the address period, each of the odd-numbered Y _2i-1 electrodes is
One of the even-numbered Y _2i electrodes is sequentially scanned to release the address.
After charging, the other is scanned sequentially to perform address discharge.
U. According to this plasma display panel driving method,
In the address period, odd-numbered X electrodes and even-numbered X electrodes
Pulse supplied to the X-th electrode can be continuous
Power consumption by reducing the number of pulses
It has the effect that it can be done.

A plasma display panel drive according to claim 9
In the moving method, for example, in FIG.
As shown in FIG. 1, in the address period of the first display step,
While scanning each odd-numbered Y _2i-1 electrode,
_Potential difference between _2i-1 electrode and one of the X electrodes adjacent to it
Is released between XY electrodes when triggered by an address discharge.
At one of the adjacent X electrodes so as to exceed the
Each odd-numbered X _2i-1 electrode has a polarity opposite to that of the scan pulse.
Pulse Vx is applied to scan each even-numbered Y _2i electrode
During the operation, the Y _2i electrode and the one X
When the potential difference with the electrode is triggered by the address discharge
In order to exceed the discharge starting voltage between the XY electrodes,
Each even-numbered _X2i electrode, which is one of the X electrodes, is provided with the scanning pattern.
The pulse applies an opposite polarity pulse Vx, upper
In the address period of the second display step, each of the odd-numbered
While scanning the Y _2i-1 electrode, the Y _2i-1 electrode and the adjacent thereto
The potential difference between the other X electrode and the other X electrode is
Exceeds the firing voltage between XY electrodes when triggered
As described above, each even-numbered X electrode which is the other adjacent X electrode
_Apply pulse Vx of opposite polarity to the scanning pulse to _2i electrode
While scanning the even-numbered Y _2i electrodes, the Y _2i electrodes
The potential difference between the pole and the other X electrode adjacent to the pole is
Start of discharge between XY electrodes when triggered by dress discharge
Each of the other adjacent X electrodes so as to exceed the voltage.
The odd-numbered _X2i-1 electrodes are _{supplied with a} pulse having a polarity opposite to that of the scan pulse.
Loose Vx is applied.

A plasma display panel according to claim 10.
In the driving method, for example, as shown in FIG.
The first display step and the second display step are respectively
It consists of multiple subfields, each of which
The subfield is a reset for initializing each discharge cell.
Cut period, the address period, and the sustain period
And combining any of the subfields
Realizes gradation display.

The plasma display panel according to claim 11
In the driving method according to the tenth aspect, for example, FIG.
As shown in FIG. 17, in the reset period, adjacent engagement
A write pulse is applied between the X electrode and the Y electrode.
Vw, and the plurality of sub-circuits in the first display step.
Subfield located at the top of the
During the reset period of subfields other than
A reset between the Y electrode and the other adjacent X electrode.
Apply a cancel voltage to prevent cut discharge
And, the plurality of sub-fields in the second display step
Of the fields other than the first subfield
During the reset period of the subfield, the Y electrode
And a reset discharge occurs between the adjacent one of the X electrodes.
Apply a cancel voltage that inhibits the occurrence. this
According to the plasma display panel driving method, invalid
Since the light is reduced, the brightness of the black display is reduced and the display quality is reduced.
The effect of improving is produced.

A plasma display panel according to claim 12.
In the driving method, for example, as shown in FIG.
As described above, the plasma display panel has n
Y electrodes (Y ₁ to Y _n) are arranged parallel to each other, and i
= 1 to n, X on both sides of the _Yi electrode
_2i-1 electrode and X _2i electrode are arranged.
And as shown in FIG. 23, the first display step, each of Y
The address electrode selected according to the electrode and display data
Between the address discharge and the address discharge.
Triggered by discharge, the X electrode adjacent to the Y electrode
A discharge is caused between the _X2i-1 electrode, which is the
An address period for accumulating wall charges required for, respective Y electrodes
And maintaining an AC current between each of the X electrodes and the X _2i-1 electrode.
A pulse is supplied to each of the Y electrodes and one of the X electrodes.
Sustain period for sustain discharge with X _2i-1 electrode
Has the door, the second display step, respective Y electrodes and the display data
Between the address electrodes selected according to the
Performs address discharge and triggers the address discharge.
X _2i collector is an X-electrode of the other adjacent the Y electrode and the and
Discharge between the pole and the wall charge required for sustain discharge
The address period to be stored, the respective Y electrodes and the other X electrodes
An AC sustaining pulse is supplied between each of the _X2i electrodes.
Wei between each X _2i electrodes are X electrodes of the Y electrodes and said other
And a sustain period for performing sustaining discharge. This plastic
According to the Zuma display panel driving method, the first table
When one of the display row and the second display row is discharging, the other is
Is not discharging, so the plasma display panel
It is necessary to provide a partition wall along the center line of the X electrode and the Y electrode.
No, this allows the production of plasma display panels
Becomes easier and cheaper, and the pixel pitch is reduced.
To achieve high definition.
You. Also, two display rows are formed by three parallel electrodes.
Conventional example in which two display rows are formed by four parallel electrodes
The pixel pitch can be shorter than before, and high definition can be achieved.
This has the effect. In addition, the Y electrode is divided into even and odd numbers.
This eliminates the need to perform
I do.

A plasma display panel according to claim 13.
In the driving method, according to claim 12, said first display step
In the address period, the Y electrode and the adjacent
The potential difference between the one X electrode and the other
Exceeding the firing voltage between the X and Y electrodes when triggered by
A pulse is applied so that the
The potential difference between the adjacent X electrode and the other X electrode is
Discharge start voltage between X and Y electrodes when triggered by
The potential of the other X electrode is maintained so as not to exceed the pressure.
In the address period in the second display step,
Between the Y electrode and the other X electrode adjacent thereto.
XY voltage when potential difference is triggered by address discharge
When a pulse is applied so as to exceed the discharge starting voltage between the electrodes,
Both the Y electrode and the one X electrode adjacent to the Y electrode
X when the potential difference between
-One of the X electrodes so as not to exceed the discharge start voltage between the Y electrodes.
The potential of the electrode is maintained.

A plasma display panel according to claim 14.
In the driving method, in claim 12, for example, FIG.
As shown in FIG. 23, the sustain in the first display process is performed.
In the scanning period, the Y electrode and one of the X
Apply the AC sustaining pulse between the electrodes and
Between the Y electrode and the other adjacent X electrode.
In order that the potential difference does not exceed the discharge start voltage between the X and Y electrodes,
The potential of the other X electrode is maintained, and the second display step is performed.
During the sustain period, the Y electrode and the adjacent Y electrode
Apply the AC sustaining pulse between the other X electrode
And the X electrode adjacent to the Y electrode and the one X
The potential difference between the electrodes exceeds the discharge start voltage between the X and Y electrodes.
To prevent this, the potential of the one X electrode is maintained.

A plasma display panel according to claim 15.
In the driving method, for example, as shown in FIG.
As described above, the first display step and the second display step
Each consists of multiple subfields, each of which
The subfield is used to initialize each discharge cell.
Set period, the address period, and the sustain period
And any combination of the sub-fields
Thus, gradation display is realized. The plasma display according to claim 16.
The display panel driving method according to claim 1,
For example, as shown in FIG.
And the even field in the second display step.
It consists of fields.

The plasma display device according to claim 17
Corresponds to the method of claim 1 and has a plurality of X electrodes.
Y electrodes are parallel to each other, and each Y electrode is the X electrode.
And the X electrode and the Y electrode.
Multiple address electrodes arranged so as to intersect and separate from poles
Plasma display panel and first display period
Then, each of the Y electrodes and one of the X electrodes adjacent to the Y electrode
The display is performed by the discharge between the electrodes and the first display period and time
In the second display period separated from each other, each Y electrode and each Y electrode
Display by discharge between the electrode and the other adjacent X electrode
To drive the X electrode and the Y electrode.
And a motion circuit.

A plasma display device according to claim 18
The plasma display panel according to claim 17,
The X and Y electrodes of the flannel are arranged alternately with each other.
And the electrode drive circuit operates during the first display period.
During the address period according to each of the above-mentioned Y electrodes and display data.
Address between the address electrodes selected by
Discharge, and the Y address is triggered by the address discharge.
Discharge between the electrode and one of the adjacent X electrodes
To accumulate wall charges necessary for sustain discharge, and sustain
In this case, an AC sustaining path is provided between each of the Y electrodes and one of the X electrodes.
Between the Y electrodes and the one X electrode.
A sustain discharge is performed, and during the second display period, the address
Selected in accordance with the respective Y electrodes and display data during the scanning period.
When address discharge is performed sequentially with the address electrodes,
In both cases, the Y-electrode and the adjacent
A discharge is generated between the other X electrode and the sustained discharge.
The wall charges necessary for the Y-electrons are accumulated during the sustain period.
Supply an AC sustain pulse between the pole and the other X electrode
And a sustain discharge is generated between each of the Y electrodes and each of the other X electrodes.
carry out.

[0028] In the plasma display device according to claim 19,
In claim 18, the electrode driving circuit may be, for example,
As shown in FIG. 4, an electrode for driving the address electrodes is provided.
A dress circuit and the Y electrode during the address period.
Scanning circuit for performing the scanning of
Then, the AC sustaining pulse is applied to the odd-numbered Y electrodes.
And the odd Y sustain circuit for applying, the sustain
In the period, the even numbered Y electrodes are connected to the AC
And an even Y sustain circuit for applying a pulse, the suspension
In the tin period, the AC is applied to the odd-numbered X electrodes.
An odd X sustain circuit for applying a sustain pulse;
During the sustain period, the even-numbered X electrodes are
Even number X sustaining times for applying AC sustaining pulse
Road. The plasma display device according to claim 20.
Then, in claim 19, the electrode drive circuit is, for example,
For example, as shown in FIG.
A scanning circuit for scanning the electrodes; This plasm
According to the display device, during the address period, X
Only necessary pulses are supplied to the electrodes, and odd-numbered X electrodes
Group and even-numbered group
The effect of lower power consumption than when supplied
To play.

A plasma display device according to claim 21
The electrode driving circuit according to claim 18,
As shown in 13 and 14, first the AC sustain pulse
A first sustain circuit for supplying the first AC
A second AC sustain pulse 180 ° out of phase
And a second sustain circuit for generating the odd-numbered Y electrodes.
Poles, even-numbered Y electrodes, odd-numbered X electrodes,
The first AC sustaining pulse is applied to the even-numbered X electrodes.
For selectively supplying one of the second AC sustaining pulses.
Switching circuit and sustain period of the first display period
Between the odd-numbered Y electrodes and the even-numbered X electrodes.
Pole to supply the first AC sustain pulse, and
The second AC is applied to a number Y electrode and the odd number X electrode.
The sustain pulse is supplied, and the sustain pulse of the second display period is sustained.
In the period, the odd-numbered Y electrodes and the odd-numbered X electrodes
Causing the electrode to supply the first AC sustaining pulse;
The second Y-electrode is connected to the even-numbered Y electrode and the even-numbered X electrode.
The switching circuit so as to supply a current maintaining pulse.
And a control circuit for controlling This plasma display
According to the ray device, the first sustain circuit and the second sustain circuit
Since the output of the IN circuit is switched and used,
This has the effect of simplifying the configuration of the drive circuit.

The plasma display device according to claim 22
In claim 21, the electrode driving circuit is, for example,
As shown in FIG. 15, during the address period, the X
It has a scanning circuit for scanning the poles. Claim 23
In the plasma display device, according to claim 18,
The X electrode and the Y electrode of the plasma display panel
Both poles are formed on a substrate, for example, as shown in FIG.
Transparent electrode and the transparent electrode along the center line of the transparent electrode.
And a metal electrode that is stacked on the pole and is narrower than the transparent electrode.
I do.

[0031] In the plasma display device according to claim 24,
In claim 17, for example, FIG. 18, FIG.
As shown in FIG. 23, the plasma display panel comprises:
n lines of the Y electrodes (Y ₁ to Y _n) is of parallel to each other
Is, and per each i of i = 1 to n, its on both sides of the Y _i electrodes
The X _2i-1 electrode and the X _2i electrode are arranged, respectively ,
In the first display period, the electrode driving circuit may control an address.
Selected in accordance with each of the Y electrodes and display data during the period.
When address discharge is performed sequentially with the address electrodes,
In both cases, the Y-electrode and the adjacent
Discharge is performed between the other X electrode, X _2i-1 electrode.
Align Te, and accumulating wall charge required for sustain discharge, sustain
During the period, each of the Y electrodes and one of the X electrodes, ie, each of the X _2i-1 electrodes,
An AC sustaining pulse is supplied between the Y electrode and each of the Y electrodes.
_Sustain discharge between each X _2i-1 electrode
Then, in the second display period, in the address period,
The address electrodes selected according to the Y electrode and the display data.
Address discharge is performed sequentially between the electrodes and the address discharge.
Discharge and the other X adjacent to the Y electrode
Discharge between the _X2i electrode, which is the electrode, and sustain discharge
The wall charges necessary for the Y-electrons are accumulated during the sustain period.
AC between the pole and each other X _2i electrode
Supplying a pulse to each of the Y electrodes and the other X electrode.
Implementing the sustain discharge between the X _2i electrode.

The plasma display device according to claim 25,
In claim 24, the electrode driving circuit is, for example,
As shown in FIG. 18, the address electrodes are driven.
An address circuit and, during the address period, the Y
A scanning circuit for scanning the poles and the sustain period
And applying the AC sustaining pulse to the Y electrode
And Y sustain circuit for, the sustain period odor
And apply the AC sustaining pulse to the odd-numbered X electrodes.
Odd sustain circuit for performing the operation and the sustain period
In the above, the AC sustain pulse is applied to the even-numbered X electrodes.
And an even-number X sustain circuit for applying Contract
In the plasma display device according to claim 26,
In, for example, as shown in FIG. 19, the plasma di
Both the X and Y electrodes of the spray panel are
A transparent electrode formed on a plate, and laminated on the transparent electrode;
It is, and a transparent width than the electrode is narrow metal electrodes, the Y electrostatic
The polar metal electrode is arranged along the center line of the transparent electrode.
And the metal electrode of the X electrode is the same as the Y electrode of the transparent electrode.
It is located on the side away from it. This plasma display
According to a device, for example, a voltage is supplied between the X electrode and the Y electrode.
The electric field on the X electrode becomes stronger on the metal electrode side
Even if the electrode pitch is narrowed for higher definition,
Product than when the metal electrode is formed on the center line of the transparent electrode
Can be substantially increased.
The opposite side of the X electrode from the Y electrode is a non-display row.
There is no problem if you do, and the non-display lines are substantially narrower.
Is preferred.

[0033] In the plasma display device according to claim 27,
, In claim 24, for example as shown in FIG. 24, the upper
The Y electrode of the plasma display panel is provided on a substrate.
The X electrode is formed on the substrate.
A transparent electrode formed on the transparent electrode,
And a narrow metal electrode than the transparent electrode, gold of the X electrode
The metal electrode is disposed on the side of the transparent electrode that is away from the Y electrode.
Have been. According to this plasma display device,
Since the Y electrode becomes narrow, a scan pulse is supplied to the Y electrode.
This has the effect of reducing power consumption when the power is turned on. Ma
In addition, it is possible to make the pixel pitch narrower
It works. 29. The plasma display device according to claim 28.
Then, in claim 17, the electrode driving circuit is
Processing the odd field of one frame in the first display period,
In the second display step, the even field of the one frame is processed.
Manage.

[0034]

Embodiments of the present invention will be described below with reference to the drawings. [First Embodiment] FIG. 1 shows a PD according to a first embodiment of the present invention.
P10 is shown. In FIG. 1, pixels are indicated by dotted lines only in the display row L1. For simplicity of explanation, PDP1
The number of pixels of 0 is 6 × 8 = 48 in monochrome pixel conversion. The present invention can be applied to either color or monochrome, and one color pixel corresponds to three monochrome pixels.

The PDP 10 is a PDP shown in FIG. 31 for facilitating manufacture and reducing the pixel pitch to achieve higher definition.
The configuration is such that partitions 191 to 199 are removed from 10Q. In order to prevent erroneous discharge from occurring due to the influence between adjacent display rows due to this removal, the distance between the electrodes L1 to L8 of the surface discharge will be described later.
Pulse voltage waveform maintained at the odd and even rows are in sagging over scan scanning so that the opposite phase of (In conventional in-sauce over <br/> be scanned, L2, L4, L6, L8 is completely non Since it was a display row, rows L1 and L5 were scanned in odd fields and rows L3 and L7 were scanned in even fields.)

FIG. 2 shows a state where the space between the opposing surfaces of the color pixel 10a is widened. FIG. 3 shows an electrode X of the color pixel 10a.
1 shows a longitudinal section along 1; On one side of the glass substrate 11,
Transparent electrodes 121 and 122 such as an ITO film are arranged in parallel with each other, and metal electrodes 131 and 132 such as copper are connected to the transparent electrodes 121 and 122, respectively, in order to reduce a voltage drop along the longitudinal direction of the transparent electrodes 121 and 122. It is formed along the upper center line. The transparent electrode 121 and the metal electrode 131 constitute an electrode X1, and the transparent electrode 122 and the metal electrode 132 constitute an electrode Y1. On the glass substrate 11, the electrode X1, and the electrode Y1, a dielectric 14 for retaining wall charges is deposited, and further thereon, an MgO protective film 15 is formed.
Is attached.

On the other hand, the MgO protective film 1 of the glass substrate 16
The address electrodes A1, A2, A3 and partitions 171 to 173 partitioning the address electrodes A1, A2, A3 are formed on the surface facing the electrode 5 in a direction perpendicular to the electrodes X1 and Y1. Partition wall 171
Between the partition 172 and the partition 172, between the partition 172 and the partition 173, and between the partition 173 and the partition 174, the ultraviolet light generated by the discharge enters, and the phosphor 18 emits red light.
1. A phosphor 182 emitting green light and a phosphor 183 emitting blue light are attached. In the discharge space between the phosphors 181 to 183 and the MgO protective film 15, for example, Ne +
Xe Penning mixed gas is sealed.

The partition walls 171 to 174 prevent ultraviolet rays generated by the discharge from entering the adjacent pixels, and function as spacers for forming a discharge space. Phosphor 1
If the same material is used for 81 to 183, the PDP 10 is for monochrome display. FIG. 4 shows a schematic configuration of a plasma display device 20 using the PDP 10 having the above configuration.

The control circuit 21 converts display data DATA supplied from the outside into data for the PDP 10 and supplies the data to the shift register 221 of the address circuit 22, and also supplies a clock CLK and a vertical synchronization signal supplied from the outside. Based on the VSYNC and the horizontal synchronization signal HSYNC, various control signals are generated and supplied to the components 22 to 27, 281 and 282.

In order to apply voltage waveforms as shown in FIGS. 7 and 8 to the electrodes,
2, the voltages Vaw, Va and Ve are supplied to the odd Y sustain circuit 24 and the even Y sustain circuit 25, and the voltages −Vc, −Vy and Vs are supplied to the odd Y sustain circuit 24 and the even Y sustain circuit 25, respectively. The voltages Vw, Vx and Vs are supplied to each.

The numerical value in the box 221 is for identifying elements having the same configuration as each other.
(3) is the third bit of the shift register 221. The same applies to other components. In the address circuit 22, when one row of display data is supplied from the control circuit 21 to the shift register 221 during the address period, the bits 221 (1) to 221 (6) are respectively stored in the latch circuit 222.
Are held in the bits 222 (1) to 222 (6), and switches (not shown) in the drivers 223 (1) to 223 (6) are turned on / off in accordance with the values, and the binary voltage of the voltage Va or 0V is applied. The pattern is supplied to the address electrodes A1 to A6.

The scanning circuit 23 has a shift register 231 and a driver 232. In the address period, each VSYNC is connected to the serial data input terminal of the shift register 231.
Only '1' is supplied in the first address cycle of the cycle, which is shifted in synchronization with the address cycle.
Switches (not shown) in the drivers 232 (1) to (6) are turned on / off by the values of the bits 231 (1) to (4) of the shift register 231, and the selection voltage -Vy or the non-selection voltage -Vc is changed. It is applied to the electrodes Y1 to Y4. That is, the shift of the shift register 231 causes the electrodes Y1 to Y
4 are sequentially selected, and a selection voltage −Vy is applied to the selected electrode Y.
Is applied, and the non-selection voltage −Vc is applied to the non-selection electrode Y. These voltages -Vy and -Vc are supplied from the odd Y sustain circuit 24 and the even Y sustain circuit 25. In the sustain period, the odd Y sustain circuit 24
Supplies the first sustain pulse train to the odd-numbered electrodes Y1 and Y3 of the Y electrodes via the drivers 232 (1) and (3), and the drivers 232 (2) and (4) from the even-Y sustain circuit 25. , The first sustain pulse train and the phase of 1 are applied to the even-numbered electrodes Y2 and Y4 of the Y electrodes.
A second sustain pulse train shifted by 80 ° is supplied.

In the electrode X circuit, during the sustain period, the odd-numbered X-sustain circuit 26 receives the odd-numbered electrodes X1, X3, and X5 from the X-electrode via the driver 281.
, The second sustain pulse train is supplied, and the even sustain circuit 27 supplies the first sustain pulse train to the even-numbered electrodes X2 and X4 of the X electrodes. In the reset period, the X-sustain circuits 26 and 27 supply a full-surface write pulse to the electrodes X1 to X5, respectively. In the address period, a pulse train of two address cycles is output from the odd X sustain circuit 26 in response to the scan pulse as shown in FIGS.
A pulse train that is supplied to odd-numbered electrodes X1, X3, and X5 of the electrodes and that is 180 ° out of phase with the pulse train is
The even X sustain circuit 27 supplies the X electrodes to even electrodes X2 and X4.

The above circuits 223, 232, 24, 25, 2
6 and 27 are switching circuits for turning on / off the voltage supplied from the power supply circuit 29. FIG. 5 shows a configuration of one frame of a display image. This frame is divided into an odd field and an even field, and each field includes first to third subfields. For each subfield, in the odd field, a voltage having a waveform shown in FIG. 7 is supplied to each electrode of the PDP 10 so that rows L1 and L1 in FIG.
3, L5 and L7 are displayed.
By supplying a voltage having a waveform shown in FIG. 8 to each electrode of P10, FIG.
, L2, L4, L6 and L8 are displayed. First to third
The sustain periods in the subfield are T1, 2 respectively.
T1 and 4T1, and in each subfield, sustain discharge is performed a number of times proportional to the length of the period.
As a result, the luminance becomes eight gradations. Similarly, the number of subfields is set to 8, and the ratio of the sustain period is set to 1: 2: 4:
8: 16: 32: 64: 128, the luminance is 256.
It becomes gradation.

The scanning of the display row during the address period is performed as shown in FIG.
(A) are performed in the order of the numbers in the circles. That is, in odd fields, scanning is performed in the order of display rows L1, L3, L5, and L7, and in even fields, scanning is performed in the order of display rows L2, L4, L6, and L8. Next, an operation in an odd field will be described with reference to FIG. W, E, A and S in FIG.
Indicates the time points at which a full write discharge, a full self erase discharge, an address discharge and a sustain discharge occur, respectively. Hereinafter, for simplicity, they are collectively referred to as follows.

X electrode: electrodes X1 to X5 Odd X electrode: electrodes X1, X3 and X5 Even X electrode: electrodes X2 and X4 Y electrode: electrodes Y1 to Y4 Odd Y electrode: electrodes Y1 and Y3 Even Y electrode: electrode Y2 and Y4 Address electrode: Address electrodes A1 to A6 Vfxy: Discharge start voltage between adjacent X electrode and Y electrode Vfay: Discharge start voltage between opposing address electrode and Y electrode Vwall: Discharge start voltage between adjacent X electrode The voltage (wall voltage) between the positive wall charge and the negative wall charge due to the wall charge generated by the discharge between the Y electrode. For example, Vfxy = 290 V, Vfay = 18
0V. Further, the distance between the address electrode and the Y electrode is A-
It is called between Y electrodes, and similarly between other electrodes.

(1) Reset Period In the reset period, the voltage waveform supplied to the X electrode is the same as that of the entire write pulse, and the voltage waveform supplied to the Y electrode is 0 V and the same. The resulting voltage waveforms are the same for the intermediate voltage pulses. Initially, the voltage applied to each electrode is 0V. Due to the last sustain pulse of the sustain period before the reset period, a positive wall charge exists on the X electrode side and a negative wall charge exists on the Y electrode side on the MgO protective film 15 of the lighting pixel. Almost no wall charge exists on the X electrode side and the Y electrode side of the unlit pixel.

When a ≦ t ≦ b, a reset pulse of the voltage Vw is supplied to the X electrode, and the voltage Vaw is applied to the address electrode.
Are supplied. For example, Vw = 310V
Vw> Vfxy, and the display rows L1 to L8 are set between adjacent XY electrodes regardless of the presence or absence of wall charges.
Is generated between the X and Y electrodes, and the generated electrons and positive ions are attracted by an electric field caused by the voltage Vw between the X and Y electrodes to generate wall charges of opposite polarity, thereby reducing the electric field strength of the discharge space. The discharge ends in 1 to several μs. Voltage V
aw is about Vw / 2, and when a reset pulse is applied, the voltage between the AX electrode and the voltage between the AY electrodes are in opposite phases to each other and have substantially equal absolute values. The average of the charges is almost zero.

When the reset pulse falls at t = b,
That is, when the applied voltage having the opposite polarity to the wall voltage disappears, X-
The wall voltage Vwall between the Y electrodes becomes higher than the discharge starting voltage Vfxy, and the entire self-erasing discharge E occurs. At this time, since the X electrode, the Y electrode, and the address electrode are all at 0 V, this discharge hardly generates wall charges, and the ions and electrons recombine in the discharge space and are almost completely neutralized. In the space, there are some charges that cannot be recombined, but this space charge plays a role of a pilot in the next address discharge, which facilitates the discharge. This is known as the priming effect.

(2) Address discharge period In the address period, the voltage waveforms supplied to the odd-numbered X electrodes are the same as each other, and the voltage waveforms supplied to the even-numbered X electrodes are the same as each other. The voltage waveforms are the same at the voltage -Vc. Y electrodes are Y1 to Y
4, the scanning pulse of the voltage -Vy is supplied to the selected electrodes, and the non-selected electrodes are set to the voltage -Vc. For example, Vc = Va = 50V and Vy = 150V.

(C ≦ t ≦ d) A scanning pulse of a voltage -Vy is supplied to the electrode Y1, and a writing pulse of the voltage Va is supplied to the address electrode for a pixel to be turned on. The following relationship is satisfied: Va + Vy> Vfay, an address discharge is generated only in a pixel to be lit, and a wall charge of the opposite polarity is generated to terminate the discharge. At the time of the address discharge, of the electrodes X1 and X2 adjacent to the electrode Y1, the pulse of the voltage Vx is supplied only to the electrode X1. Assuming that the discharge start voltage between the X and Y electrodes when triggered by this address discharge is Vxyt, the following relationship holds: Vx + Vc <Vxyt <Vx + Vy <Vfxy, and writing is performed between the X1 and Y1 electrodes of the display row L1. Discharge occurs, and wall charges of opposite polarity to the extent that self-discharge does not occur are generated between the X1 and Y1 electrodes, and the discharge ends. On the other hand, no discharge occurs between the X2 and Y1 electrodes of the display row L2.

(D ≦ t ≦ e) The scanning pulse of the voltage −Vy is supplied to the electrode Y2, the pulse of the voltage Vx is supplied to the even-numbered X electrodes, and the writing of the voltage Va to the pixels to be turned on to the address electrodes. A pulse is supplied, and a write discharge is generated between the X2 and Y2 electrodes of the display row L3 in the same manner as described above to generate wall charges of the opposite polarity.
No discharge occurs between the X3-Y2 electrodes.

Hereinafter, the same operation as described above is performed when e ≦ t ≦ g. In this way, the display rows L1, L3, L5
Then, in the order of L7, a writing discharge of display data occurs for a pixel to be turned on, a positive wall charge is generated on the Y electrode side, and a negative wall charge is generated on the X electrode side. (3) Sustain period In the sustain period, a sustain pulse train having the same phase and the same voltage Vs is supplied to the odd-numbered X electrode and the even-numbered Y electrode, and the sustain pulse train whose phase is shifted by 180 ° (１ ／ cycle) is an even number. It is supplied to the X electrode and the odd Y electrode. Further, the voltage Ve is supplied to the address electrode in synchronization with the rising of the first sustain pulse, and is maintained until the sustain period ends.

(H ≦ t ≦ p) The sustain pulse of the voltage Vs is supplied to the odd Y electrode and the even X electrode. Odd Y-Odd X
The effective voltage of the pixel between the electrodes is Vs + Vwall, and the even Y
The effective voltage of the pixel between the even X electrodes is Vs-Vwall, and the effective voltage of the pixel between the odd X and even Y electrodes and between the even X and odd Y electrodes is 2 Vwall. The following relationship is satisfied: Vs <Vfxy <Vs + Vwall, 2Vwall <Vfxy, a sustain discharge is generated between the odd-numbered Y-odd-numbered X electrodes, and a wall charge of the opposite polarity is generated to terminate the discharge. No sustain discharge occurs between the other electrodes. Therefore, only the odd display rows L1 and L5 in the odd field are displayed. No sustain discharge occurs between the even-numbered Y electrode and the even-numbered X electrode only at the first time.

(Q ≦ t ≦ r) A sustain pulse of the voltage Vs is supplied to the odd X electrodes and the even Y electrodes. Odd number X-odd number Y
The effective voltages of the pixels between the electrodes and between the even Y and even X electrodes are both Vs + Vwall, and the effective voltages between the odd Y and even X electrodes and between the odd X and even Y electrodes are zero. As a result, a sustain discharge is generated between the odd-numbered X-odd-numbered Y electrodes and between the even-numbered Y-even-numbered X electrodes, and wall charges of the opposite polarity are generated to terminate the discharge. No sustain discharge occurs between the other electrodes. Therefore, the display of all the odd display rows L1, L3, L5 and L7 of the odd field is simultaneously enabled.

Thereafter, the same sustain discharge as described above is repeated. In this case, as is apparent from the wall charges described in FIG. 7, the effective voltage of the pixel between the odd Y-even X electrodes and the pixel between the odd X-even Y electrodes in the non-display row is zero. The sustain discharge at the end of the sustain period causes the polarity of the wall charges to be in the state at the beginning of the reset period. Next, the operation in the even field will be described.

In FIG. 1, in the odd field, the electrodes Y1 to Y4 and the electrodes X1 to X4 adjacent to the upper side in FIG.
The display of the line display lines L1, L3, L5 and L7 in pairs with X4 is enabled. In the even-numbered field, a pair of rows of electrodes Y1 to Y4 and electrodes X2 to X5 adjacent to the lower side of FIG.
The display of 2, L4, L6, and L8 may be enabled. In this case, the roles of the electrodes X1 and X2 with respect to the electrode Y1 are reversed, the roles of the electrodes X2 and X3 with respect to the electrode Y2 are reversed, and so on. That is, the voltage waveforms supplied to the grouped odd X electrodes and even X electrodes may be interchanged. FIG. 8 shows such an electrode applied voltage waveform in an even field.

The operation in the even-numbered field is clear from the above description and FIG. 8. In summary, the overall write discharge W and the full self-erase discharge E are performed in the reset period.
In the address period, the electrodes Y1 to Y4 are sequentially selected, and write discharge of display data is performed in the order of the display rows L2, L4, L6, and L8. In the sustain period, these display rows L2,
Simultaneous sustain discharges at L4, L6 and L8 are repeated.

According to the driving method of the first embodiment, since the display row of the odd field and the display row of the even field do not affect each other with respect to the discharge, the PDP is replaced with the PD of FIG.
1 in which the partition walls 191 to 199 are removed from the P10Q, the PDP 10 can be easily manufactured and inexpensive, and the pixel pitch can be reduced to achieve high definition.

[Second Embodiment] In FIG. 7 and FIG.
If the number of pulses can be reduced, power consumption can be reduced. In the address period, the odd X electrode and the even X
If the pulse supplied to the electrode can be made continuous,
The number of pulses can be reduced. To achieve this, the scanning order may be as shown in FIG. That is, the display rows L1, L3, L5, and L7 in the odd-numbered field are further divided into odd-numbered rows and even-numbered rows. The same applies to the even field as to the odd field.

FIG. 9 shows a schematic configuration of a plasma display device 20A of the second embodiment for performing such a method. In the address period, the electrodes Y1, Y3,
In order to scan in the order of Y2 and Y4, the driver 232 is used.
The output terminal of (2) is connected to the electrode Y3 and the driver 232
The output terminal of (3) is connected to the electrode Y2. In the scanning circuit 23A, the output terminal of the odd Y sustain circuit 24 is connected to the input terminals of the driver 232 (1) and the driver 232 (2), and the output terminal of the even Y sustain circuit 25 is connected to the driver 232 (3) and the driver 232 ( 4) is different from the scanning circuit 23 of FIG. 4 in that it is connected to the input terminal of 4).
Accordingly, the odd X sustain circuit 26A and the even X
The sustain circuit 27A outputs a signal such that voltage waveforms applied to the odd-numbered X electrodes and the even-numbered X electrodes are as shown in FIGS.

The odd X electrode and the even X electrode respectively
Since it is sufficient to supply one wide pulse in each address period of the odd field and the even field, the power consumption can be reduced as compared with the case of FIG. 4, and the odd X sustain circuit 26A and the even X sustain circuit 27 can be supplied.
A is composed of an odd X sustain circuit 26 and an even X
This is simpler than the sustain circuit 27.

The other points are the same as in the first embodiment. [Third Embodiment] In FIG. 7, electrodes X1, X3 and X
5, a pulse of a voltage Vx is supplied commonly to the electrodes X2 and X4, and a pulse of a voltage Vx is supplied commonly to the electrodes X2 and X4.
It is sufficient to supply the pulse of the voltage Vx by sequentially selecting the electrodes X1 to X4 when sequentially selecting 1 to Y4. By doing so, the number of pulses supplied to the electrodes is reduced, so that power consumption can be reduced.

Therefore, in the plasma display device 20B of the third embodiment, as shown in FIG. 12, the scanning circuit 30 is provided also for the X electrode. The scanning circuit 30 has only one component more than the scanning circuit 23 in configuration. In the address period, '1' is supplied from the control circuit 21A to the shift register 301 to the data input terminal of the bit 301 (1) in the odd field, and '1' is supplied to the data input terminal of the bit 301 (2) in the even field. Supplied. During the reset period and the sustain period, the output of the shift register 301 is set to 0.

The other points are the same as in the first embodiment. According to the third embodiment, only necessary pulses are supplied to the X electrodes during the address period, and the power consumption is reduced as compared with the first embodiment. Fourth Embodiment The drive voltage waveforms shown in FIGS. 7 and 8 are the same as each other. If the control signal for obtaining the same drive voltage waveform is output from a common circuit, the circuit configuration is simplified. become.

Therefore, in the fourth embodiment of the present invention, the plasma display device 20C is configured as shown in FIG. In this device, sustain circuits 31, 32 and a switching circuit 33 are used instead of the odd Y sustain circuit 24, the even Y sustain circuit 25, the odd X sustain circuit 26, and the even X sustain circuit 27 in FIG. Output voltage waveforms S1 and S2 of sustain circuits 31 and 32
Are respectively equal to the applied voltage waveforms of the odd-numbered X electrode and the even-numbered X electrode in FIG. 7 as shown in FIG. FIG.
, The changeover circuit 33 includes an interlocking changeover switch 33
1 and 332 and interlocking changeover switches 333 and 33
4 and interlocking changeover switches 335 and 336. The changeover switch is constituted by, for example, an FET.
Switching control of the switching circuit 33 is performed by the control circuit 21B.

In the state shown, the drivers 232 (1) to 232 (1)
232 (4) is supplied with 0 V to the input terminal of the driver 28
1 and 282 have voltage waveforms S1 and S2 respectively.
2 are supplied. This corresponds to the reset period and the address period in FIGS. When the changeover switches 331 and 332 are switched from the state of FIG. 13, the voltage waveforms S2 and S1 are supplied to the input terminals of the odd element and the even element of the driver 232, respectively, and correspond to the sustain period of FIG.

From this state, the changeover switches 335 and 33
When the switch 6 is switched, the voltage waveforms S2 and S1 are supplied to the input terminals of the drivers 281 and 282, respectively, corresponding to the sustain period in FIG. According to the plasma display device 20C of the fourth embodiment, the same operation as the device of FIG. 4 can be performed with a simpler configuration than the device of FIG.

[Fifth Embodiment] The features of the apparatus shown in FIG.
It can also be applied to the device of FIG. FIG. 15 shows a plasma display device 20D to which this is applied as a fifth embodiment of the present invention. Sustain circuits 31, 32
The switching circuit 33 performs the same operation as in FIG. 13 based on the control signal from the control circuit 21C.

According to the plasma display device 20D of the fifth embodiment, the same operation as the device of FIG. 12 can be performed with a simpler configuration than the device of FIG. [Sixth Embodiment] In each of the above embodiments, the entire write discharge W and the full self-erasing discharge E are performed in the reset period for each subfield of the odd field in FIG. 5 even though the even field is not displayed. This causes the display quality of black display to deteriorate due to invalid light emission. The same applies to the even field. In the sixth embodiment, in order to reduce this invalid light emission, a voltage having a waveform as shown in FIGS. 16 and 17 is supplied to the electrodes.

The first subfield of FIG. 16 is the same as that of FIG. 7, and light emission by the full write discharge W and the full self erase discharge E also occurs in the non-display row in the reset period. This is because display is performed in the immediately preceding even-numbered field, and wall charges exist, so that it is necessary to eliminate them. However, since no discharge occurs in the non-display row during the address period and the sustain period, it is not necessary to generate the writing discharge W and the self-erasing discharge E in the non-display row during the reset period after the second subfield of the odd field. .

Therefore, during the reset period after the second subfield of the odd field, the cancel pulse PC of the voltage Vs is supplied to the even Y electrode adjacent to the odd X electrode, so that the voltage between the odd X and even Y electrodes is reduced. Voltage to V
fxy-Vwall to prevent discharge. At this time, if a write pulse of the voltage Vw is supplied to the even-numbered X electrodes, no discharge occurs between the even-numbered X-even-numbered Y electrodes in the display row, so the application time of the write pulse is changed from t = a to b to t = c. To d. As a result, a discharge is generated between the odd-numbered Y electrode and the even-numbered X electrode, which is a non-display row. Therefore, the cancel pulse PC of the voltage Vs is further supplied to the odd-numbered Y electrode. This cancel pulse PC
Does not affect the writing discharge between the odd X-odd Y electrodes since it is shifted on the time axis from the writing pulse supplied to the odd X electrodes.

At t = ab and t = cd, odd X
A pulse of the voltage Vaw is supplied to the address electrode in accordance with the write voltage supplied to the electrode and the even-numbered X electrode. The operation after t = d is the same as when the cancel pulse PC is not supplied. The reset period of the third and subsequent subfields and the odd field is the same as the reset period of the second subfield.

The case of the even field is the same as that of the odd field, and this is shown in FIG. In the case of the even-numbered field, the voltage waveforms supplied to the odd-numbered X electrodes and the even-numbered X electrodes in FIG. 16 may be replaced with each other for the same reason as described in the first embodiment. Seventh Embodiment FIG. 18 shows a plasma display device 20E according to a seventh embodiment of the present invention.

The schematic structure of the PDP 10A is the same as that of the PDP shown in FIG.
10, but the way of using the electrodes is different from that of FIG. That is, the electrodes Y1, Y2, and Y3 are not divided into odd and even groups, one electrode X1, X3, and X5 adjacent to the electrodes Y1 to Y3 is an odd X electrode, and the other electrodes X2, X4, and X6 are As even X electrodes, electrode pairs (Y1, X1), (Y2, X3) and (Y3, X5)
And the electrode pairs (Y1, X2), (Y2, X
4) and interlaced display with even display lines of (Y3, X6).

A complete non-display row is formed between the even-numbered X-odd-numbered X electrodes. However, since two display rows are formed by three parallel electrodes and no partition wall is provided in parallel with the surface discharge electrodes, FIG. Thus, the pixel pitch can be made shorter than in the case where two display rows are formed by four parallel electrodes and partition walls are provided in parallel with the surface discharge electrodes, and high definition can be achieved. Further, since the electrodes Y1 to Y3 are not divided into even numbers and odd numbers, the configuration is simpler than in the first embodiment.

FIG. 19 shows a longitudinal section along the address electrodes of the PDP 10A of FIG. The difference from the configuration of FIG. 2 is that, for the electrodes X1 and X2 on both sides of the electrode Y1, the metal electrodes 131 and 133 are transparent electrodes 121 and 1 respectively.
23, on the side remote from the electrode Y1. The same applies to both sides of the other Y electrodes. By doing so, for example, when a voltage is supplied between the X1 and Y1 electrodes, the electric field on the electrode X1 becomes stronger on the metal electrode 131 side, so that even if the electrode pitch is narrowed for higher definition, The pixel area can be made substantially wider than when the metal electrode 131 is formed at the center line of the transparent electrode 121. Since the non-display row is formed on the opposite side of the electrodes X1 and X2 from the electrode Y1, there is no problem in this case, and the non-display row can be substantially narrowed. In FIG. 19, the width of the transparent electrode 122 is
Although the width is the same as that of the electrode 23, the power consumption of the electrode Y1 to which the scanning pulse is supplied can be reduced by reducing the width.

In FIG. 18, the scanning circuit 23B, the odd-numbered sustain circuit 26B and the even-numbered sustain circuit 27B correspond to the scanning circuit 23 and the odd-numbered sustain circuit 2 in FIG.
6 and the even X sustain circuit 27. FIG.
In comparison with the above, one Y sustain circuit 2 is used instead of the odd Y sustain circuit 24 and the even Y sustain circuit 25.
Since 4A may be used, the configuration is simplified.

FIG. 20 shows the display row scanning order in the address period. Since the even X-odd X electrodes are completely non-display rows, if one frame is divided into odd fields and even fields as shown in FIG. 6A, the ratio of the display rows in each field is reduced to 1/3. , Which is not preferable in terms of display quality. The problem is that in odd frames, scanning is performed in the order of display rows L1, L3, and L5, and only display data of odd fields is written.
The problem is solved by scanning in the order of 2, L4 and L6 and writing only the display data of the even field. In this case, the frame configuration corresponding to FIG. 5 is as shown in FIG.

FIG. 22 shows an electrode applied voltage waveform in an odd frame when there are four Y electrodes. In the reset period, a full write discharge W and a full self erase discharge E occur in the display rows L1 to L6 of FIG. 20, but no discharge occurs in a completely non-display row because the voltage between the even X-odd X electrodes becomes 0. . This is different from the case of FIG.

In the address period, since the electrodes Y1 to Y4 are sequentially scanned, one pulse having a wide width is supplied to the odd-numbered X electrodes, so that the power consumption can be reduced as compared with the case of FIG. In the sustain period, a sustain pulse of the voltage Vs is periodically supplied to the Y electrode, a pulse train having the phase of this pulse train shifted by 180 ° is supplied to the odd X electrode, and an AC sustain pulse is supplied between the odd XY electrodes. Is supplied, and a sustain discharge occurs as in the case of the first embodiment. The even X electrodes are brought to 0V,
As a result, no AC is supplied to the non-display rows between the even-numbered XY electrodes and between the even-numbered and odd-numbered X electrodes, and no discharge occurs between these electrodes.

FIG. 23 shows an electrode applied voltage waveform in an even frame. This waveform is obtained by replacing the voltage waveforms supplied to the odd X electrodes and the even X electrodes in FIG. 22 with each other. According to the seventh embodiment, the interlaced scanning for alternately displaying the odd-numbered frames and the even-numbered frames can shorten the address period by half compared with the case of the non-interlaced scanning. Accordingly, it is possible to increase the number of sub-frames to increase the number of gradations, or to increase the number of sustain discharges to increase the luminance.

[Eighth Embodiment] FIG. 24 shows an eighth embodiment of the present invention.
3 shows a vertical cross section of a part of the PDP 10B of the embodiment along an address electrode. The difference from FIG. 19 is that the electrode Y <b> 1 is composed of only the metal electrode 132 and the transparent electrode 122 is omitted. The same applies to other Y electrodes. Thereby, as described above, the power consumption when the scanning pulse is supplied to the Y electrode is reduced. Further, the pixel pitch can be further reduced.

[Ninth Embodiment] In a discharge for erasing wall charges in a reset period, an address discharge is likely to occur due to a priming effect, and an address discharge voltage can be reduced. However, since discharge light emission occurs on the entire surface, the quality of black display deteriorates. Therefore, in the ninth embodiment, a PDP 10C as shown in FIG. 25 is used to reduce invalid light emission.

The PDP 10C has blind rows B1 to B3 every other electrode between the electrodes of the PDP 10 in FIG. Since the blind rows B1 to B3 are completely non-display rows, non-interlace scanning is performed on the display rows L1 to L4. The blind films (light-shielding masks) 41 to 41 prevent the ineffective light emission in the blind rows B1 to B3 from leaking to the observer side.
43 is formed on the glass substrate 11 corresponding to or between the transparent electrode 121 and the transparent electrode 122 in FIG. 2, for example.

FIG. 26 shows the voltage waveforms applied to the electrodes in the reset period and the sustain period in which the address period is omitted. In the figure, PE is an erase pulse, PW is a write pulse,
PS is a sustain pulse. In the reset period, first, an erase pulse PE having a lower voltage than the sustain pulse is supplied to the odd X electrodes and the odd Y electrodes, and all the blind rows B1 to B
At 3, erasing discharge is performed on the wall charges. Then, even X
A write pulse PW having a higher voltage than the sustain pulse is supplied to the electrodes and the even-numbered Y electrodes.
1 to B3, a write discharge is performed, and all the blind rows B1
The wall charges at B3 become almost uniform. The voltage of the write pulse PW is equal to or higher than the discharge start voltage but lower than the voltage Vw of FIG. 7, and no self-erasing discharge occurs after the fall of the write pulse PW. Then, the erasing pulse PE is again supplied to the odd-numbered X electrode and the odd-numbered Y electrode, and the erasing discharge is performed on the wall charges in all the blind rows B1 to B3.
Due to such a discharge in the reset period, space charges that have not been completely recombined flow into the display rows L1 to L4, and an address discharge in the address period is likely to occur.

In the reset period, since the voltage between the electrodes XY of all the display rows L1 to L4 is 0 V, no discharge is performed, and the occurrence of invalid light emission and the deterioration of black display quality are prevented. The electrode applied voltage waveform during the address period is represented by display rows L1 to L4.
Is the same as before, or the odd field in FIG.
It is the same as when it is regarded as a frame. The sustain period is the same as in FIG.

Although higher definition is prevented by the blind rows B1 to B3 than in the first embodiment, it is not necessary to form the partitions 191 to 196 as compared with the conventional configuration of FIG. And the pixel pitch can be further reduced. Note that the reset period may be the same as the reset period in FIG. 7 to perform the entire write discharge and the entire self-erase discharge.

Further, even in a driving type PDP in which no discharge is performed in the blind rows B1 to B3, the blind film 41
-43 is made darker than the phosphor, preferably black, so that external light can be transmitted to the blind films 41 to 4.
3, the contrast of the image is improved as compared with the case where outside light is reflected by the phosphors in the blind rows B1 to B3 and enters the eyes of the observer in a bright place.

[Tenth Embodiment] FIGS. 27A to 27E
Indicates an address electrode according to the tenth embodiment of the present invention. FIG. 27A is a plan view, and FIGS. 27B to 27E are respectively along the BB line, CC line, DD line, and EE line in FIG. 27A. FIG. FIGS. 28B and 28E also show the configuration around the address electrode, and the configuration of other portions can be easily understood from the relationship with FIG.

A pair of address electrodes A11 and A21 are formed on the glass substrate 16 corresponding to the address electrode A1 of FIG. Pads B11, B21 and B31 are formed in the body corresponding to each pixel (single color).
The address electrode A11 is connected to the pad B21 via the contact C21, and the address electrode A21 is
11 and C31 through pads B11 and B3, respectively.
1 connected. That is, every other pad arranged in one row is connected to the address electrodes A11 and A21. Other address electrodes Akj, pads Bij and contacts Cij, k = 1, 2, i = 1 to 3, j = 1,
The same applies to No. 2.

With such a configuration, arbitrary odd-numbered rows and even-numbered rows, for example, rows of pads B11 to B13 and pads B21
To B23 at the same time and the address electrodes A11 to A11 are selected.
Address pulses for the rows of pads B21 to B23 can be supplied to A13, and simultaneously address pulses for the rows of pads B11 to B13 can be supplied to address electrodes A21 to A23.

Therefore, the address period can be reduced to half of the conventional one, and the sustain discharge period can be lengthened accordingly.
This makes it possible to increase the number of sub-frames to increase the number of gradations, or increase the number of sustain discharges to increase the luminance. The tenth embodiment is applicable to various types of PDPs. [Eleventh Embodiment] FIG. 28 shows an address electrode according to an eleventh embodiment of the present invention. FIG. 28A is a plan view,
FIGS. 28B to 28E respectively show B- in FIG. 28A.
It is sectional drawing along the B line, CC line, DD line, and EE line. FIG. 28B also illustrates the configuration around the address electrodes.

In this embodiment, four address electrodes are formed between the partition walls, pads are formed above and in the phosphor, and one row of pads is connected to four electrode lines in order. In FIG. 28, A11 to A43 are address electrodes, B11 to B43 are pads, and C11 to C43 are contacts. According to the address electrode having such a configuration, it is possible to simultaneously select any two odd rows and any two even rows and supply the address pulse.

[Twelfth Embodiment] FIG. 29 shows a schematic structure of an address electrode according to a twelfth embodiment of the present invention. In this embodiment, the display surface is divided into two regions 51 and 52,
The address electrode A11 is connected to a pad belonging to the region 51, and the address electrode A21 is connected to a pad belonging to the region 52. The same applies to other address electrodes and pads.

According to such a configuration, an address pulse can be supplied by simultaneously selecting an arbitrary display row belonging to the area 51 and an arbitrary display row belonging to the area 52.
The present invention also includes various modified examples. For example, in the above embodiment, the case where the address electrode, the X electrode, and the Y electrode are formed on the substrate facing each other via the discharge space has been described. However, the present invention has a configuration in which these are formed on the same substrate side. It is also applicable to

In the above embodiment, the case where the wall charges are entirely erased in the reset period and the wall charges are written in the pixels to be turned on in the address period has been described. Can be also applied to a configuration in which the wall charge is erased from the pixels which are to be turned off during the address period by writing the entire area.

In FIG. 1, the metal electrode 131 is
It may be formed on the back side of the transparent electrode 121, the front side and the back side of the transparent electrode 121, or inside the transparent electrode 121. This is the same for all the metal electrodes in FIGS. 1, 19 and 24.

[Brief description of the drawings]

FIG. 1 is a schematic configuration diagram of a surface discharge type PDP according to a first embodiment of the present invention.

FIG. 2 is a perspective view showing a state in which a space between opposing surfaces of color pixels of the PDP in FIG. 1 is widened.

FIG. 3 is a longitudinal sectional view of a color pixel of the PDP of FIG. 1 along an electrode X1.

FIG. 4 is a block diagram showing a schematic configuration of the plasma display device according to the first embodiment of the present invention.

FIG. 5 is a diagram showing a configuration of a frame.

FIGS. 6A and 6B are diagrams showing a display row scanning order in an address period.

FIG. 7 shows a PDP driving method according to an embodiment of the present invention.
FIG. 9 is a waveform diagram of an electrode applied voltage in an odd field.

FIG. 8 shows a PDP driving method according to an embodiment of the present invention.
FIG. 7 is a waveform diagram of an electrode applied voltage in an even field.

FIG. 9 is a block diagram illustrating a schematic configuration of a plasma display device according to a second embodiment of the present invention.

FIG. 10 is a diagram showing electrode applied voltage waveforms in odd fields, showing the PDP driving method according to the second embodiment of the present invention.

FIG. 11 is a diagram showing electrode applied voltage waveforms in an even-numbered field, showing the PDP driving method according to the second embodiment of the present invention.

FIG. 12 is a block diagram illustrating a schematic configuration of a plasma display device according to a third embodiment of the present invention.

FIG. 13 is a block diagram illustrating a schematic configuration of a plasma display device according to a fourth embodiment of the present invention.

14 is a diagram showing output voltage waveforms of the sustain circuits 31 and 32 in FIG. 13 together with voltage waveforms applied to address electrodes in odd fields in FIG. 7;

FIG. 15 is a block diagram illustrating a schematic configuration of a plasma display device according to a fifth embodiment of the present invention.

FIG. 16 is a diagram showing electrode applied voltage waveforms in odd fields, showing a PDP driving method according to a sixth embodiment of the present invention.

FIG. 17 is a diagram showing electrode applied voltage waveforms in an even-numbered field, showing the PDP driving method according to the sixth embodiment of the present invention.

FIG. 18 is a block diagram illustrating a schematic configuration of a plasma display device according to a seventh embodiment of the present invention.

19 is a longitudinal sectional view of a part of the PDP of FIG. 18 along an address electrode.

FIG. 20 is a diagram showing a display row scanning order in an address period.

FIG. 21 is a diagram illustrating a configuration of a frame.

FIG. 22 is a diagram showing electrode applied voltage waveforms in an odd-numbered frame, showing the PDP driving method according to the seventh embodiment of the present invention.

FIG. 23 is a diagram showing electrode applied voltage waveforms in an even-numbered frame, showing the PDP driving method according to the seventh embodiment of the present invention.

FIG. 24 is a longitudinal sectional view of a part of a PDP according to an eighth embodiment of the present invention, taken along an address electrode.

FIG. 25 is a schematic configuration diagram of a surface discharge type PDP according to a ninth embodiment of the present invention.

FIG. 26 is a schematic electrode applied voltage waveform diagram showing a PDP driving method according to a ninth embodiment of the present invention.

FIG. 27A is a plan view showing an address electrode according to a tenth embodiment of the present invention, and FIGS. 27B to 27E are respectively BB line, CC line, and D line in FIG. It is sectional drawing along the -D line and the EE line.

FIG. 28A is a plan view showing an address electrode according to the eleventh embodiment of the present invention, and FIGS. 28B to 28E are respectively BB line, CC line, and D line in FIG. It is sectional drawing along the -D line and the EE line.

FIG. 29 is a schematic configuration diagram of an address electrode according to a twelfth embodiment of the present invention.

FIG. 30 is a schematic configuration diagram of a conventional surface discharge type PDP.

FIG. 31 is a schematic configuration diagram of another conventional surface discharge type PDP.

[Explanation of symbols]

 10, 10A to 10C PDP 11, 16 Glass substrate 121 to 123 Transparent electrode 131 to 133 Metal electrode 14 Dielectric 15 MgO protective film 171 to 177 Partition wall 181 to 183 Phosphor 20, 20A to 20E Plasma display device 21, 21A to 21D Control circuit 22 Address circuit 221, 231, 301 Shift register 222 Latch circuit 223, 232, 232A, 28, 302 Driver 23, 23A, 23B Scan circuit 24 Odd Y sustain circuit 24A Y sustain circuit 25 Even Y sustain circuit 26, 26A Odd X sustain circuit 27, 27A Even X sustain circuit 31, 32 Sustain circuit 33 Switching circuit 331-336 Switch A1-A6 Address electrode X1-X5, Y1-Y4 Electrode L1-L5 Display row B1 ~ B3 Blind line

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Fumitaka Asami 4-1-1, Uedanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Inside Fujitsu Limited (72) Inventor Yoshio Ueda 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture No. 1 Fujitsu Co., Ltd. (72) Tomokatsu Kishi 4-1-1, Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa Prefecture Fujitsu Co., Ltd. (72) Shigetoshi Tomio 4-1-1 Kamiodanaka, Nakahara-ku, Kawasaki-shi, Kanagawa No. 1 Inside Fujitsu Limited (56) References JP-A-5-2993 (JP, A) JP-A-2-220330 (JP, A) (58) Fields investigated (Int. Cl. ⁶ , DB name) G09G 3/00-3/38 G09F 9/00-9/46 H01J 11/00-17/64

Claims (28)

(57) [Claims] 1. A plurality of X electrodes and a plurality of Y electrodes are mutually connected.
Arranged in parallel and with each Y electrode sandwiched between the X electrodes
And intersect with the X electrode and the Y electrode separately.
Plasma display with multiple address electrodes
A method of driving a panel, wherein each of the Y electrodes and one of the X electrodes adjacent to the respective Y electrode
A first display step of performing display by discharging during the
Between the pole and each of the other X electrodes adjacent to each of the Y electrodes.
The second display step of performing display by electricity is temporally separated.
Driving method for plasma display panel
Law. 2. The X electrode and the Y electrode cross each other.
Are mutually arranged, the first display step, said address which is selected in accordance with the display data and the respective Y electrodes
Address discharge is performed sequentially with the
An address discharge triggers the Y electrode and the adjacent one
Discharge between the other X electrode,
An address period for accumulating wall charges, and an AC sustaining pulse between each of the Y electrodes and one of the X electrodes.
And maintained between each of the Y electrodes and one of the X electrodes.
A sustain period in which a discharge is performed, and the second display step includes the Y address and the address selected according to display data.
Address discharge is performed between the gate electrode and the
The other side adjacent to the Y electrode by a dress discharge as a trigger
Discharge between the X electrode of
An AC sustain pulse between an address period for accumulating electric charges and each of the Y electrodes and each of the other X electrodes.
And maintained between each of the Y electrodes and the other of the X electrodes.
2. The plasma display according to claim 1 , further comprising: a sustain period for performing a discharge.
Panel driving method. 3. An address period in the first display step.
Then, the Y electrode and the one X electrode adjacent thereto are
When the potential difference is triggered by the address discharge
Selectively to exceed the discharge start voltage between the X and Y electrodes of
Pulse is applied in the address period in the second display step, the Y electrode
Potential difference between the other X electrode and the adjacent X electrode
Is released between XY electrodes when triggered by an address discharge.
Pulse is selectively applied to exceed the
That, according to claim 2, wherein the plasma display
Panel driving method. 4. A sustain period in the first display step.
Between the Y-electrode applied voltage waveform and the adjacent other
The applied voltage waveform of the other X electrode is in phase, and
The applied voltage waveform of the electrode and the mark of the adjacent one of the X electrodes
The AC sustaining pulse is set so that the
Supplying, in the sustain period in the second display step, the Y electrostatic
The applied voltage waveform of the pole and the applied voltage of the adjacent one X electrode
And the applied voltage waveform of the Y electrode
And the applied voltage waveform of the other adjacent X electrode is in the opposite phase.
3. The plasma display according to claim 2 , wherein the AC sustaining pulse is supplied so that the AC sustaining pulse is supplied.
Panel driving method. 5. The plasma display panel according to claim 1 ,
On the plate, n + 1 X electrodes (X _{1 to} X _{n + 1} ) and n
The Y electrodes (Y _{1 to} Y _n ) are connected to each of i = ₁ to _n.
Can, Y _i electrode is provided between the X _i electrodes and X _{i + 1} electrode
As described above, they are arranged alternately and parallel to each other, and in the address period of the first display step, i = 1 to n
The Y _i electrodes per each i with sequential scanning in that order of,
An address discharge is performed, and in the address period of the second display step, i = 1 to n
The Y _i electrodes per each i with sequential scanning in that order of,
3. The plasma display according to claim 2 , wherein an address discharge is performed.
Panel driving method. 6. An address period in the first display step.
When applying a scanning pulse to the odd-numbered Y _2i-1 electrodes,
The Y _2i-1 electrode and one of the X electrodes adjacent to the Y _2i-1 electrode
XY when the potential difference is triggered by the address discharge
One of the adjacent ones so as to exceed the discharge start voltage between the electrodes.
The scan pulse is applied to each odd-numbered X _2i-1 electrode which is an X electrode.
A pulse Vx having a polarity opposite to that of the Y _2i electrode is applied.
Potential difference between _2i electrode and this next case cormorants said one X electrode
Is released between XY electrodes when triggered by an address discharge.
At one of the adjacent X electrodes so as to exceed the
Each even-numbered X _2i electrode has a polarity opposite to that of the scan pulse.
In the address period of the second display step.
When applying a scanning pulse to the Y _2i-1 electrode, the Y _2i-1 electrode
And the potential difference between the other X electrode and the adjacent X electrode
Discharge start voltage between X and Y electrodes when triggered by
Each other, which is the other adjacent X electrode, so as to exceed the pressure.
A pulse of the opposite polarity to the scanning pulse is applied to the number X _2i electrode.
Vx is applied , and when a scan pulse is applied to the even-numbered Y _2i electrodes,
The potential difference between the _2i electrode and the other adjacent X electrode
Is released between XY electrodes when triggered by an address discharge.
At the other adjacent X electrode so as to exceed the
Each odd-numbered X _2i-1 electrode has a polarity opposite to that of the scan pulse.
6. The plasma display according to claim 5 , wherein a neutral pulse Vx is applied.
Panel driving method. 7. An address period in the first display step.
Te, the time of application of the scan pulse to the Y _i electrodes, the Y _i
The potential difference between the electrode and one of the X electrodes adjacent thereto is
Discharge between X and Y electrodes when triggered by address discharge
Select one of the adjacent X electrodes so as to exceed the starting voltage.
Alternatively, a pulse Vx having a polarity opposite to that of the scanning pulse is applied.
And, in the address period of the second display step, the Y _i electrodeposition
When a scanning pulse is applied to the pole, the Yi electrode and the _Yi electrode
The potential difference between the other X electrode and the other X electrode is
Exceeds the firing voltage between XY electrodes when triggered
As described above, the scanning is selectively performed on the other adjacent X electrode.
The plasma display according to claim 5 , wherein a pulse Vx having a polarity opposite to that of the pulse is applied.
Panel driving method. 8. The plasma display panel according to claim 1 ,
On the plate, n + 1 X electrodes (X _{1 to} X _{n + 1} ) and n
The Y electrodes (Y _{1 to} Y _n ) are connected to each of i = ₁ to _n.
For, Y _i electrodes are provided between the X _i electrodes and X _{i + 1} electrode
In the address period of the first display step.
While the order of the Y _2i-1 electrode and the even-numbered each Y _2i electrodes eye
After performing address discharge by scanning, the other is sequentially scanned.
In the address period of the second display step.
One of each Y _2i-1 electrode of the eye and each of the even-numbered Y _2i electrodes
After performing address discharge by scanning, the other is sequentially scanned.
3. The plasma display according to claim 2 , wherein the address discharge is performed by using
Panel driving method. 9. An address period in the first display step.
While scanning each odd-numbered Y _2i-1 electrode,
_Potential difference between _2i-1 electrode and one of the X electrodes adjacent to it
Is released between XY electrodes when triggered by an address discharge.
At one of the adjacent X electrodes so as to exceed the
Each odd-numbered X _2i-1 electrode has a polarity opposite to that of the scan pulse.
While scanning the even-numbered Y _2i electrodes while applying a positive pulse Vx , the Y _2i electrodes
The potential difference between the adjacent one of the X electrodes is determined by the address.
Start voltage between X and Y electrodes when triggered by discharge
Each of the adjacent X electrodes is an even number
A pulse V having a polarity opposite to that of the scanning pulse is applied to the second X _2i electrode.
x during the address period of the second display step.
While scanning each Y _2i-1 electrode, the Y _2i-1 electrode and the
The potential difference between the adjacent X electrode and the adjacent X electrode is the address discharge.
Exceeds the firing voltage between X and Y electrodes when triggered by
As described above, each of the even-numbered X electrodes
The X _2i electrodes, mark the opposite polarity pulses Vx and the scanning pulse
And pressurizing, while scanning the even-numbered each Y _2i electrodes, and the Y _2i electrode
The potential difference between the adjacent X electrode and the other X electrode is
Start voltage between X and Y electrodes when triggered by discharge
Each odd number being the other adjacent X electrode so that
A pulse of the opposite polarity to the scan pulse is applied to the second X _2i-1 electrode.
9. The plasma display according to claim 8 , wherein Vx is applied.
Panel driving method. 10. The first display step and the second display step.
The process consists of multiple subfields,
Each of the subfields initializes each discharge cell.
Reset period, the address period, and the
And any of the sub-fields
It is characterized that you achieve gradation display by combining
3. A method for driving a plasma display panel according to claim 2,
Law. 11. In the reset period, adjacent reset periods are set.
An entire writing pulse V is applied between the X electrode and the Y electrode.
w in the plurality of subfields in the first display step.
Of the sub-fields other than the first sub-field
In the field reset period, the Y electrode and
A reset discharge occurs between the adjacent X electrode and the other X electrode.
And applying a cancel voltage for inhibiting the plurality of sub-fields in the second display step.
Of the sub-fields other than the first sub-field
In the field reset period, the Y electrode and
A reset discharge occurs between the adjacent one of the X electrodes.
11. The plasma display according to claim 10 , wherein a cancel voltage for prohibiting the operation is applied.
Ipanel drive method. 12. The plasma display panel according to claim 12 ,
n lines of the Y electrodes (Y ₁ to Y _n) is of parallel to each other
Is, and per each i of i = 1 to n, its on both sides of the Y _i electrodes
An X _2i-1 electrode and an X _2i electrode are disposed, respectively, and the first display step includes the Y electrode and the address selected according to display data.
Address discharge is performed sequentially with the
An address discharge triggers the Y electrode and the adjacent one
Discharge between the other X electrode, X _2i-1 electrode,
Between an address period for accumulating wall charges necessary for sustain discharge and each of the Y electrodes and one of the X electrodes, ie, the X _2i-1 electrodes.
To each of the Y electrodes and one of the X electrodes.
Suspension for performing sustain discharge between each X _2i-1 electrode
And the second display step includes the step of selecting the address selected according to each of the Y electrodes and display data.
Address discharge is performed between the gate electrode and the
The other side adjacent to the Y electrode by a dress discharge as a trigger
Discharge between the X electrode and the X _2i electrode
An address period for accumulating wall charges required for discharge and an interval between each of the Y electrodes and each of the other X electrodes, that is, the X _2i electrodes.
An AC sustaining pulse is supplied to each of the Y electrodes and the other X electrode.
Sustain discharge for sustain discharge between each _X2i electrode
2. The plasma display according to claim 1 , further comprising:
Panel driving method. 13. The address period in the first display step.
Between the Y electrode and the one X electrode adjacent thereto
If the potential difference between the
Pulse so as to exceed the discharge starting voltage between the XY electrodes
Is applied and the Y electrode and the other
Potential difference between the two X electrodes is triggered by the address discharge.
Not exceed the firing voltage between the X and Y electrodes
Then, the potential of the other X electrode is maintained, and during the address period in the second display step, the Y electrode is turned off.
The potential between the pole and the other X electrode adjacent to the pole
Difference between XY electrodes when difference is triggered by address discharge
When a pulse is applied to exceed the firing voltage,
Between the Y electrode and one of the X electrodes adjacent thereto.
X- when the potential difference between them is triggered by an address discharge
In order not to exceed the discharge start voltage between the Y electrodes, the one X
13. The plasma display according to claim 12 , wherein the potential of the pole is maintained.
Ipanel drive method. 14. The sustain in the first display step.
In the period, the Y electrode and the one X electrode adjacent thereto are
Apply the AC sustaining pulse between the pole and
Potential between the Y electrode and the other X electrode adjacent to the Y electrode
The difference is set so that the difference does not exceed the discharge start voltage between the XY electrodes.
The potential of the other X electrode is maintained, and during the sustain period in the second display step, the Y electrode is turned off.
Between the electrode and the other adjacent X electrode.
A current maintaining pulse is applied, and the Y electrode and the adjacent Y electrode are
The potential difference between the one X electrode and the other X electrode is the XY electrode
Of the one X electrode so that the discharge start voltage does not exceed
13. The plasma display according to claim 12 , wherein the position is maintained.
Ipanel drive method. 15. The first display step and the second display step.
The process consists of multiple subfields,
Each of the subfields initializes each discharge cell.
Reset period, the address period, and the
And any of the sub-fields
It is characterized that you achieve gradation display by combining
13. A method for driving a plasma display panel according to claim 12.
Law. 16. One frame is displayed in the first display step.
Odd field and the even field in the second display step.
2. The apparatus according to claim 1, wherein
Plasma display panel driving method. 17. A plurality of X electrodes and a plurality of Y electrodes are connected to each other.
In parallel with each other and with each Y electrode sandwiched between the X electrodes.
And intersect with the X and Y electrodes at a distance.
Plasma display with multiple address electrodes
A splay panel, each of the Y electrodes, and each of the Y electrodes adjacent to the Y electrode in the first display period.
The display is performed by the discharge between one of the X electrodes, and the first
In the second display period temporally separated from the display period,
Between the pole and each of the other X electrodes adjacent to each of the Y electrodes.
The X electrode and the Y electrode are driven so that the
And a moving electrode drive circuit . 18. On the plasma display panel
The X electrode and the Y electrode are alternately arranged with each other,
In the first display period, the electrode drive circuit selects the Y electrodes in accordance with the display data in the address period.
Address discharge sequentially between the selected address electrodes
And the Y-electrode is triggered by the address discharge.
And discharge between the adjacent one of the X electrodes,
The wall charges necessary for the sustain discharge are accumulated, and during the sustain period, each of the Y electrodes and one of the X electrodes are connected.
An AC sustaining pulse is supplied between each of the Y electrodes and each of the one
A sustain discharge is performed between the electrodes and the X electrodes, and in the second display period, selection is made in the address period according to each of the Y electrodes and display data.
Address discharge between the address electrodes
And the Y-electrode is triggered by the address discharge.
A discharge is caused between the adjacent X electrode and the
Accumulates wall charges necessary for sustaining discharge, and connects each Y electrode and the other X electrode during a sustain period.
An AC sustaining pulse is supplied between each of the Y electrodes and the other of the other.
18. The plasma display according to claim 17 , wherein a sustain discharge is performed with the X electrode.
A device. 19. An electrode drive circuit comprising : an address circuit for driving the address electrode; and an electrode circuit for scanning the Y electrode during the address period.
And the odd-numbered Y electrodes during the sustain period.
Odd Y sustain for applying the AC sustaining pulse
Circuit and the even-numbered Y electrodes during the sustain period.
Even Y sustaining times for applying AC sustaining pulse
Path and the odd-numbered X electrodes during the sustain period.
Odd number X sustaining times for applying AC sustaining pulse
And the even numbered X electrodes during the sustain period.
Even number X sustaining times for applying AC sustaining pulse
Purazumade of claim 18, characterized in that it comprises a road, a
Display device. 20. The method according to claim 19, wherein the electrode driving circuit is configured to control the address period.
A scanning circuit for scanning the X electrode between
20. The plasma display according to claim 19, wherein
Play equipment. 21. A first sustaining circuit for supplying a first AC sustaining pulse.
And the first AC sustaining pulse is 180 ° out of phase with the first AC sustaining pulse.
A second sustain circuit for generating two AC sustain pulses, an odd-numbered Y electrode, an even-numbered Y electrode, and an odd-numbered Y electrode.
The first X-electrode and the even-numbered X-electrode of the first
Select one of the AC sustain pulse and the second AC sustain pulse
And a switching circuit for supplying the odd number in the sustain period of the first display period.
Maintaining the first alternating current on the eye Y electrode and the even-numbered X electrode
A pulse is supplied, and the even-numbered Y electrodes and the
The second AC sustain pulse is supplied to odd-numbered X electrodes.
In the sustain period of the second display period, the odd number
Maintaining the first AC on the Y electrode of the eye and the odd X electrode
A pulse is supplied, and the even-numbered Y electrodes and the
The second AC sustaining pulse is supplied to the even-numbered X electrodes.
In so that, Purazumade of claim 18, characterized in that it comprises a control circuit for controlling the 該Su switching circuit, the
Display device. 22. The electrode driving circuit, comprising:
A scanning circuit for scanning the X electrode between
22. The plasma display according to claim 21, wherein
Play equipment. 23. On the plasma display panel
Both the X electrode and the Y electrode are transparent on the substrate.
A bright electrode and the transparent electrode along the center line of the transparent electrode.
And a metal electrode having a smaller width than the transparent electrode.
19. The plasma display according to claim 18, wherein
A device. 24. The plasma display panel,
n lines of the Y electrodes (Y ₁ to Y _n) is of parallel to each other
Is, and per each i of i = 1 to n, its on both sides of the Y _i electrodes
The X _2i-1 electrode and the X _2i electrode are arranged, respectively ,
In the first display period, the electrode drive circuit selects in the address period according to each of the Y electrodes and display data.
Address discharge sequentially between the selected address electrodes
And the Y-electrode is triggered by the address discharge.
And the X _2i-1 electrode which is one of the adjacent X electrodes.
Discharge is performed to accumulate wall charges necessary for sustain discharge, and during the sustain period, the respective Y electrodes and the one X electrode are used.
An AC sustaining pulse is supplied between each X _2i-1 electrode and each Y 2
Maintained between the electrode and each of the X _2i-1 electrodes as one of the X electrodes
Discharge is performed, and in the second display period, selection is made during the address period according to each of the Y electrodes and display data.
Address discharge between the address electrodes
And the Y-electrode is triggered by the address discharge.
Discharge between the other adjacent X electrode, X _2i electrode
Is performed to accumulate wall charges necessary for sustain discharge, and during the sustain period, the respective Y electrodes and the other X electrodes are
An AC sustaining pulse is supplied between each X _2i electrode and each Y electrode
Sustain discharge between the electrode and each of the other X electrodes, that is, the X _2i electrodes.
Implementing, according to claim 17, wherein the plasma display
A device. 25. An electrode drive circuit comprising : an address circuit for driving the address electrode; and an electrode circuit for scanning the Y electrode during the address period.
A scanning circuit for applying the AC voltage to the Y electrode during the sustain period.
A sustaining circuit for applying a sustaining pulse, and an upper electrode on an odd-numbered X electrode during the sustaining period.
Odd number X sustaining times for applying AC sustaining pulse
And the even numbered X electrodes during the sustain period.
Even number X sustaining times for applying AC sustaining pulse
Purazumade of claim 24, characterized in that it comprises a road, a
Display device. 26. On the plasma display panel
Both the X electrode and the Y electrode are transparent on the substrate.
A bright electrode, laminated on the transparent electrode, and wider than the transparent electrode.
Have a narrow metal electrode, and the metal electrode of the Y electrode is arranged along the center line of the transparent electrode.
Is location, the metal electrodes of the X electrodes, the transparent electrodes, away from the Y electrode
25. The device according to claim 24, wherein
Plasma display device. 27. On the plasma display panel
The Y electrode is a metal electrode formed on a substrate, and the X electrode is a transparent electrode formed on the substrate and the transparent electrode formed on the substrate.
A metal electrode laminated on a bright electrode and having a width smaller than that of the transparent electrode
And the metal electrode of the X electrode is separated from the Y electrode of the transparent electrode.
25. The device according to claim 24, wherein
Plasma display device. 28. The method according to claim 28, wherein the electrode driving circuit is configured to perform the first display period
Process the odd fields of one frame between
Processing the even field of the one frame in the indicating step
The plasma display device according to claim 17, wherein
Place.