JP2795059B2 - Amplifier circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an amplifier circuit, and more particularly to an amplifier circuit used for a line driver.

[0002]

2. Description of the Related Art FIG. 3 shows an example of such a conventional amplifier circuit. The conventional example described in FIG.
“MOS Operational Amplifier
r Design-A Tutorial Overv
ie ”, IEEE Journal of Soli
d-State Circuits, VOL. SC-1
7, NO. 6, DEC. , 1982.

In the circuit shown in FIG. 3, reference numerals 11 and 12 denote driving amplifier circuits connected to both ends of the transformer 3, and the amplification factor is 1. The amplifier circuits 11 and 12 are connected to a terminal 1
The balanced input transmission waveform signal input from -5 and 2-5 is transmitted to the transmission line via the transformer 3. The amplifier circuits 11 and 12 are the same type of circuit.
1, 1-2 are driven. Compared to an amplifier circuit using a source follower circuit in the output stage, it is relatively frequently used because it has an advantage that an output voltage range can be widened.

[0004]

However, the conventional amplifier circuit has the following problems. For example, when transmitting "0" in the AMI code to the transmission line, signals of the same potential are input to the input terminals 1-5 and 2-5. At this time, in an ideal state, a potential difference generated between both ends of the transformer 3 should be 0, and therefore, no current flows through the transformer 3. However, in reality, the potential difference generated between both ends of the transformer 3 does not become zero. This is because the amplifier circuits 11 and 12 have input offset voltages due to manufacturing variations, and these vary independently.

It is assumed that the amplifier circuit 11 has a positive input offset voltage and the amplifier circuit 12 has a negative input offset voltage. Transformer 3 is short-circuited in terms of DC,
Since the amplifier circuits 11 and 12 are considered to have substantially the same output impedance, the output of the amplifier circuit 11 decreases and the output of the amplifier circuit 12 increases. Then, the outputs of the operational amplifier circuits 1-1 and 1-2 decrease, and the operational amplifier circuits 2
The output of -1, 2-2 goes up. As a result, the current flowing through the transistors 1-4 and 2-3 decreases, and the transistor 1
The current flowing through -3 and 2-4 increases, and the generated difference current flows from the amplifier circuit 11 to the amplifier circuit 12 via the transformer 3. Since the open loop gain of the operational amplifier circuits 1-1, 1-2, 2-1 and 2-2 is normally about 40 dB,
Even when a slight input offset voltage of about mV occurs, the above phenomenon occurs, and the transistor 1-
Nos. 4 and 2-3 have shallow biases and are cut off in extreme cases. In such a state, the input terminals 1-5,
When the transmission signal waveform is input to 2-5, the response of the cut-off transistors 1-4 and 2-3 becomes extremely slow, causing a problem that the output waveform is disturbed.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional circumstances, and it is therefore an object of the present invention to provide a novel amplifier circuit capable of solving the above-mentioned problems inherent in the prior art. It is in.

[0007]

In order to achieve the above object, an amplifier circuit according to the present invention comprises a first operational amplifier circuit for driving the gate of a P-channel transistor and a second operational amplifier circuit for driving the gate of an N-channel transistor. The second operational amplifier circuit, the inverting input terminal of the first operational amplifier circuit and the inverting input terminal of the second operational amplifier circuit are connected to form an input terminal, and the drain of the P-channel transistor, the drain of the N-channel transistor, A drain current flowing through a P-channel transistor and a drain current flowing through an N-channel transistor are connected to an amplifier circuit that connects the non-inverting input terminal of one operational amplifier circuit to the non-inverting input terminal of the second operational amplifier circuit and serves as an output terminal. means for detecting a differential current between the current, added input offset voltage corresponding to the detected difference current to the output of the first, second operational amplifier circuit And a means.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, preferred embodiments of the present invention will be specifically described with reference to the drawings.

FIG. 1 is a circuit diagram showing a first embodiment according to the present invention. The same portions as those in the conventional example of FIG. 3 are denoted by the same reference numerals. The configuration of the first embodiment shown in FIG. 1 is different from that of the prior art in that reference numerals 1-6 to 1-9 are provided.
And 2-6 to 2-9.

The transistors 1-6 and 1-7 are connected in parallel with the transistors 1-3 and 1-4, and have a drain current flowing through the P-channel transistor 1-3 and a drain current flowing through the N-channel transistor 1-4. This constitutes means for detecting a difference current from the current.

The N-channel transistors 1-8
A means is provided for adding an input offset voltage corresponding to the detected difference current to the output of the operational amplifier circuit 1-2.

The switch 1-9 has a function of disconnecting the transistor 1-8 when unnecessary.

Transistors 2-6 to 2-8, switch 2
-9 has exactly the same configuration as the transistors 1-6 to 1-8 and the switch 1-9.

Next, the operation of the circuit shown in FIG. 1 will be described. As in the case of the conventional example, it is assumed that the amplifier circuit 1 has a positive input offset voltage and the amplifier circuit 2 has a negative input offset voltage. Since the transformer 3 is short-circuited in terms of direct current and the amplifier circuits 1 and 2 are considered to have substantially the same output impedance, the output of the amplifier circuit 1 decreases and the output of the amplifier circuit 2 increases. Then, the outputs of the operational amplifier circuits 1-1 and 1-2 decrease, and the operational amplifier circuits 2
The output of -1, 2-2 goes up. As a result, transistor 1
-4 and 2-3 decrease the current flowing through transistor 1-
The current flowing through 3 and 2-4 increases.

Transistors 1-6, 1-7, 2-6, 2
-7 are transistors 1-3, 1-4, 2-3, 2-
4, the current flowing through transistors 1-6 and 2-7 increases, and transistors 1-7 and 2-7
The current through -6 decreases. Therefore, the potential of the node 1-A rises and the potential of the node 2-A falls.

Assuming that switches 1-9 and 2-9 are closed, transistor 1-8 turns "on" and raises the potential of node 1-B. On the other hand, the transistor 2-8 is turned off, and does not affect the potential of the node 2-B.
As a result, a current flows into the output stage of the operational amplifier circuit 1-2, and an input offset voltage is applied. The input offset voltage, acts in a direction to cancel the inherent input offset voltage amplifier circuit 1 has. Thus, the cutoff of the transistors 1-4 and 2-3 can be prevented.

When a signal is being transmitted to the transmission line, the transistors 1-8 and 2-8 act in a direction to prevent supply of power to the load. The switches 1-9 and 2-9 may be opened.

FIG. 2 is a circuit diagram showing a second embodiment according to the present invention.

Referring to FIG. 2, this second embodiment differs from the first embodiment shown in FIG. 1 in that transistors 1-8 and 2-8 are P-channel transistors,
The point is that the source is connected to the output of the operational amplifier circuits 1-1 and 2-1 respectively. In this case, it is needless to say that the same effects as those of the first embodiment shown in FIG. 1 can be obtained.

[0020]

As described above, according to the amplifier circuit of the present invention, the first operational amplifier circuit driving the gate of the P-channel transistor and the second operational amplifier circuit driving the gate of the N-channel transistor And an inverting input terminal of the first operational amplifier circuit and an inverting input terminal of the second operational amplifier circuit are connected to form an input terminal. The drain of the P-channel transistor, the drain of the N-channel transistor, and the first A drain current flowing through a P-channel transistor and a drain current flowing through an N-channel transistor are supplied to an amplifier circuit that connects a non-inverting input terminal of an operational amplifier circuit to a non-inverting input terminal of a second operational amplifier circuit and serves as an output terminal. Bei means for detecting a difference current, the first input offset voltage corresponding to the detected difference current, and means for applying the output of the second operational amplifier circuit The Rukoto, since the cut-off of the output stage transistor can be prevented, there is an advantage that it is possible to prevent the disturbance of the output waveform.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a first embodiment according to the present invention.

FIG. 2 is a circuit diagram showing a second embodiment according to the present invention.

FIG. 3 is a circuit diagram showing a conventional amplifier circuit.

[Explanation of symbols]

1, 2, amplifying circuit 1-1, 1-2, 2-1, 2-2 ... operational amplifying circuit 1-3, 1-6, 2-3, 2-6 ... P-channel transistor 1-4, 1- 7, 2-4, 2-7, 1-8, 2-8 ... N
Channel transistors 11, 12: amplifier circuit

Claims (1)

(57) [Claims] A first operational amplifier circuit for driving a gate of a P-channel transistor; and a second operational amplifier circuit for driving a gate of an N-channel transistor, wherein an inverted input of the first operational amplifier circuit is provided. Terminal and an inverting input terminal of the second operational amplifier circuit to form an input terminal;
An amplifier circuit comprising a drain of a channel transistor, a drain of the N-channel transistor, a non-inverting input terminal of the first operational amplifier circuit, and a non-inverting input terminal of the second operational amplifier circuit, and an output terminal, Means for detecting a difference current between a drain current flowing through the P-channel transistor and a drain current flowing through the N-channel transistor; and an input offset voltage corresponding to the detected difference current of the first or second operational amplifier circuit . And a means for adding to the output .