JP2769453B2 - Information recording / reproduction method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information recording / reproducing method for recording or reproducing information by an edge recording method.
In particular, the present invention relates to an information recording / reproducing method capable of performing resynchronization for correcting synchronization in a data recording area.

[0002]

2. Description of the Related Art Information recording by an edge recording method, in which data is recorded / reproduced by giving meaning to the positions of the leading edge and the trailing edge of a signal pulse, is suitable for high-density recording. The adoption is considered.

When information is recorded by such an edge recording method, the information is converted into a run length limiting code, and the leading edge and the trailing edge of the signal pulse are formed on a recording medium such as a pit. The data is recorded corresponding to the position.

[0004] In this case, it is necessary to achieve accurate synchronization in data reproduction.

When data is recorded by the edge recording method, for example, when pits are formed by irradiating an optical disk with laser light, the pits may be formed before the pits due to the heat capacity of the recording medium or fluctuations in recording conditions. The edge and the trailing edge may not be at the desired interval and the pit length may fluctuate.
For example, when a pit is provided after a long blank, the position of the leading edge is displaced to a delayed position, and when a blank is provided after a long pit, the position of the trailing edge is displaced to a delayed position. With such a displacement,
A state occurs in which the relative positional relationship between the leading edge data and the trailing edge data detected at the time of reproduction is generated, and the data cannot be reproduced accurately.

[0006] Such problems are caused by problems other than pits, for example,
It can also occur for recording domains and the like.

On the other hand, in a conventional apparatus, for example,
As described in JP-A-62-8370, when absorbing or correcting fluctuations in the recording pit length from the normal length caused by fluctuations in the characteristics of the recording medium and recording conditions, the normal length of the pit length is used. As a means of detecting the amount of fluctuation from
The same demodulation start pattern, that is, the SYNC pattern is made to correspond to the leading edge and the trailing edge of the recording pit,
Two SYNs respectively obtained from the leading edge and the trailing edge during playback
A method is used in which a time difference between the C pattern detection signals is detected by a delay element having a plurality of taps having a constant delay time interval and a time difference detection circuit constituted by flip-flops.

[0008]

This prior art relates to a synchronizing signal written at a position indicating the start of an area where arbitrary information is written. In this area, synchronization is performed again within an area where arbitrary information is written. No consideration has been given to retaking.

That is, since the pit length variation is detected and corrected only at the beginning of each sector, if the medium characteristics and recording conditions change between the first half and the second half of the sector, the pit length fluctuates as described above. There is a problem that an error becomes large and an error occurs in signal detection, and the error persists due to the nature of decoding. Therefore, it is necessary to perform resynchronization at an appropriate position in the data area to stop the error.

In this case, as described above, the time relationship between the reproduced signal from the leading edge of the pit or the recording domain and the reproduced signal from the trailing edge shifts indefinitely. The synchronization signal used to match the time axes of the reproduced signal from the leading edge and the reproduced signal from the trailing edge that have been shifted indefinitely is only the reproduced signal from the leading edge or only the reproduced signal from the trailing edge. so,
Must be detectable. Furthermore, it is necessary to be able to discriminate as a synchronization signal in an area where arbitrary information is written with respect to the proposed synchronization signal.

An object of the present invention is to use a run length limited code,
An object of the present invention is to provide an information recording / reproducing method capable of accurately resynchronizing in an area where arbitrary information is recorded by the edge recording method.

[0012]

SUMMARY OF THE INVENTION The object of the present invention is to provide a recording medium by associating a code string composed of a run length limited code with the positions of the leading edge and the trailing edge of a state change pattern formed on the recording medium. In an information recording / reproducing system for recording or reproducing information, a synchronization signal is included at predetermined intervals in information recorded on the recording medium or recorded and converted into a run length limited code format. A signal which is not in the conversion rule to the run length limited code using only a signal corresponding to the leading edge of the state change pattern or only a signal corresponding to the trailing edge during reproduction, as the synchronization signal. Is achieved by using a code string that can be determined to include

According to the present invention, as a means for achieving the above object, a code string composed of a run length limited code is associated with positions of a leading edge and a trailing edge of a state change pattern formed on a recording medium. When recording information on a recording medium, a synchronization signal is inserted at a predetermined interval into information converted into a run length limited code, which is recorded on the recording medium, to record information on the recording medium. In the area, a state change pattern corresponding to this is formed, and as the synchronization signal, during reproduction, using only a signal corresponding to the leading edge thereof, or
Provided is an information recording method using a signal including a code string that can be determined to include a signal not conforming to the conversion rule to the run length limited code using only a signal corresponding to a trailing edge.

According to the present invention, as a means for achieving the above object, the positions of the leading edge and the trailing edge of a state change pattern formed on a recording medium are detected, and a code consisting of a run length limited code is detected from the detection signal. When a column is reproduced and information is reproduced, the detection signal is divided into leading edge data consisting only of a signal corresponding to the leading edge of the state change pattern and trailing edge data consisting only of a signal corresponding to the trailing edge. And a synchronization signal previously inserted into the information recorded on the recording medium, for each of the leading edge data and the trailing edge data, and detecting the relative position between the leading edge data and the trailing edge data. An information reproducing method for correcting the deviation of the relationship by matching the resynchronization positions of the detected leading edge data and trailing edge data with the respective synchronization signals, combining the two, and reproducing information from the combined data. To provide.

[0015] Further, the object is to provide a semiconductor laser and an optical disk, a means for converting information into a run length limited code and recording the information on the optical disk by a pit edge recording method, and a method for changing the amount of light reflected from the optical disk. Or a means for inserting and recording any of the following synchronization signals into a signal to be recorded on an optical disc in an optical disc recording / reproducing apparatus having means for detecting the rotation of the reflection polarization plane and reproducing the information. This is achieved by having means for detecting the signal during reproduction.

The following are examples of the synchronizing signal applicable to the present invention.

(1) A combination of a second code string having a minimum or maximum run length immediately after a first code string having a maximum or minimum run length of a run length limited code is associated with the run length limited code. A synchronization signal including a configuration in which the second code string is repeated immediately after the first code string is repeated, when the conversion rule is not included.

(2) If the combination of the code string having the minimum run length immediately after the code string having the maximum run length of the run length limited code is not included in the conversion rule for the run length limited code, the maximum run length is restricted. A configuration having a length equal to the repetition of the code sequence, a code sequence having a longer run length code sequence on the front side, and a code sequence having a shorter run length code sequence immediately after the code sequence having the shorter run length sequence. Including synchronization signal.

(3) As the synchronization signal, before the code string constituting the synchronization signal, a code string which does not have a conversion rule to a run-length limited code and has an inverted code in the middle, that is, a logic "1" A first synchronizing signal and a second synchronizing signal in which a first code string including an odd number of codes and a second code string not including an inversion code or including an even number in the middle are arranged,
It is used by switching depending on the state immediately before the location where the synchronization signal is inserted.

(4) The inversion unit, that is, the number of logic "1" is equal to the code string obtained by combining the code strings such that the total of the run lengths is maximized in the run length limited code, and Synchronization signal containing a code sequence longer than the sequence.

(5) The inversion part, that is, the number of logic "1" is
A synchronization signal including a code sequence equal to a code sequence obtained by combining code sequences such that the total of run lengths in the run length limited code is minimized, and including a code sequence shorter than the code sequence.

[0022]

According to the present invention, there is provided a code string comprising a run length limited code,
Information is recorded or reproduced by associating the positions of the leading edge and the trailing edge of the state change pattern formed on the recording medium.

Also, according to the present invention, at the time of reproducing information, a signal detected from a recording medium is separated into a signal corresponding to a leading edge and a signal corresponding to a trailing edge of the state change pattern, and the leading edge data is separated. And a trailing edge data, and a reproduced clock that is bit-synchronized for each of them. Then, the present invention detects a synchronization signal, in particular, a resynchronization signal from each of the leading edge data and the trailing edge data, and uses the synchronization signals of both to determine the relative positional relationship between the leading edge data and the trailing edge data. The reproduced data is obtained by compensating for the deviation and the information is demodulated based on the reproduced data.

As described above, the detection signal is separated into the leading edge signal and the trailing edge signal, and the signals are adjusted and recombined with reference to the respective synchronization signals to obtain a state on the recording medium. Even if the positional relationship between the leading edge and the trailing edge of the change pattern is displaced, its influence can be eliminated. Therefore, information can be accurately reproduced.

When detecting the synchronization signal from each of the leading edge data and the trailing edge data, the synchronization signal arranged at the head of the sector or the like is relatively easy to distinguish from the signal representing the data. The resynchronization signal inserted at a predetermined interval is not easily distinguishable from the data signal. That is, there is a risk of erroneous detection.

The present invention solves this problem by using a code string configured as described above.

That is, the synchronizing signal using the above-described code string is the reproduced data corresponding to only one of the leading edge and the trailing edge of a state change pattern such as a pit or a recording domain formed on a recording medium. Thus, it can be determined that the signal does not satisfy the conversion rule to the run length limited code used for recording. Therefore, a signal using such a code sequence is
It can be reliably detected as a synchronizing signal from signals representing other arbitrary information.

The synchronization signal detected as a signal that does not conform to the conversion rule to the run length limited code is a unique code pattern that distinguishes either the leading edge data or the trailing edge data from other signal patterns. It should just be detected as. Because the relative positional deviation between the leading edge and the trailing edge is relatively small, if a unique code pattern is detected from one, the synchronization signal may exist at the time before and after the other. Because I understand. Therefore, the other detection signal only needs to be included as a code pattern that can be detected as a synchronization signal.

Of course, the synchronization signal may be constituted by using a code string detected as a unique code pattern for both the leading edge and the trailing edge.

[0030]

Embodiments of the present invention will be described below with reference to the drawings.

The following embodiments are examples applicable to pit type, magneto-optical type, and phase change type optical recording media, particularly those using optical discs. However, the present invention is not limited to these, and other It can also be applied to the information recording / reproducing method using the recording medium.

Further, the present invention is not limited to the recording to the storage means and the reproduction from the storage means, but also a method of converting a data signal into a certain physical change state and restoring it to the original data signal, for example, a data signal The same applies to transmission and the like as in the present invention.

In the following embodiment, an example of an apparatus capable of recording and reproducing information will be described. However, the apparatus may be separated into a recording apparatus and a reproducing apparatus.

FIG. 1 shows a schematic configuration of an example of an information recording / reproducing apparatus for implementing the information recording / reproducing method of the present invention.

As shown in FIG. 1, the information recording / reproducing apparatus of this embodiment records / reproduces information using an optical disk 1. In this apparatus, in addition to the optical disk 1, a write / read head unit 2 for writing and reading data, and a control device (not shown) for controlling the entire apparatus including control of the write / read head unit and rotation of the optical disk, etc. And a recording unit 6 for converting information to be recorded into a signal to be written on the optical disc 1 by the write / read head unit 2 and a signal read from the optical disc 1 by the write / read head unit 2.
And a reproducing unit 12 for reproducing information.

The same applies to the following embodiments. However, the configuration of this embodiment is divided in this way for the sake of convenience of explanation, and is not necessarily limited to such division. Similarly, the names of the write / read heads and the like are also for convenience, and do not limit the configuration of the information recording / reproducing apparatus of the present invention.

For example, the optical disc 1 irradiates a light beam to a mirror-shaped unrecorded area to form a pit, and forms a pit pattern showing a state change corresponding to the length of the pit, thereby recording data. Do. Similarly, in the case of a magneto-optical disk, data is recorded by forming recording domains having different magnetization directions in unrecorded areas.

In this embodiment, the leading edge and the trailing edge of the edge of the state change pattern correspond to the position "1" of the recording data. That is, the logic "1" in the run length limited code is used as an inversion portion and is associated with the leading edge and the trailing edge.

The write / read head unit 2 includes a laser light source 3 for irradiating the optical disc 1 with a pulsed light beam.
A light receiving unit 4 for detecting reflected light of the light beam from the optical disk 1, a preamplifier 5 for amplifying a signal detected by the light receiving unit 4 and outputting a detection signal used for reproducing information, and a laser light source 3. Laser light source drive circuit 1 to be driven
1. The preamplifier 5 also outputs control signals for focusing control, tracking control, and the like.

Further, necessary functions are added to the write / read head unit 2 in accordance with the storage system of the optical disk 1. For example, in the case of a magneto-optical disk, a magnetic head for writing and a drive circuit therefor (both not shown) are provided.

The recording unit 6 includes a modulation circuit 7 for converting information to be recorded into recording data composed of a run length limited code according to a predetermined conversion rule, for example, a 2-7 modulation method. A synchronization signal storage circuit 8 for storing and holding a synchronization signal to be inserted in advance, and a synchronization signal held in the synchronization signal storage circuit 8 according to a predetermined format.
Switching circuit 9 for inserting at a predetermined position in recording data
NRZI (non-return-to-zero-in
verted) NRZI circuit 10 for conversion.

The recording section 6 and a part of the write / read head section 2 constitute data recording means on a recording medium. The synchronization signal storage circuit 8 and the switching circuit 9 constitute a synchronization signal insertion unit.

The synchronization signal storage circuit 8 stores at least a synchronization signal for resynchronization (RESYNC) inserted into the data area for each specific data length (hereinafter, also referred to as a resynchronization pattern or a RESYNC pattern). other,
A synchronization signal for reproduction clock synchronization (VFO SYNC) (hereinafter sometimes referred to as a VFO synchronization pattern) and the like can be stored. A preferred example of the resynchronization pattern will be described later.

The NRZI conversion circuit 10 is composed of, for example, a T (toggle) flip-flop circuit (not shown). That is, the conversion circuit 10 inverts the output level ("1" and "0") every time "1" of the recording data converted into the run length limited code is input to the input terminal, and converts the input data to NRZI. Convert.

The reproducing unit 12 converts the reproduced signal detected by the write / read head unit 2 into a leading edge detection signal consisting of a pulse corresponding to the position of the leading edge of the state change pattern,
A reproduction clock is generated for each of the reproduced signal separation circuit 13 for separating the signal into a trailing edge detection signal composed of a pulse for the position of the trailing edge, and the separated leading edge detection signal and trailing edge detection signal. Clock synchronizing circuits 14 and 1 for outputting the leading edge data and trailing edge data
5, pattern detection circuits 16 and 17 for detecting a synchronization signal for resynchronization for each of the leading edge data and the trailing edge data, and using the synchronization signal for resynchronization, for leading edge data and trailing edge data. Data synthesis circuit 1 for synthesizing
8 and a demodulation circuit 19 for demodulating the combined reproduced data.

The read section of the write / read head section 2 and the reproducing section 12 constitute a means for reproducing data from a recording medium.

Although the internal structure is not shown, the reproduction signal separation circuit 13 determines whether an edge is a leading edge or a trailing edge from a reproduction signal in which H level and L level appear alternately, and outputs a signal indicating each edge. The circuit includes a circuit for detecting, and a circuit for separating a signal indicating the detected leading edge and a signal indicating the trailing edge to output a leading edge detection signal and a trailing edge detection signal.

The clock synchronizing circuits 14 and 15
O (Variable Frequency Oscillator), and the recovered clocks VFOCLK1 and VFOC
LK2, leading edge data and trailing edge data.

Each of the pattern detection circuits 16 and 17 has the same circuit configuration, and stores in advance two types of RESYNC detection patterns for leading and trailing edge data of an input synchronization signal; Leading edge (rear edge) input
A circuit (not shown) that compares data with the stored pattern and outputs a synchronization pattern (RESYNC) detection signal when they match with each other is configured.

The RESYNC detection pattern is a pattern in which the constituent signal sequence of the synchronization signal is separated so as to have bits of "1" alternately and complementarily. For example, the RESYNC detection pattern 1 shown in FIGS. , 2 are used.

The RESYNC detection patterns 1 and 2
Is stored in both of the pattern detection circuits 16 and 17.
This is because which of the input data of the pattern detection circuits 16 and 17 becomes the leading edge data or the trailing edge data depends on the state of the pit pattern.

The pattern detection circuits 16 and 1
Reference numeral 7 denotes only a circuit for detecting a resynchronization pattern in the present embodiment, but a circuit for detecting a VFO synchronization pattern may be provided in parallel. In this manner, VFO synchronization can be handled in the same manner as in the present embodiment. In addition, by arranging them side by side, a part of the circuit can be shared and the circuit configuration can be simplified, which is preferable to the case where they are provided completely separately.

The reproduction data synthesizing circuit 18 is, for example, as shown in FIG.
As shown in the figure, the leading edge data 43 is reproduced clock VFOC.
A register A48 which takes in according to LK1 and sequentially stores at a designated address; a register B49 which takes in trailing edge data 44 according to a reproduction clock VFOCLK2 and sequentially stores at a designated address; and a leading edge RESY
An address control circuit 50 which is reset by the NC detection signal 45 to sequentially set an address from address 0 and instructs the register A 48 to designate an address, and the trailing edge RESY
An address control circuit 51 which is reset by the NC detection signal 46, sequentially sets an address from address 0, and instructs the register B49 to specify an address.

The reproduced data synthesizing circuit 18 also includes a selector 53 for sequentially taking in the contents of the register A 48 from the designated address and outputting it serially, and a selector 54 for taking in the contents of the register B 49 and outputting it serially. Using the reproduced clock VFOCLK1, the leading edge RESYNC detection signal 45 and the trailing edge RESYNC detection signal 46, a common address is designated to the selectors 53 and 54, and registers A48 and B
Registers A, which simultaneously take in the stored contents of 49 simultaneously,
A B output control circuit 52 and an OR gate 55 for ORing the outputs of the selectors 53 and 54 to synthesize leading edge data and trailing edge data are provided.

The registers A48 and B49 constitute storage means for temporarily and independently storing leading edge data and trailing edge data.

The address control circuits 50 and 51, the selectors 53 and 54, and the register A and B output control circuits 52
And the OR gate constitute a means for synthesizing data.

As described above, the reproduction section 12 includes the pattern detection circuits 16 and 17 for VFO synchronization, so that not only RESYNC but also VF
Similarly for O-synchronization, it is possible to correct the deviation between the leading edge data and the trailing edge data.

The pattern detection circuits 16 and 17
Utilizing that the position of the resynchronization signal is set at a constant interval, means for predicting the position where the resynchronization signal exists and setting the gate can be provided. Thereby, the resynchronization signal may be detected only within this gate, so that erroneous detection may be prevented. The gate, for example, using a normally detected resynchronization signal as a trigger, counts the reproduction clock with a counter, and opens the gate when the count value becomes close to the resynchronization signal insertion interval,
What is necessary is just to close after a fixed time.

Further, the pattern detection circuits 16 and 17
Only when a resynchronization signal is detected by both of them, the composition of the reproduction data may be permitted.

Next, an example of a sector format for performing reproduction data synthesis will be described.

FIG. 16 is a diagram showing an example of a format configuration of a sector on a disk.

An optical disk is generally divided into a preformat area 400 created in advance at the time of disk creation and a data area 401 other than the preformat area.

The preformat area 400 further includes:
A sector mark 410 indicating the beginning of a sector, a VFO synchronization pattern 411 for generating a reproduced clock, and
It is classified into an address area 412 in which a track address and a sector address are recorded.

The user data is recorded in the data area 401. As the format configuration of the data area 401, there are a VFO synchronization pattern 420, a user data demodulation start pattern 421, user data 422, and a resynchronization pattern 423 for resynchronizing the reproduction clock in the user data.

Next, an example of the resynchronization pattern will be described with reference to FIG.
This will be described with reference to FIGS.

FIG. 2 shows an example of a run length limited code 2-
The conversion rule to 7 codes is shown.

The left side of FIG. 2 is the original data, each of which is converted to the right side code string. As can be seen from the combination of the code strings in FIG. 2, "0" between "1" and "1"
Are a minimum of two and a maximum of seven.

Here, as a code string that does not exist in this conversion rule, immediately after a code string having seven run-length maximums “0”, only two run-length minimum “0s” immediately follow. A code string from which a code string comes is exemplified. This is because the code string in FIG. 2 has two or three consecutive “0s” at the end of the code string, and four consecutive “0s” at the beginning of the code string is originally. In the case of “0011”.

Therefore, a code string having seven consecutive “0” s is
Immediately after the last three consecutive “0” s in the code string of FIG. 2, the code string “00” in which the original data is “0011”
001000 ”. At the end of this code string, since three“ 0 ”s are continuous, a code in which only two“ 0s ”immediately follow seven“ 0s ”continues. The columns are
The conversion rule in FIG. 2 cannot be used.

Therefore, as an example of the synchronizing signal constituting the resynchronization pattern, immediately after the repetition of a code string having seven consecutive “0” s having the maximum run length, two “0” s having the minimum run length are obtained. What is necessary is just to set it as the code string containing the structure of repetition of a continuous code string.

FIG. 3 shows an example of a synchronizing signal based on the above concept.

The synchronization signal 24 shown in FIG.
Immediately after the repetition of two consecutive code strings (arrow B),
“0” includes two consecutive repetitions of a code string, and the number of bits is two bytes of recording data before conversion to a run length limited code.

This synchronization signal 24 is subjected to NRZI conversion,
When recorded on the optical disc 1 in the form of pits, a pit pattern 25 indicating a state change pattern is obtained. Where 29
31 are pits.

The pit pattern 25 is inverted depending on the state immediately before the synchronization signal is inserted. That is, if the pits before the pit 29 of the pit pattern 25 are pits, the positions of the pits 29, 30, and 31 are not pits but between pits 29 and 30, between 30 and 31, and 3
After 1 is a pit. Here, the pit pattern 25
The case shown in FIG. When the pits are inverted, only the leading edge data 26 and the trailing edge data 27 are interchanged.

The output of the reproduction signal separation circuit 13 that has read the pit pattern 25 is the leading edge data 26 and the trailing edge data 27.

In the leading edge data 26, the first "1"
“0” from (arrow D) to the next “1” (arrow E)
Are repeated 15 times. In the 2-7 code, the number of consecutive “0” is up to seven, so from the first “1” (arrow D) of the leading edge data 26 to the next “1” (arrow E),
Just in the middle, one “1” of the trailing edge data 27 enters,
The fact that “0” is repeated twice seven times in a row
It can be determined only by the leading edge data 26.

Also, the second “1” of the leading edge data 26
Similarly, from the (arrow E) to the next “1” (arrow F), the 2-7 code has a minimum of two consecutive “0” s. Are five consecutive ones, one “1” of the trailing edge data 27 enters in the middle, and “0”
Can be determined based on only the leading edge data 26 that two consecutive times are repeated.

Therefore, the synchronization signal 24 is the leading edge data 26
Only with this, it is possible to detect a synchronization signal including a code string that does not comply with the conversion rule to the 2-7 code, in which only two “0s” continue after seven “0s” continue.

When the pit pattern 25 is inverted from the pit pattern 25 shown in FIG. 3, it can be similarly detected from the trailing edge data 27 that the signal is a synchronization signal.

As described above, the synchronization signal 24 shown in FIG.
Is a synchronization signal (resynchronization pattern) using only the leading edge data 26 or only the trailing edge data 27. Of course, it is needless to say that the synchronization signal can be detected using both the leading edge data and the trailing edge data.

In the reproduced data synthesizing circuit 18 shown in FIG. 1, in response to the detection of the synchronizing signal, each "1" of the leading edge data 26 and the trailing edge data 27 of the synchronizing signal is
The leading edge 26 or trailing edge data may be delayed and combined so as to be at a predetermined position on the time axis (registered as a synchronization signal).

Next, an example of a synchronization signal having a pattern obtained by further improving the synchronization signal shown in FIG. 3 will be described.

A laser beam is used to generate pits or recording domains on the optical disc 1. for that reason,
If a pit or a recording domain is where seven “0” s continue, the laser beam is irradiated for a relatively long time.
The surrounding area becomes warm, and the pits or the recording domains become larger than the original size.

In the synchronizing signal shown in FIG. 3, when a portion between "1" shown by arrow A and "1" shown by arrow B is a pit or a recording domain, "1" shown by arrow B is used.
The trailing edge of a pit or a recording domain on the optical disk corresponding to the following may be slightly longer and longer. Also, the leading edge of the pit or recording domain on the optical disk corresponding to "1" indicated by arrow C may be slightly earlier.

As a result, a portion that is not a pit or is not a recording domain between “1” indicated by arrow B and “1” indicated by arrow C is shortened. Therefore, there is a possibility that “1” indicated by the arrows B and C cannot be reproduced.

To enable reproduction of "1" indicated by arrows B and C, the recording density is reduced, and the distance (length on the optical disk) between both "1" s is shortened by the laser light. It should be much longer than minutes.

However, it is not good to lower the recording density due to the synchronization signal. The recording density is determined in consideration of the fact that the most difficult to reproduce in the 2-7 code conversion rule included in the information to be written, that is, a code string in which three “0” s are consecutive after three consecutive “0s” can be reproduced. Should be determined. Then, the synchronization signal is reproduced at the recording density.

Therefore, the above-mentioned “0” after seven consecutive “0” s have been generated and a long pit or recording domain has been generated.
FIG. 4 shows an example of a synchronizing signal in which a short non-pit portion, which is continued only two times, becomes shorter due to a partial rise in temperature of the disk medium due to the laser beam, thereby avoiding the possibility that reproduction becomes impossible. It is shown.

In FIG. 4, reference numeral 24 denotes a code string of a synchronization signal constituting a resynchronization pattern, and reference numeral 25 denotes a pit pattern on the optical disk corresponding to the synchronization signal 24.
8-31 are pits. 26 is a pit pattern 25
Is the leading edge data, and 27 is the trailing edge data.

The synchronization signal shown in FIG. 4 is obtained by changing the position of "1" indicated by arrow A of the synchronization signal of FIG. 3 to the position of "1" indicated by arrow A2.

As a result, six "0" s are consecutive before a code string having two consecutive "0" s. A code string in which two “0” s continue after six “0s” continue can be formed by the conversion rule to the 2-7 code shown in FIG. Therefore, reproduction must be performed without lowering the recording density.

Before six consecutive “0” s, eight “0” s are consecutive. However, this part becomes a pit, and even if the pit is slightly warmed up by the laser beam, the pit becomes slightly larger. Since there are six consecutive “0” s, there is no problem in reproduction.

The trailing edge data 27 obtained by recording the synchronization signal 24 shown in FIG. 4 as shown in the pit pattern 25 and reproducing the same is the same as the leading edge data 26 shown in FIG.
Therefore, as shown in the example of the synchronization signal in FIG.
It can be detected that a signal that does not conform to the rule of conversion into seven codes, that is, a synchronization signal (resynchronization pattern) is recorded.

In the example shown in FIG. 4, the pit pattern 25 may be inverted. In this case, it can be detected from the leading edge data 26 that the signal is a synchronization signal.

As described above, the synchronization signal in FIG. 4 can be detected as a synchronization signal only by the leading edge data 26 or the trailing edge data 27, and there is no need to lower the recording density.

Next, the operation of the present embodiment will be described with reference to FIGS.

In the following description of the operation, the resynchronization operation will be mainly described.

First, the case of recording information will be described.

The information to be recorded is input to the modulation circuit 7. The modulation circuit 7 converts the input information into a run length limited code based on a predetermined conversion rule. In this embodiment, a 2-7 code is used. The information converted to the run length limited code passes through the switching circuit 9 and is input to the NRZI circuit 10.

Each time 1 is input to the input of the NRZI conversion circuit 10, the output is inverted and the NRZI conversion is performed. The information converted into the run-length limited code and converted into the NRZI code is converted into a pulse of laser light by the laser light source driving circuit 11 and the laser light source 3, and corresponds to the write signal 38 on the optical disk 1 as shown in FIG. Thus, a pit or a recording domain as shown in the pit pattern 39 is generated and recorded.

As shown in the format 36 in FIG. 6, a synchronization signal is inserted for each fixed length of information to be recorded.
The synchronization signal is obtained by storing a predetermined code string (shown in FIG. 4 in this embodiment) stored in the storage circuit 8 in the information recorded by the switching circuit 9 for each fixed length (for example, 20 bytes). And input to the NRZI conversion circuit 10. At this time, the operation of the modulation circuit 7 and the input of information to be recorded are stopped.

As described above, information and a synchronization signal are recorded on the optical disk 1.

Next, the case of reproducing information will be described.

A laser beam weaker than during recording is emitted from the laser light source 3 and irradiates the optical disc 1. Light receiving section 4
Detects the intensity of reflected light depending on the presence or absence of pits or recording domains on the optical disc 1, or the rotation of the polarization plane. The detected signal is amplified by the preamplifier 5, and a reproduced signal 40 is output and input to the reproduced signal separation circuit 13.

The reproduction signal separation circuit 13 generates a leading edge detection signal 41 and a trailing edge detection signal 42 from the rising edge and the falling edge of the signal from the light receiving section 4, respectively. The leading edge detection signal 41 and the trailing edge detection signal 42 enter the clock synchronization circuits 14 and 15, respectively, and together with the clock signals VFOCLK1 and VFOCLK2 synchronized with the respective detection signals, as reproduction data as leading edge data 43 and trailing edge data 44. Synthesis circuit 18, pattern detection circuits 16 and 17
Sent to

In the pattern detection circuits 16 and 17, the leading edge data 43 and the trailing edge data 44, which are sequentially input, are detected by using a detection pattern 2 similar to the RESYNC single edge detection pattern 1 shown in FIG. Compare whether the patterns match. Here, when the portion a of the leading edge data shown in FIG. 6 matches the detection pattern 1, a RESYNC detection signal 45 of the leading edge data is output. Similarly, for the trailing edge data, when the portion b shown in FIG.
The C detection signal 46 is output.

These RESYNC detection signals 45 and 46 are input to corresponding address control circuits 50 and 51, and are reset at their input timings. As a result, in the state shown in FIG. 6, since the RESYNC detection signal 45 is output before the signal 46, the address control circuit 50 is reset before the address control circuit 51. Therefore, the address control circuit 50 first sequentially outputs addresses from address 0 in accordance with the reproduction clock VFOCLK1, and then the address control circuit 51 outputs
Addresses from the address are sequentially output according to the reproduction clock VFOCLK2.

The register A48 stores the reproduction clock VFOC.
In synchronization with LK1, the leading edge data 43 after the RESYNC pattern is stored at the address specified by the address control circuit 50 described above. Slightly later than this, the register B49 similarly stores the trailing edge data in the reproduction clock V.
The data is stored at a specified address in synchronization with FOCLK2.

After the data is stored in registers A48 and B49, selectors 53 and 54 respectively use the common addresses output from registers A and B output control circuit 52 to simultaneously select the corresponding registers A48 and B49 for the same address. , And outputs the data to the OR gate 55 to combine them.

Thereafter, the register control circuits 50 and 51 cyclically output the addresses until the next RESYNC detection signals 45 and 46 are input, and sequentially register the leading edge data 43 and the trailing edge data 44, respectively. A48 and B49
And the data is synthesized as described above.

As described above, in this embodiment, since the RESYNC pattern is detected only at each of the leading edge data 43 and the trailing edge data 44, the length of the leading edge and the trailing edge of the pit pattern is long. Even if there is a variation, the length of the edge is small between the leading edge and the trailing edge, so that the position of the edge can be accurately detected. Further, in the present embodiment, the relative displacement of the positional relationship of the coded bits generated between the leading edge data 43 and the trailing edge data 44 detected in this way is described in the present embodiment. Are temporarily stored using the registers A48 and B49 as buffers, and these are simultaneously output in a bit-correspondence manner, and are OR-corrected.

Next, another embodiment of the synchronization signal used in the present invention and another embodiment of the optical disk recording / reproducing apparatus suitable for using the synchronization signal will be described.

In the following embodiments, those having the same structure and operation as those described above will not be described repeatedly.

FIG. 8 shows two types of synchronization signals according to another embodiment, and their pit patterns, leading edge data and trailing edge data.

The synchronization signal 61 and the synchronization signal 62 shown in FIG.
Are switched according to the presence or absence of the pit immediately before the insertion of the synchronization signal. That is, if the pit or the recording domain is generated on the disk immediately before the insertion of the synchronization signal, the synchronization signal 61 is recorded.
If a pit or a recording domain is not generated on the disk immediately before the insertion of the synchronization signal, the synchronization signal 62 is recorded.

The difference between the synchronization signals 61 and 62 is whether or not "1" is present in the third bit. If a pit or a recording domain is generated immediately before the synchronization signal, this 3bi
The generation is stopped by being inverted by the “1” of the t-th.

The synchronization signals 61 and 62 are set to “0” immediately after the seven consecutive “0” s shown in FIG.
Include a code string of two consecutive double repetitions. However, the presence or absence of the corresponding pit or recording domain when the code string is recorded is constant regardless of the state immediately before the synchronization signal is inserted, as shown in pit patterns 63 and 64 in FIG.

Therefore, like the synchronization signal shown in FIG.
A pit pattern for generating a pit or a recording domain does not occur in a portion where seven “0” s are immediately before two consecutive “0” s.

Further, from the state in which five “0” s continue after fifteen “0” s continue in the leading edge data 65 and 66,
As described with reference to FIG. 3, it is possible to detect a code string that does not satisfy the conversion rule of the run length limited code (2-7 code), that is, a synchronization signal.

Further, in the synchronizing signal shown in FIG.
A state in which five “0” s continue after five consecutive data appears only in the leading edge data 65 and 66. Therefore, the pattern circuit for detecting the synchronization signal may be provided only on the leading edge data side.

Next, the synchronizing signals 61 and 62 are set to RESY.
An embodiment of an optical disk recording / reproducing apparatus suitable for recording / reproducing information using the NC will be described.

FIG. 9 is a block diagram showing the configuration of the optical disk recording / reproducing apparatus.

The optical disk recording / reproducing apparatus of the embodiment shown in FIG. 9 has an optical head 2 for writing / reading information to / from the optical disk 1 and a data to be written on the optical head 2 as in the apparatus shown in FIG. Writing unit 6 for sending data
And a reproducing unit 12 for reproducing information from a reproduction signal detected by the optical head 2.

The same components as those shown in FIG. 1 are denoted by the same reference numerals, and in order to avoid duplication, the following description will focus on the differences.

The optical head 2 has the same configuration as that shown in FIG. 1, and has a laser light source 3, a light receiving section 4, a preamplifier 5, and a laser light source driving circuit 11.

The writing section 6 has a modulation circuit 7, a synchronization signal storage circuit 8, a switching circuit 9 and an NRZI conversion circuit 10, as well as a synchronization signal instruction circuit 33, like the one shown in FIG.

Synchronization signals 61 and 62 having the pattern shown in FIG. 8 described above are stored in storage circuit 8 as resynchronization patterns. In addition, the VFO synchronization pattern and the like can be stored in the storage circuit 8 as described above.

The synchronization signal instructing circuit 33 detects the output of the NRZI conversion circuit 10 immediately before the insertion of the synchronization signal, and determines whether the pit or the recording domain is generated or not in the storage circuit 8 according to the state. One of 61 and 62 is selected.

The reproducing section 12 has a reproduced signal 13, clock synchronizing circuits 14 and 15, pattern detecting circuits 16 and 17, a reproduced data synthesizing circuit 18 and a demodulating circuit 19.
Here, in the reproduction data synthesizing circuit 18, a delay circuit 56b is provided before the address control circuit 50 in FIG.
Is added, and a one-shot multivibrator 57, a delay circuit 58b, and an AND gate 59 are added before the address control circuit 51.
48 and a delay circuit 56 before the register B49.
There is a difference in that a and 58a are added.

This is because, in this embodiment, the leading edge side is based on the use of the synchronization signals 61 and 62 shown in FIG.
This is because a resynchronization pattern that can be distinguished from other data appears and the trailing edge side can be detected as a resynchronization pattern, but uniqueness that can be distinguished from other data is not necessarily guaranteed.

In this embodiment, the delay circuits 56a, 56
b, 58a and 58b respectively perform a delay operation with an equal delay time in synchronization with the reproduced clock. Further, the one-shot multivibrator 57 outputs a pulse having a pulse width having a duration longer than the delay time.

With such a configuration, the leading edge data and the trailing edge data are output by the corresponding delay circuits 56a and 58a with an equal time delay according to their respective input timings. The leading edge data RESYNC detection signal and the trailing edge data RESYNC detection signal are
Similarly, corresponding delay circuits 56b and 58b
Is output with a delay.

Here, the RES of the leading edge data is shifted before or after the input of the RESYNC detection signal of the trailing edge data.
When the YNC detection signal is input, the one-shot multivibrator 57 outputs a pulse. Therefore, when the AND of the pulse and the output of the delay circuit 58b is calculated using the AND gate 59, the RESYNC detection signal of the trailing edge data is treated as correct.

Even when the pattern detection circuit 17 detects data having the same pattern but not the RESYNC, a RESYNC detection signal is output. However, in this case, since the RESYNC detection signal of the leading edge data is not output before and after that, in the AND gate 59,
This RESYNC detection signal is blocked, and the subsequent address control circuit 51 is not reset.

Since the leading edge data, the trailing edge data and their RESYNC detection signals are all delayed by the same time, the relative shift between the leading edge data and the trailing edge data is preserved as it is, and the subsequent register A48 , B49 and so on. This correction operation is the same as in the above-described embodiment.

The apparatus of the present embodiment configured as described above operates in the same manner as that shown in FIG. 1 except for the above-mentioned differences, and uses the synchronization signals 61 and 62 shown in FIG. The included information can be recorded on an optical disc and reproduced.

Next, an embodiment of another optical disk recording / reproducing apparatus suitable for using the synchronization signals 61 and 62 as a resynchronization signal will be described with reference to FIG.

The apparatus of this embodiment has an optical disk 1, an optical head 2, a writing unit 6, and a reproducing unit 12, and the configuration of the writing unit 6 is partially different from that of FIG. Are configured and operate similarly to those of the embodiment shown in FIG. Therefore, only the differences will be described below.

The writing section 6 of this embodiment includes a modulation circuit 7, a synchronization signal recording circuit 8, a switching circuit 9, and an NRZ
In addition to having the I conversion circuit 10, it has a reset instruction circuit 34.

The synchronization signal storage circuit 8 stores only the synchronization signal 62 shown in FIG. 8 as a resynchronization pattern. It goes without saying that the VFO synchronization pattern and the like may be stored together.

The reset instructing circuit 34 starts inserting the synchronizing signal 62 by the switching circuit 9 and outputs the NRZ signal to the third bit.
It has a function of instructing the I conversion circuit 10 to reset. As a result, if the output of the NRZI conversion circuit 10 is in a state of generating a pit or a recording domain, the output is reset and the generation of the pit or the recording domain is interrupted. As a result, this is the same as recording the synchronization signal 61 as the synchronization signal.

On the other hand, if the output of the NRZI conversion circuit 10 is not in a state of generating a pit or a recording domain,
Since the output does not change even if reset, the synchronization signal 62 is recorded as the synchronization signal.

The operation of the other parts not described in both the embodiments of FIGS. 9 and 10 is the same as that of FIG.

As described above, the synchronization signal 6 shown in FIG.
By switching between 1 and 62 and recording as a re-synchronization pattern, it is possible to detect a synchronization signal only with the leading edge data, and therefore, compared with the case where the synchronization signal shown in FIGS. 3 and 4 is recorded. In addition, the synchronization signal pattern detection circuit can be simplified.

In the synchronization signal shown in FIG. 3, there is a possibility that the recording density needs to be reduced. However, when recording is performed by switching the synchronization signals 61 and 62 shown in FIG. 8, it is not necessary to reduce the recording density. Absent.

Next, as in the embodiment shown in FIG. 1, for both the leading edge data and the trailing edge data, a reproduced data synthesizing circuit suitable for a reproducing section of an information recording / reproducing apparatus for detecting a RESYNC pattern. One embodiment will be described with reference to FIG.

The reproduced data synthesizing circuit 18 of the present embodiment has the address control circuits 50 and 51 as shown in FIG.
, Registers A48 and B49, registers A and B output control circuit 52, selectors 53 and 54, and OR gate 55
And These have already been described and will not be described here.

Also, the reproduced data synthesizing circuit 18 of this embodiment
Are the delay circuits 56a, 56b, 58a and 58b having the same delay time, the one-shot multivibrator 57 for outputting a pulse having a pulse width longer than the delay time, When the respective RESYNC detection signals of the leading edge data and the trailing edge data are input to the gates 59a and 59b within a predetermined time difference, the front and rear RESYNC detection circuit 6 outputs the front and rear RESYNC detection signals and activates the multivibrator 57.
0.

In this embodiment, RESYNC of the leading edge data is used.
The output of the detection signal 45 through the delay circuit 56b and the output of the RESYNC detection signal 46 of the trailing edge data through the delay circuit 58b are ANDed with the output pulse of the one-shot multivibrator 57 in AND gates 59a and 59b, respectively. Is taken. Therefore, RES both before and after
Only when the YNC detection signal is detected, the RESYNC detection signals 45 and 46 of the leading edge data and the trailing edge data become valid.

Therefore, even if RESYNC is erroneously detected on either the leading edge side or the trailing edge side, erroneous resynchronization operation can be prevented. In particular, one of the leading edge data or the trailing edge data may not include a RE that is not necessarily unique.
When a SYNC pattern appears, it is preferable to use the reproduced data synthesis circuit of this embodiment.

That is, by using such a reproduced data synthesizing circuit, in the present invention, only one of the leading edge data and the trailing edge data is used in accordance with the state of the state change pattern (pit pattern). However, if it can be determined that a code string that is not in the conversion rule of the run length limited code is included, it is not always possible to determine that only the data pattern on the other side at that time contains a code string that is not in the conversion rule of the run length limited code. Then, resynchronization can be performed.

Note that the reproduced data synthesizing circuit used in the present invention is not limited to any one of the above-described embodiments or the present embodiment. For example, a configuration in which a FIFO memory is used instead of the register is conceivable. In short, any circuit configuration may be used as long as the relative positional relationship between the leading edge data and the trailing edge data can be corrected.

Next, another example of the synchronization signal that can be used in the present invention will be described with reference to the drawings.

The synchronization signal of the embodiment shown in FIG. 13 uses a 2-7 code as a run length limiting code.

In the 2-7 code, when the number of “1” is three, the code string of “100000000010000000001” has the largest total run length.

In the example of the synchronizing signal shown in FIG. 13, a code string of "10000000000000000001" is included. The code string in FIG.
Although the number of “1” s is equal to that of the synchronization signal of FIG. 3 including a code string of seven consecutive “0” s and repeated twice, “0”
Is one more, so it is a long code string.

The leading edge data 73 (the trailing edge data 7) obtained by recording the code string shown in FIG.
4), there is a state where 16 “0” s are continuous. Therefore, the recorded synchronization signal includes 2-
Since a code string having eight consecutive “0” s, which is not included in the 7-conversion rule, is included, it is distinguished from a code string based on another 2-7 anomaly.

As in FIGS. 4 and 3, the pit pattern 72 shown in FIG. 13 may be inverted depending on the state immediately before the synchronization signal is inserted. However, after a code string in which seven or more “0” s are continuous, three or more “0” s are continuous. Therefore, when the synchronization signal shown in FIG. 3 is used, there is a possibility that the recording density needs to be reduced, whereas when the synchronization signal of the present embodiment is used, there is no possibility.

In the same way as that shown in FIG. 13, the number of inversions, that is, the number of "1" is equal to the combination of code strings that minimize the total run length in the run length limited code, and It is also possible to use a code string shorter than the code string.

Each of the above-described synchronization signals uses the 2-7 code, but the synchronization signal of the present invention is not limited to the 2-7 code. In the present invention, other run length limited codes can be used in the same way.

FIG. 14 shows the conversion rule of the 1-7 code.

The bit indicated by x in the code string of FIG. 14 is determined by the value of the bit immediately before the combination.
When the immediately preceding bit is “1”, x is “0”, and when the immediately preceding bit is “0”, x is “1”.

In the 1-7 code, the number of “0” between “1” and “1” is determined to be 1 to 7. Also, two bits of data are converted into three bits of a code string.

FIG. 15 shows an embodiment of the synchronizing signal in the 1-7 code.

This synchronizing signal has the same configuration as the synchronizing signal of the 2-7 code shown in FIG. When the number of “1” is 3 in the 1-7 code, the total of the run lengths becomes the largest in a “100000000000001” b “100000001000001” c “10000010000000001” code string.

The synchronization signal 81 shown in FIG. 15 includes a code string of “1000000010000001”. This code string is the same as 1-7 described above.
The number of “1” is equal to each of the code strings a to c in the code, but the number of “0” is one more, so that the code string is long.

The code string shown in FIG. 15 is recorded on the optical disk, and the leading edge data 83 (the trailing edge data 8
4), there is a state in which 14 “0” s are continuous. As a result, the information thus recorded is “0”
To a 1-7 code, either a combination of 7 consecutive “1s” and 6 consecutive “1s” of “0”, or a code string containing 8 or more consecutive “0” s It can be detected that the code string includes a code string that does not satisfy the conversion rule, that is, a synchronization signal.

As in the case of FIG. 13, the pit pattern 82 shown in FIG. 15 may be inverted depending on the state immediately before the synchronization signal is inserted. Even in this case, 1-
In the case of the 7 code, there is a code string in which only one “0” exists immediately after a code string in which seven “0” s are continuous.
In the example shown in FIG. 5, even if a code string in which only two “0” s continue after using six consecutive “0s” in the example of FIG.
Unlike the code example, there is no need to lower the recording density.

The code sequence of each synchronization signal described above is merely an example, and the present invention is not limited to these, and other code sequences can be formed based on the same concept. .

The embodiments shown in FIGS. 1, 9 and 10 described above show examples in which data is handled serially. However, the present invention is not limited to such a configuration. For example, the reproducing unit may be configured to convert the reproduced signal into parallel data and perform synchronization signal detection, data synthesis, and the like.

[0171]

According to the present invention, a synchronization signal can be determined only by a signal from a leading edge or a trailing edge of a recorded state change pattern such as a pit or a recording domain. Also, by using the run length limited code, even when a time shift occurs between the signal from the leading edge and the signal from the trailing edge during reproduction of any edge-recorded information, In this case, a resynchronization signal can be detected, and by making them coincide with each other, there is an effect that the time shift can be corrected.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of an optical disk recording / reproducing apparatus for implementing an information recording / reproducing method of the present invention.

FIG. 2 is an explanatory diagram showing a conversion rule of a 2-7 code.

FIG. 3 is an explanatory diagram showing an example of a synchronization signal that can be used in the present invention.

FIG. 4 is an explanatory diagram showing an example of a synchronization signal that can be used in the present invention.

FIG. 5 is a block diagram showing an example of a reproduced data synthesizing circuit suitably used in the information recording / reproducing apparatus of the present invention.

FIG. 6 is a waveform chart showing the operation of one embodiment of the information recording / reproducing method of the present invention.

FIG. 7 is an explanatory diagram showing an example of a pattern for detecting a synchronization signal used in the embodiment.

FIG. 8 is an explanatory diagram showing another example of a synchronization signal that can be used in the present invention.

FIG. 9 is a block diagram showing the configuration of an embodiment of an optical disk recording / reproducing apparatus that can suitably use the synchronization signal shown in FIG. 8;

FIG. 10 is a block diagram showing a configuration of an embodiment of an optical disk recording / reproducing apparatus that can suitably use the synchronization signal shown in FIG. 8;

FIG. 11 is a block diagram showing a configuration of an embodiment of a reproduced data synthesizing circuit suitably used in the optical disk recording / reproducing apparatus shown in FIGS. 9 and 10;

FIG. 12 is a block diagram showing the configuration of another embodiment of a reproduced data synthesizing circuit suitably used for the information recording / reproducing method of the present invention.

FIG. 13 is an explanatory diagram showing another example of a synchronization signal that can be used in the present invention.

FIG. 14 is an explanatory diagram showing a conversion rule of 1-7 code.

FIG. 15 is an explanatory diagram showing an example of a synchronization signal using a 1-7 code applicable to the present invention.

FIG. 16 is an explanatory diagram showing a format configuration example of a sector on a disk.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Optical disk, 2 ... Optical head, 3 ... Laser light source, 4 ...
Light receiving unit, 5 preamplifier, 6 writing unit, 7 modulation circuit, 8 synchronization signal storage circuit, 9 switching circuit, 10 NR
ZI conversion circuit, 11 laser light source drive circuit, 12 reproduction unit, 13 reproduction signal separation circuit, 14, 15 clock synchronization circuit, 16, 17 pattern detection circuit, 18 reproduction data synthesis circuit, 19 demodulation circuit .

──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Naomi Yoshida 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Hitachi Image Information Systems Co., Ltd. (72) Inventor Takehiko Sekine 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi Image Information System (58) Fields surveyed (Int.Cl. ⁶ , DB name) G11B 20/10 G11B 20/14

Claims (1)

(57) [Claims] 1. A state change pattern formed on a recording medium.
Information recording / reproducing method for recording or reproducing information
At least a pre-recorded preformat area and data
Has a track that connects a number of sectors consisting of
The disk medium is rotated, and the information to be recorded in the sector is converted according to a predetermined conversion rule.
Therefore, the first code string is converted into a first code string comprising a run length limited code, and the first code string is converted according to a predetermined format.
Adds first sync signal for playback clock synchronization at the beginning of
The state change pattern for each specific data length of the code string.
Using only the signal corresponding to the leading edge of the
Using only the signal corresponding to the edge, the run length is added to the synchronization signal.
It can be determined that a signal not included in the conversion rule to the restriction code is included.
Insert a second synchronization signal for resynchronization including a code string, the first code string inserted the first and second synchronization signal
Strong according to the second code string converted according to the predetermined conversion rule
Irradiates the disk recording medium with a degree-modulated light beam.
The change pattern is recorded and reproduced by a light beam from a rotating disk recording medium.
And reproducing the reproduced signal from the leading edge and the reproduced signal from the trailing edge.
Separated from the leading edge playback signal and the trailing edge playback signal.
Bit synchronization is performed for each of them using the first synchronization signal.
Playback clocks and generate these playback clocks.
Leading edge data and trailing edge data, respectively, synchronized with each other, and at least one of the leading edge data and the trailing edge data is obtained.
Detecting a second synchronization signal for resynchronization from the leading edge
Data and first and second data corresponding to each of the trailing edge data.
Obtaining a second resynchronization detection signal, and using the first and second resynchronization detection signals to generate the leading edge data;
Data and the trailing edge data, and correct
Information recording characterized by demodulating the reproduced signal obtained by
Recording / playback method.