JP2758750B2 - Cell multiplex bus communication control system - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a cell multiplex bus communication control system, and more particularly to a cell multiplex bus communication control system for controlling communication between a cell multiplex bus and a line interface that terminates a terminal accommodation line or a relay line.

[0002]

2. Description of the Related Art A conventional cell multiplex bus communication control system is shown in FIGS.
There is a method as shown in FIG. FIG. 4 shows a channel setting method, in which a time division bus to which a plurality of line interface circuits (LIFs) are connected is divided into units called time slots. The CPU determines which time slot is used by which line interface circuit.

FIG. 5 shows a time-division bus centralized arbiter control system, in which line interface circuits are connected by a common bus, and data exchange is performed in units of frames and packets.

FIG. 6 shows a DQDB system (Distributed Queue Dual
Bus), and each bus is a cell multiplexed bus in units of + number of octets. Data transmission to this bus is performed by SG
The line interface circuit which has received a cell called an empty cell and which does not contain data transmitted from the (slot generator) can transmit data.

[0005] However, since the probability of acquiring an empty cell increases as the distance from the SG increases, arbitration of cell acquisition is performed between line interface circuits in order to eliminate unfairness.

The bus communication control method in the above-described conventional channel setting method has a disadvantage that channel setting and centralized channel management by software are required in advance during communication. Further, in the time-division bus centralized arbiter control system, there is a disadvantage that the switching cannot be performed in units of cells and other circuits are in a waiting state during transmission of frames and packets having a long data length.

In the bus communication control system in the DQDB system, cell-by-cell switching is possible, but contention for empty cells is controlled in a distributed manner by each line interface circuit, and the control is also performed using a cell multiplex bus. The amount of hardware is large, and there is a disadvantage that unfairness cannot be completely eliminated when traffic increases transiently.

[0008]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a cell multiplex bus communication control system capable of performing communication in units of cells fairly and without delay.

[0009]

According to the present invention, a cell multiplexed bus for transmitting a predetermined data capacity as a switching unit cell, an individual address assigned to each cell, a terminal accommodating line respectively terminated and the cell multiplexed bus connected to the cell multiplexed bus. A plurality of line interfaces performing the interface function of, and a transmission right request bus that is connected to these line interfaces in common and transmits a transmission right request for cells from the line to the cell multiplex bus generated from these line interfaces, A cell multiplex bus communication control system including a central processing unit that generates a transmission permission in response to the transmission right request, and a transmission permission bus that transmits the transmission permission to the line interface, wherein each of the line interfaces has The number of cells to be transmitted to the cell multiplex bus and the priority information thereof are provided in the transmission right request. Means for transmitting to the transmission right request bus, means provided in the central processing unit, means for arbitrating transmission permission according to the priority information and the number of cells in the transmission right request, and means provided in the central processing unit. Means for transmitting a transmission permission including a transmission permission address to the transmission permission bus based on the result of the arbitration, and means provided in each of the line interfaces, wherein the transmission permission address matches the own address upon receiving the transmission permission. Means for transmitting cells from the line to the cell multiplexing bus, and means provided at each of the line interfaces for receiving cells from the cell multiplexing bus and taking in cells matching the own address. A cell multiplex bus communication control system characterized by including:

[0010]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a system block diagram of an embodiment of the present invention. FIG. 1A is a schematic diagram thereof, and FIG. 1B is a detailed diagram thereof.

The type of the cell multiplexing bus in this embodiment is a type in which one end of the transmitting bus 101 and one end of the receiving bus 102 are connected.

Each of a plurality of line interface circuits 100 is individually assigned a physical address, terminates terminal lines and relay lines connected thereto, and provides an interface between these lines and cell multiplex buses 101 and 102. Function.

A central processing unit 200 is provided to process a transmission right request from the line interface circuit 100 and to grant transmission permission. The transmission right request is sent to the transmission right request bus 202, and the transmission permission is transmitted to the transmission permission bus 201.
Sent to

Each of the line interface circuits 100
Cell transmission unit 2 for transmitting cells from a line to a cell multiplex bus
0 and a cell receiver 1 for receiving cells from a cell multiplex bus
0, a cell number request unit 40 for generating a transmission right request for requesting transmission of a cell to the bus, and permission for detecting transmission permission from the central processing unit and controlling transmission of cells to be transmitted to the cell multiplex bus. And a timing detector 30.

The central processing unit 200 receives a transmission right request from each line interface circuit 100 and arbitrates for the transmission right in accordance with a predetermined priority processing method. And a timing synchronization unit 70 for determining various operation timings.

FIG. 2 is a block diagram showing further details of FIG. 1, and the same parts as those of FIG. 1 are denoted by the same reference numerals.
FIG. 3 is a timing chart showing the operation.

When data arrives from the terminal line and the trunk line connected to the line interface circuit 100, the data is decomposed into unit cells of a predetermined format shown in FIG. You. An address of a communication partner determined by a CPU (not shown) via a signal line 103 and a frame check sequence bit are added to a header portion of the cell for each cell.

At the same time as this disassembly, a cell number acquisition request is sent to the counter unit 41 in the cell number requesting unit 40 via the line 105, and at the same time, the cell number and the request priority (priority) are sent via the line 106. It is sent to the cell number register 43.

The counter section 41 creates a transmission timing based on the clock (CLK) and the frame pulse signal (FH) transmitted from the timing synchronization section 70 in the central processing section 200 based on the physical address.

The request transmitting section 42 formats the number of cells and the priority via the line 107 and transmits the transmission right request bus at the timing of the line 108 transmitted from the counter section 41.
A cell number request is sent to 202 (see the transmission right request bus chart 202 in FIG. 3).

As shown in the transmission right request bus 202 of FIG.
The cell number acquisition request of the line interface circuit 100 is multiplexed and sent to the request detection unit 52 of the central processing unit 200.
The request detection unit 52 performs serial-to-parallel conversion on the data that has received the cell number acquisition request and sends the data to the arbitration unit 51.

The arbitration unit 51 selects one of a plurality of cell acquisition requests based on the priority and the number of cells using, for example, a rotation priority control method, and permits a physical address to be granted via a line 204. The format section 61 in the sending section 60 has a cell timing section 72 in the timing synchronization section 70.
Send permission continuously in synchronism with the timing of sending over line 203. Then, the arbitration unit 51 starts counting down the number of cells of the request to which permission has been given.

As shown in FIG. 3, while sending permission to A,
When a high-priority request is issued from, control to send permission to A again after giving permission to B is given priority.

In the format section 61, as shown in FIG. 3, a predetermined format is formed in the order of a flag, an address, and a flag. . The format interval of the transmission permission signal bus 201 is a cell multiplex bus.
It is similar to 101 and 102.

The permission detection unit 32 of the permission / timing detection unit 30 in the line interface circuit 100 receives the physical address from the central processing unit 200 via the permission reception unit 33, and detects a match / mismatch. If they match, a bus acquisition signal is immediately sent to the cell disassembly unit 22 via the timing unit 31 via the line 104. The bus acquisition signal indicates the length of the unit cell and the transmission timing of the cell multiplex bus 101.

Upon receiving the bus acquisition signal, the cell disassembly unit 22 transmits the cell multiplexed bus 10 via the bus transmission unit 21 based on the signal.
Send cells to 1.

In the cell receiving unit 10, the address filter unit 12 detects the coincidence of the addresses of all the cells with the address set in advance by the CPU via the bus receiving unit 11, and if the addresses match, the address filter unit 12 detects the coincidence. The cell is fetched and immediately sent to the cell assembling unit 13. The address check timing of the address filter unit 12 is determined by the timing unit 3
1 is the timing being sent out over line 106.

Then, the cell assembling section 13 assembles the cells arriving one after another and sends them out to the terminal line and the trunk line. With the above series of controls, the terminal line and the relay line can communicate with each other.

[0030]

As described above, according to the present invention, in the cell multiplexed bus communication control, the cell multiplexed bus acquisition request of the plurality of line interface circuits is made by the cell number request and the priority request. And the complexity of requesting and granting permission on a cell-by-cell basis.

Then, it is possible to transmit the permission by the transmission permission signal bus, and to interrupt the transmission of the cell having the long data length and to transmit the cell having the short data length in between, thereby efficiently using the bus. And the delay can be reduced.
Further, in terms of software, only processing for address setting is performed, and high-speed processing can be realized.

[Brief description of the drawings]

FIG. 1A is a schematic system diagram of an embodiment of the present invention,
(B) is a detailed system block diagram thereof.

FIG. 2 shows further details of FIG. 1 and is a block diagram of an embodiment of the present invention.

FIG. 3 is a time chart showing the operation of the embodiment of the present invention.

FIG. 4 is a block diagram showing an example of a conventional channel setting method.

FIG. 5 is a block diagram showing an example of a conventional time-sharing centralized arbiter control method.

FIG. 6 is a block diagram showing an example of a conventional DQDB method.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Cell reception part 11 Bus reception part 12 Address filter part 13 Cell assembling part 20 Cell transmission part 21 Bus transmission part 22 Cell decomposition part 30 Permission timing detection part 31 Timing part 32 Permission detection part 33 Permission reception part 40 Cell number request part 41 Counter unit 42 Request sending unit 43 Cell number register 100 Line interface circuit 101,102 Cell multiplex bus 200 Central processing unit 201 Transmission permission bus 202 Transmission right request bus

Claims (1)

(57) [Claims] 1. A cell multiplex bus for transmitting a predetermined data capacity as an exchange unit cell, and a plurality of individual buses each having an individual address assigned thereto and terminating a terminal accommodation line and forming an interface function between the cell multiplex bus and the line. A transmission right request bus which is connected to these line interfaces in common and transmits a transmission right request for cells from the line to the cell multiplex bus generated from these line interfaces, and a response to the transmission right request A cell multiplexing bus communication control system comprising: a central processing unit for generating a transmission permission by transmitting a signal; and a transmission permission bus for transmitting the transmission permission to the line interface. The number of cells to be transmitted to the bus and its priority information are used as the transmission right request. Means for sending to the request bus, means for arbitrating transmission permission in accordance with the priority information and the number of cells in the transmission right request, and means for arbitrating the transmission permission. Means for transmitting a transmission permission including a transmission permission address to the transmission permission bus based on the transmission permission address and the cell multiplexing when the transmission permission address matches the own address upon receiving the transmission permission. Means for transmitting cells from the line to a bus, and means provided at each of the line interfaces for receiving cells from the cell multiplex bus and taking in cells matching the own address. Cell multiplex bus communication control system.