JP2757449B2 - Charge transfer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described in the following order.

A. Industrial application fields B. Summary of the invention C. Background art [Fig. 2] D. Problems to be solved by the invention E. Means to solve the problems F. Function G. Example [No. FIG. 1] H. Effects of the Invention (A. Industrial Application Field) The present invention is substantially the same as a charge transfer device, in particular, a first register which is an original register for transferring signal charges, as well as the first register. A second register, which is a dummy register having an input structure of, and a maximum ratio of the maximum handled charge amount having a predetermined ratio to the maximum handled charge amount of the second register and having substantially the same output structure as the register. The present invention relates to a charge transfer device having a third register, which is a register for setting a bias level, so that an input bias can be automatically adjusted.

(B. Summary of the Invention) In the above-described charge transfer device, the present invention provides an input bias system that feeds back a signal indicating a comparison result of the charge amounts of the second and third registers to the first register; A signal fed back to the first and second registers for auto-biasing is supplied to one of the source and the input gate of the register in order to separate the input signal system from the input signal system directly without using a capacitor. To the input signal to be transferred to the first
Is applied to the other of the source and the input gate of the register.

(C. Background Art) [FIG. 2] In addition to an original register (first register) such as that described in JP-A-63-90100, a dummy register (first 2 registers)
And bias level setting register (third register)
Is provided to automatically set the DC bias voltage of the original register to an arbitrary point in the dynamic range. Such a charge transfer device that automatically biases an input signal can set the DC bias level by the ratio of the maximum handled charge amount of the second register and the third register, and furthermore, the temperature dependency of the DC bias level is substantially reduced. It has an advantage that it can be set to 0, and is often used as a delay element.

FIG. 2 is a circuit diagram showing one conventional example of an input auto-bias type charge transfer device used as a delay element.

In the drawing, 1 is a first register for transferring signal charges, IG1 is its input gate, S1 is its source, and OG1 is its output gate. Reference numeral 2 denotes a second register which is a dummy register having substantially the same input structure as the first register 1. IG2 is its input gate, S2 is its source, OG2 is its output gate, and 3 is the second register 2. A third register, which is a register for setting a bias level which has substantially the same amount of charge in the output structure as the second register and has a predetermined ratio of the maximum handled charge, S is its source, and OG3 is its output gate.

4 is an output gate OG which indicates the amount of charge flowing through the second register 2
A DC detection circuit 2 detects in the form of a voltage and detects its DC level, and a DC detection circuit 5 detects the amount of charge flowing through the third register 3 in the form of a voltage at the output gate OG3 and detects the DC level. A differential amplifier circuit 6 for comparing the output signals of the two DC detection circuits 4 and 5;
Is fed back to the input gate IG2 of the second register 2 and the input gate IG1 of the first register 1. The input gate IG1 of the first register 1 is also where the transfer signal is input, so that the output signal of the differential amplifier circuit 6 is fed back to the input gate IG1 using the differential amplifier circuit 7 using a voltage floor circuit. Done through. 8
Is a diode provided on the output side of the differential amplifier circuit 7.

9 is an output circuit for amplifying the signal output from the output gate OG1 of the first register 1. T is a signal input terminal of the IC.

In order to delay a video signal or the like, a gate input type auto-bias type charge transfer device as shown in FIG. 2 tends to be frequently used. This is because the power supply voltage tends to be low, and even if the power supply voltage is low, in order to improve the linearity of the input characteristics, it is necessary to replace the diode cutoff input method with the input method of inputting to the gate. The feedback for the auto bias is also provided by the input gate IG1 of the first register 1 (and the second
For the input gate IG2) of the register 2 of FIG. That is, conventionally, the transferred signal and the feedback signal for the auto-bias are input to the same place.

(D. Problems to be Solved by the Invention) As shown in FIG. 2, both the output signal of the differential amplifier circuit 6 and the input signal to be transferred are input to the input gate IG1 of the first register 1. Then, the input gate IG1
When it becomes necessary to insert, for example, an inverting amplifier circuit 10 between the signal input terminal T and the signal input terminal T, a problem arises in that a DC cut capacitor element is required. To explain this point in detail, when a transferred input signal is applied to the input gate IG1 of the register 1, the linearity is improved, but the phase of the signal and the output signal of the register 1 are inverted. However, the user often requests that the input signal to be transferred and the output signal have the same phase. In such a case, it is necessary to provide an inverting amplifier circuit in the IC for inversion. by the way,
As a method of providing such an inverting amplifier circuit, the input gate IG1
Of the output circuit 9 can be considered. When an inverting amplifier circuit is provided on the output side of the output circuit 9, the signal amplified by the output circuit 9 must be amplified by the inverting amplifier circuit. Therefore, the dynamic range of the inverting amplifier circuit must be considerably widened. Therefore, the circuit configuration must be complicated, and the design becomes difficult. This is not preferable because it hinders cost reduction and size reduction. Therefore, what is considered is to provide an inverting amplifier circuit on the input side of the register 1. However, in this case, if the feedback signal for the auto bias and the transferred signal such as the video signal are the same where the circuit configuration is applied to the input gate IG1, for example, the DC level of the video signal cannot be reproduced. become. Therefore, a capacitor having a relatively large capacity of about μF is required. However, it is very difficult or impossible to form such a large capacitance in an IC.

Even if it is not necessary to adjust the phase relationship between the input signal and the output signal, if a sample-and-hold circuit must be provided on the input side of the first register 1, a relatively large-capacity capacitor is similarly used. Need.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an input bias system and an input signal system for inputting a signal to be transferred which are DC-separated without using a capacitor so that DC regeneration can be performed.

(E. Means for Solving the Problems) In order to solve the above problems, the charge transfer device of the present invention supplies a signal fed back to the first register for auto-biasing to either the source or the input gate of the register. The transfer input signal is applied to one of the source and the input gate.

(F. Function) According to the charge transfer device of the present invention, since the feedback signal for auto bias is inputted at a place different from the place where the signal to be transferred is inputted, the direct current of the signal to be transferred can be obtained without using a capacitor. Level reproduction and input bias automatic adjustment can be performed without any trouble.

(G. Embodiment) [FIG. 1] Hereinafter, the charge transfer device of the present invention will be described in detail with reference to the illustrated embodiment.

FIG. 1 is a circuit diagram showing one embodiment of the charge transfer device of the present invention.

In the figure, 1 is a first register, the input section is of a surface channel type, IG1 is its input gate, S1 is the source, OG1 is the output gate, 2 is the second register, and the input section is It is a surface channel type, IG2 is its input gate, S2 is a source, OG2 is an output gate, 3 is a third register, it is a whole channel type, S3 is its source, OG3 Is its output gate.

4 is a DC detection circuit for detecting the DC level of the amount of charge flowing through the second register 2, 5 is a DC detection circuit for detecting the DC level of the amount of charge flowing through the third register, and 6 is the two DC detection circuits 4 5 is a differential amplifier circuit for comparing the output signals of the first and second registers 1 and 2.
S1 and the source S2 of the second register 2 are applied directly.
Reference numeral 9 denotes an output circuit of the first register 1, and reference numeral 10 denotes an inverting amplifier circuit for inverting a signal input to the input gate IG1 of the first register 1 so that an output signal has the same phase as an input signal.
11 is an inverting amplifier corresponding to the inverting amplifier 10 provided on the input side of the second register 1 for dummy, 12 is a resistor divider for setting a clamp level, and 13 is also a resistor divider for setting a clamp level. In the circuit, the output voltage of the voltage dividing circuit 13 is applied to the input terminal of the inverting amplifier circuit 10 via the voltage follower including the inverting amplifier circuit 7 and the diode 8.

In the present charge transfer device, the input of the transfer target signal to the first register 1 is performed to the input gate IG, whereas the feedback of the output signal of the differential amplifier circuit 6 for the auto bias is performed by the register 1. This is done for the source S1 (and the source S2 of the second register 2).

Therefore, even if the inverting amplifier circuit 10 is interposed between the input terminal T and the input gate IG1 of the register 1, the direct current separation between the signal input system and the bias type can be performed without any trouble without using a capacitor. Thus, direct current reproduction of the video signal can be performed without any trouble.

Incidentally, a voltage of a predetermined clamp level is applied to the sources S1 and S2 of the first register 1 and the second register 2, and the output signal of the differential amplifier circuit 6 is applied to the input gate IG2 of the second register 2. The signal is fed back through the dummy inverting amplifier circuit 11, and the first register 1 is supplied with the input gate IG1.
An attempt was made to feed back through a voltage follower and an inverting amplifier circuit 11, however, according to such a charge transfer device,
However, since the DC level on the input side fluctuates, it is necessary to widen the dynamic range, which is not preferable. In order to input the transferred signal through the inverting amplifier circuit 10 without being affected by the auto bias system, the feedback for the auto bias and the input of the transferred signal as in the charge transfer device shown in FIG. To another terminal of the register. This is also true when a sample-and-hold circuit is provided instead of the inverting amplifier circuit 10 (, 11).

Note that, contrary to the above embodiment, the input signal is applied to the source S1 of the first register 1, and the application of the feedback signal for auto bias is performed by the input gate IG of the first register 1.
1. It may be performed for the input gate IG2 of the second register 2.

(H. Effects of the Invention) As described above, the charge transfer device of the present invention includes a first register formed in a semiconductor substrate and transferring a signal charge, and a first register formed in the semiconductor substrate. A second register having an input structure substantially identical to an input structure of the register; and a second register formed in the semiconductor substrate, having an output structure substantially identical to an output structure of the second register, and A third register having a predetermined ratio of the maximum handled charge amount to the maximum handled charge amount of the register, two charge amount detection means for detecting the charge amounts of the second and third registers, and A comparison means for comparing the detection result of the charge amount by the charge amount detection means, wherein the output signal of the comparison means is fed back to the first and second registers. The input signal is input to one of the source and the input gate of the first and second registers, and the input signal to be transferred is input to the other of the source and the input gate of the first register. It is characterized by becoming.

Therefore, according to the charge transfer device of the present invention, since the signal for auto bias is input to a place different from where the transfer signal is input, the DC level of the transfer signal can be reduced without using a capacitor. The reproduction and the automatic adjustment of the input bias can be performed without any trouble.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing one embodiment of the charge transfer device of the present invention, and FIG. 2 is a circuit diagram showing a background art. DESCRIPTION OF SYMBOLS 1... 1st register, 2... 2nd register, 3... 3rd register, 4... 2nd register charge amount detection means 5... 3rd register charge amount Detecting means, 6 ... Comparing means, IG ... Input gate, S ... Source.

────────────────────────────────────────────────── ─── Continuation of front page (72) Inventor Katsunori Noguchi 6-7-35 Kita-Shinagawa, Shinagawa-ku, Tokyo Inside Sony Corporation (56) References JP-A-63-88864 (JP, A) JP-A-Hei 2-67738 (JP, A) (58) Field surveyed (Int. Cl. ⁶ , DB name) G11C 27/04 103 H01L 29/762

Claims (1)

(57) [Claims] 1. A first register formed in a semiconductor substrate and transferring a signal charge, and a second register formed in the semiconductor substrate and having an input structure substantially identical to an input structure of the first register. A register formed in the semiconductor substrate, having an output structure substantially the same as the output structure of the second register, and having a predetermined ratio of the maximum handled charge to the maximum handled charge of the second register. A third register having a quantity, two charge quantity detection means for detecting the charge quantity of the second and third registers, and a comparison means for comparing the detection results of the charge quantity by the two charge quantity detection means. Wherein the output signal of the comparing means is fed back to the first and second registers, wherein the fed-back signal is a first and a second register. And is inputted to either the source and the input gate, a charge transfer device, characterized in that input signals transferred is so as to be input to the other of the source and the input gate of the first register