JP2748493B2 - Solid-state imaging device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state imaging device, and more particularly, to a solid-state imaging device capable of performing high integration while suppressing blooming and smearing.

[Prior Art] Normally, a solid-state imaging device includes a plurality of photodiodes formed by a PN junction on the surface of a semiconductor substrate, and a charge transfer unit that transfers signal charges from the photodiodes. As one problem of the solid-state imaging device, when strong light enters the photodiode, a blooming phenomenon occurs in which charges overflow from the photodiode and leak into the charge transfer unit, causing a white line on an imaging screen.
As a solid-state imaging device having a means for preventing the blooming phenomenon, a solid-state imaging device having a vertical overflow drain (VOD) structure in which a substrate absorbs excess charge generated in a photodiode is known.

FIG. 3 is a sectional view of an essential part showing an example of a solid-state imaging device using a conventional VOD structure. In this example, the P-type well region 2 is formed on the surface of the N-type semiconductor substrate 1 by utilizing lateral diffusion so that the impurity concentration is partially low and the junction is shallow. The photodiode 3 includes an N-type region 5 and a P-type well region 2 formed on the surface of a shallow junction with a low impurity concentration in the P-type well region 2.

The charge transfer section 4 includes a buried channel type CC formed by a polysilicon transfer electrode 9 formed on the surface of the semiconductor substrate 1 via an insulating film 7 and an N-type charge transfer region 6 formed below the electrode.
It is configured as D. The N-type region 5 of the photodiode and the N-type charge transfer region 6 of the charge transfer section are electrically separated by a channel stop region 8 which is a high-concentration P-type region. The charge transfer section 4 is shielded from light by a metal film 11 formed via an interlayer insulating film 10. In the conventional solid-state imaging device configured as described above, when an appropriate positive bias voltage is applied to the N-type semiconductor substrate 1 with respect to the P-type well region 2, the low impurity concentration of the P-type well region below the photodiode is reduced. Only the shallow portion can be depleted. Therefore, all surplus electrons generated in the photodiode when strong light enters can be absorbed by the semiconductor substrate 1. The P-type well region below the N-type charge transfer region 6 has a sufficiently large junction depth and a high impurity concentration so as not to be depleted. Therefore, the signal charges transferred in the N-type charge transfer region 6 are not sucked into the semiconductor substrate 1.

By the way, the P-type well region 2 of the solid-state imaging device having such a structure is formed through the following steps. That is, as shown in FIG. 4A, a photoresist 16 is formed in a photodiode formation region on a N-type semiconductor substrate 1 by using a normal photoresist process, and a P-type impurity is ion-implanted. P-type impurity region 15 is formed. Thereafter, when heat treatment is performed in a high-temperature inert gas, the impurities diffuse laterally in the photodiode formation region, and as shown in FIG. 4B, the P-type well region 2 is made shallow in this portion. Here, the impurity concentration also becomes low.

[Problems to be Solved by the Invention] Even in solid-state imaging devices, miniaturization and high integration of the devices are required. However, in order to achieve high integration, each element such as a photodiode must be downsized. However,
If a reduced photodiode is formed by using the well region 2 formed by the above-described method as it is, a shallow portion of the well region with a low impurity concentration reaches below the charge transfer region 6. Therefore, this portion is depleted, and there is a possibility that the signal charges in the charge transfer region are drawn to the substrate side. In order to avoid this, if the area of the photoresist 16 in FIG. 4A is reduced, the impurity concentration in the well of the photodiode portion will increase, and sufficient blooming control will not be performed. Therefore, if the area of the photoresist 16 is reduced and the heat treatment time is reduced, the impurity concentration in the well region below the charge transfer region 6 becomes insufficient again.

In addition, since the conventional manufacturing method uses a phenomenon called lateral diffusion, which is difficult to control, it has been difficult to achieve high integration with the conventional element structure and manufacturing method.

[Means for Solving the Problems] A solid-state imaging device according to the present invention includes a first conductivity type semiconductor substrate, a second conductivity type well region provided on the semiconductor substrate, and a second conductivity type well region provided in the well region. A solid-state imaging device comprising: a first conductivity type light receiving region forming a photodiode together with a well region; and a first conductivity type charge transfer region receiving and transferring photoelectrically converted charge from the first conductivity type light receiving region. , A groove extending from the back surface of the semiconductor substrate to the inside of the well region is provided directly below the light receiving region of the first conductivity type, and a control electrode is provided on the surface of the groove via an insulating film.

Example Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view showing one embodiment of the present invention,
In this figure, the same parts as those of the conventional example shown in FIG. 3 are denoted by the same reference numerals. In this embodiment,
On the surface of the N-type semiconductor substrate 1, a P-type well region 2 having a uniform depth and a uniform impurity concentration (1 × 10 ¹⁵ to 1 × 10 ¹⁶ cm ⁻³ ) is formed. , An N-type region 5 of the photodiode 3 and an N-type charge transfer region 6 of the charge transfer section 4 are formed. N-type region 5 of photodiode 3
A groove 12 is formed directly below the N-type semiconductor substrate 1 so as to reach the P-type well region 2 from the back surface. The groove 12 can be easily formed by using a currently used photoresist process and a plasma chemical reaction.
In the trench 12, a polysilicon control electrode 14 is interposed via an insulating film 13.
Is formed, and the polysilicon control electrode 14 is
It is electrically connected to the back surface of the mold semiconductor substrate 1.

According to the above configuration, when a bias voltage is applied to the polysilicon control electrode, it is possible to deplete only a narrow portion of the P well region immediately below the photodiode.

FIG. 2 is a sectional view showing another embodiment of the present invention.
In this embodiment, the groove 12a provided immediately below the N-type region 5 of the photodiode is formed so that the dry etching conditions are appropriately adjusted to form a taper. According to this structure, the stress caused by the polysilicon electrode formed in the groove can be eased in the heat treatment process performed later as compared with the previous embodiment. Further, since the depletion layer spreads in the lateral direction, it is effective to prevent a smear phenomenon in which electrons generated in the deep part of the P-type well region 2 leak into the N-type region 6 of the charge transfer section 4.

In the above embodiment, the polysilicon control electrode 14 is connected to the semiconductor substrate 1, but these may be electrically separated and different voltages may be applied to each of them. Further, the impurity concentration in the well region below the N-type region 5 of the photodiode may be lower than that in other portions to enhance the blooming suppressing ability.

In this specification, what is expressed as a “groove” may be a groove formed along a photodiode row, or a bottomed hole provided for each photodiode. It may be.

[Effects of the Invention] As described above, according to the present invention, in a solid-state imaging device in which a P-type well region is provided on the surface of an N-type semiconductor substrate, a groove is formed immediately below an N-type region of a photodiode. Since the control electrode is provided on the surface via an insulating film,
According to the present invention, the blooming phenomenon can be effectively prevented. Since the grooves can be formed by using a dry etching method utilizing a plasma chemical reaction, it is easy to finely process the grooves. Thus, according to the present invention,
A highly integrated solid-state imaging device can be realized without depletion of the P-type region below the charge transfer section as in the conventional method using lateral diffusion.

[Brief description of the drawings]

1 and 2 are cross-sectional views showing an embodiment of the present invention, FIG. 3 is a cross-sectional view showing a conventional example, and FIG.
(B) is sectional drawing which shows the manufacturing process of the conventional example. 1 ... N-type semiconductor substrate, 2 ... P-type well region, 3 ...
Photodiode, 4 ... Charge transfer section, 5 ... N-type region of photodiode, 6 ... N-type charge transfer region, 12, 12
a ... groove, 13 ... insulating film, 14 ... polysilicon control electrode.

Claims (1)

(57) [Claims] A first conductivity type semiconductor substrate; a second conductivity type well region provided on the first conductivity type semiconductor substrate; and a photodiode provided in the second conductivity type well region together with the well region. A solid-state imaging device, comprising: a first conductivity type light receiving region constituting a first conductive type light receiving region; and a first conductivity type charge transfer region receiving and transferring the photoelectric conversion charge from the first conductivity type light receiving region. A solid-state imaging device, wherein a groove extending from the back surface of the semiconductor substrate to the inside of the well region is provided immediately below the conductive type light receiving region, and a control electrode is provided on the surface of the groove via an insulating film.