JP2743926B2 - Semiconductor recording device and video editing method using semiconductor recording device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor recording device,
In particular, the present invention relates to a semiconductor recording device that records and reproduces a video signal, and also relates to a video editing system that combines and edits a plurality of videos.

[0002]

2. Description of the Related Art In video editing, there is a method called "dissolve" in which, when two types of video are connected, one video is gradually faded out and the other video is gradually faded in. To do this, two types of video must be entered into the video compositing device. To perform the above-described editing on two types of video recorded on one material VTR tape, one video must be dubbed to another video recording / reproducing device, and then both video must be reproduced.

A conventional video editing system will be described with reference to FIGS.

FIG. 7 is a system diagram when dubbing one video in a material VTR to another video recording apparatus.
Is a system diagram when two types of images are connected by a dissolve.

[0005] In FIG. 7, a VTR 15 is
For dubbing from the VTR 15 to the video recording device 17, and the start point (IN
Point) and an end point (OUT point).
That is, in an image to be faded out, the end point (OUT point) is a portion where the fade-out starts, and in a fade-in image, the start point (IN point) is a portion where the fade-in starts. When the above setting is performed, the video signal output from the VTR 15 is input to the video recording device 17 and the VT
The video of R15 is copied to the video recording device 17.

Here, a method of synthesizing two kinds of images will be described. As shown in FIG. 8, the editing machine 18 includes a VTR 19,
The video synthesizing device 21, the recording VTR 22, and the video recording device 20 are connected. The video recording device 20 includes the above 2
A recording medium recorded by the video recording device 17 (see FIG. 7) of the type of video is set, and a recording medium on which the other video is recorded is set in the VTR 19. The video recording device 20 sets the video recorded by the video recording device 17 (see FIG. 7) to the start point (IN point),
No. 9 sets the other video as the end point (OUT point). Here, the video recording device 20 is reproduced, the VTR 19 is reproduced at the end point (OUT point) of the reproduced video, and a dissolve is performed between the two. Next, another conventional video editing system (hereinafter, referred to as the latter video editing system) will be described. This latter video editing system is described in the NEC Technical Report (Vo 1.44, No. 1 /
1991, pp. 85-91, titled: NVUES Editing System).
An editing machine having a recording control unit instead of the editing machine 18 of the former video editing system using a semiconductor video recording apparatus instead of the video recording apparatus 20 of the former video editing system (hereinafter referred to as the latter editing machine). .). The semiconductor video recording device is called a video cache having a storage medium (RAM or the like). The semiconductor video recording device is divided into a video cache A and a video cache B. For example, while the video cache A is used for recording, the video cache B is used for recording and reproduction. The semiconductor video recording apparatus is controlled by a recording control signal including a recording address signal supplied from an editing machine different from the editing machine of the former video editing system. Next, the operation of the latter video editing system will be described.
Although FIG. 8 is referred to for the description, the video recording device 20 and the editing machine 18 will be described by replacing the semiconductor video recording device and the editing machine having the recording control unit (the latter editing machine), respectively. First, a recording tape ST on which two types of video (scene A and scene B) are recorded is set in the VTR 19, and the video is output. Note that, of the two types of images (scene A and scene B), the start point (A
s1), the end point (Ae1), the start point (Bs1) and the end point (Be1) of the scene B are set on the recording tape ST. Thereafter, the scene A is recorded on the recording tape RT in the recording VTR 22 and the video cache A in the semiconductor video recording device via the video synthesizing device 21. Here, the start point (As1) and the end point (Ae2) of the recorded scene A are set on the recording tape RT. The end point (Ae2) is
Unlike the end point (Ae1), it is the point of the dissolve start point at which the dissolve is started, so it is set before the end point (Ae1). Furthermore, even in the video cache A, the end point of the scene A (Ae
2) is set. Next, a scene B is further output from the VTR 19. At the start point (Bs1) of the scene B, a control signal is sent from the latter editing machine to the video synthesizing device 21, the recording VTR 22, and the semiconductor video recording device. . Here, in the video cache A, the point where the user wants to start the dissolve of the scene A in synchronization with the start point (Bs1) (the point where he wants to fade out).
The video synthesizer 21 fades out scene A and fades in scene B in the recording VTR 22 in synchronization with the start point (Bs1). All of these operations are performed automatically.

[0007]

In the conventional video editing system, in the former video editing system, when recording / reproducing a video on a video recording medium such as a VTR, a video recording device, and a semiconductor recording device, an operator records or reproduces the video. It was necessary to set a start point (IN point) and an end point (OUT point) of reproduction. That is, in order to copy one of the two types of images to another storage medium, the operator must set the start point (IN point) and the end point (OUT point) of the one image in advance. After that, the video medium has to be set in a video storage device in another system for video synthesis, which has been a troublesome task. In order to solve this problem, the latter video editing system has been proposed in which the operator does not need to set the IN point and the OUT point in advance. However, in the latter video editing system, the editing machine has a recording control unit, and a control signal must be sent from the editing machine to the semiconductor video recording device. This causes a problem that the cost increases.

An object of the present invention is to eliminate the need for an operator to set a start point (IN point) and an end point (OUT point) and copy one image of two types of images to another storage medium, An object of the present invention is to provide a semiconductor recording device and a video editing system using the semiconductor recording device. Another object of the present invention is to provide a semiconductor recording device that can use an editing machine without a recording control unit and has a simpler configuration, and a video editing system using the semiconductor recording device.

[0009]

According to the present invention, there is provided a control signal input section, a video signal input section, and a video signal output section. The control signal input section is connected to the control signal input section. A control signal analyzing unit for analyzing the time code and the edit-on bit provided from the control unit and transmitting time code data and edit-on data corresponding to the time code and the edit-on bit; and In response to the code data and the edit-on data, an address corresponding to the time code data and a read request signal and a write request signal are transmitted in accordance with the edit-on data, and the time transmitted from the control signal analyzing unit is transmitted. A storage table for storing code data and edit-on data, and the storage table and the control And an address generating unit connected to the signal analyzing unit and transmitting the address, the read request signal, and the write request signal while referring to data stored in the storage table. Means, connected to the address generating means, comprising an address corresponding to the address, receiving the address, the read request signal and the write request signal,
A first video memory configured to record a video input from the video input unit, and a first video memory and a second video memory for reproducing and outputting the recorded video to the video signal output unit; The second video memory is in a read state when the memory is in a write state, and the second video memory is in a write state when the first video memory is in a read state. Is obtained.

According to the present invention, a VTR and a recording V
By the editing machine connected to the TR and the video synthesizing device,
In a video editing system for synthesizing and editing a plurality of videos recorded on the VTR, the recording VTR,
A control signal input unit, a video signal input unit, a video signal output unit, and first and second videos connected to the video synthesis unit and the editing machine, and connected to the video signal input unit and the video signal output unit A semiconductor recording device having a memory is provided, and when recording any one of the plurality of images (hereinafter, referred to as a first image) from the VTR to the recording VTR, A time code indicating the recording position of the first video and an edit-on bit for a recording instruction are sent to the recording VTR and the control signal input unit of the semiconductor recording device. And after analyzing the edit-on bit, stores the data of the time code and an address corresponding to the time code, and stores the address and the write signal in the first image. It is sent to the memory, the first on the first image memory in accordance with the address and the write signal
After the video is recorded, the first video in the first video memory is output from the video output in response to an address corresponding to the running position of the recording VTR, and the recording VTR is output from the second video memory. When you reach the position where you want to combine the images of
The second video is output from the video output, the first video and the second video are combined by the editing machine, and after the composition, the VTR for recording is completed until the second video ends. And the second video memory records the first and second videos input from the video signal input unit, and synthesizes the first and second videos. Is recorded in the recording VTR, the recording VTR is cueed up to a cue-up point of the first video, and set so that the VTR is located in front of a position where a third video is to be synthesized. Cueing up the recording VTR to a cue-up point of the first video, starting recording, and storing the first video in the second video memory.
And the synthesized video of the second video is reproduced, the third video is input from the VTR, and the first to third video are synthesized, and the video is output through a video signal output unit. A video editing method is obtained in which the first to Nth (N is an integer) videos are synthesized by repeating the above operation after being recorded on the recording VTR.

[0011]

[0012]

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a block diagram showing one embodiment of a semiconductor memory device according to the present invention.

This semiconductor recording device comprises an editing machine and a recording V
It operates with a control signal being exchanged between TRs (not shown). The control signal includes a time code indicating the current position of the tape of the recording VTR, an edit-on bit indicating recording (when this bit is 1, the recording VTR records,
0, not recorded).

The control signal input section 7 receives a control signal exchanged between the editing machine and the recording VTR. The control signal analyzer 8 extracts the time code data and the edit-on-bit data from the control signal, and sends the data to the address generator 6.

The address generator 6 generates a read address and a write address for the video memory 2 and the video memory 3 so as to perform the following operations.

Here, the operation of the video memory 2 and the video memory 3 will be described. Video memory 2 and video memory 3
Is composed of a video memory for several fields so that a moving image for several seconds can be recorded and reproduced. Each field has an address, and has a read bit and a write bit input. When the read bit becomes 1, the recorded video is reproduced, and when the write bit becomes 1, the video input to the video memory is recorded. These bits are 0 except when they become 1 in the following description. The video memory 2 is initially for writing, and the video memory 3 is for reading. Note that no operation is performed because nothing has been written to the video memory 3 yet.

When the editing machine is operated, the recording VT
R queues up 5 seconds before the IN point and plays next. When the editor comes to the IN point, the editing machine sets the information code of the edit-on bit to 1 for the recording VTR, so that the recording VTR enters a recording state. Further, the edit-on bit (information code 1) is sent to the control signal input unit 7.

When the control signal input section 7 receives the edit-on bit (information code 1), the control signal analysis section 8 outputs edit-on data corresponding to the edit-on bit (information code 1), 6 activates the first address and the write bit (information code 1) in the video memory 2. The value of the time code data at this time and the effective address are paired and stored in the time code: memory address correspondence table (storage table) 5.

If the information code of the edit-on bit is 1 in the next field, the next address and the write bit (information code 1) are issued to the video memory 2. The value of the time code data at this time and the effective address are paired and stored in a time code: memory address correspondence table (storage table). By repeating this operation, the video input from the video input unit 1 is recorded in the video memory 2.

The above operation is repeated for several seconds (variable by setting) even when the information code of the edit-on bit becomes 0. After that, the ride bit (information code 0)
Will come into effect. At this point, the first editing is completed. Here, the video memory 2 is for reading and the video memory 3 is for writing. At this time, the address generator 6 sets the information code of the read bit to 1 in the video memory 2. This continues until the video memory 2 is next written. Also, the input time code data is detected, and if the value is present in the time code: memory address correspondence table 5, the corresponding address is transmitted to the video memory 2.
This operation is repeated, and the video memory 3 for writing is
Performs the same operation as when the video memory 2 is for writing. The video memory 2 and the video memory 3 receive the video input from the video input unit 1 and the addresses, read bits, and write bits generated from the address generation unit 6. When the information code 1 is input to the write bit, the input video is recorded in the field memory indicated by the address. When the information code 1 is input to the read bit, the video in the field memory indicated by the address is output. The video output from the video memory 2 and the video memory 3 is output from the video output unit 4.

Next, a video editing system using the semiconductor recording device will be described with reference to FIG. In FIG.
The semiconductor recording device 11 is connected to the editing machine 9, the recording VTR 13, and the video synthesizing device 12, and the video input unit 1 (see FIG. 1) of the semiconductor recording device 11 is connected to the output unit of the video synthesizing device 12. The video output from the video synthesizing device 12 is input to the video input unit of the semiconductor recording device 11. Further, the control signal input unit 7 (see FIG. 1)
A control signal exchanged between the TR 13 and the editing machine 9 is input. Video output unit 4 of semiconductor recording device (see FIG. 1)
Is connected to the input 2 of the video synthesizing device 12, and the video transmitted from the video output unit is input to the input 2. V
The video transmitted from the TR 10 is input to the input 1 of the video synthesizing device 12. The video synthesizing device 12 is connected to the recording VTR 13, and the video output from the video synthesizing device 12 is also input to the recording VTR 13. The VTR 10, the video synthesizing device 12, and the recording VTR 13 exchange data with the editing machine and are controlled by the editing machine.

A specific editing method of the video editing system according to the present invention will now be described with reference to FIGS. When a material tape on which the contents shown in FIG. 3 are recorded is edited, and a video in which scene B is connected to scene B by dissolving after scene A is recorded on the recording VTR 13 (see FIG. 2), the recording VTR is finally displayed on the recording VTR. 6 is recorded.

First, the portion indicated by a in FIG. 4 is edited (first editing). A material tape on which the content shown in FIG. 3 is recorded is inserted into the VTR 10, and data is set in the editing machine so as to reproduce the scene A. Next, the video synthesizing device 12
Sets the editing machine 9 so that the video is output from the input 1. The editing machine is set so that recording is performed on the portion a of the recording tape in the recording VTR 13. When this is executed, the VTR 10 operates, and the video of the scene A shown in FIG. 3 is output from the input 1 of the video synthesizing device 12, and is input to the recording VTR 13 through the video output unit 4 (see FIG. 1), and the recording VTR 13 Records only the portion a of the material tape.

Next, the recording VTR 13 is
Cue-up the recording tape used in step 1 to the cue-up point shown in FIG. 5, and play again from there.
The cue-up point is approximately a few seconds before the IN point. Here, when the running position of the recording tape of the recording VTR 13 comes to the IN point, edit-on 1 is performed.
Is output from the editing machine 9. At the OUT point, the edit-on becomes 0, the recording tape runs by the amount of the post-roll, and stops at the stop point.

When these data are received by the semiconductor recording device, edit-on 1 is output, recording is performed from the IN point of scene A to the video memory A, and a few seconds after the output of edit-on 0 (post-on). Roll section e) Scene A is recorded. That is, in FIG.
And e are recorded in the video memory A.

Next, the editing of the part d in FIG. 4 (second editing)
Is performed. The VTR 10 (see FIG. 2) reproduces the scene B, the video synthesizing device 12 (see FIG. 2) performs the setting to dissolve the video of the input 2 into the video of the input 1, and the recording VTR 13 (see FIG. 2). Is set in the editing machine so that recording is performed in the portion d in FIG.

When this is executed, the recording VTR operates as shown in FIG. That is, while the recording tape of the recording VTR 13 (see FIG. 2) is traveling in the recording state, an address corresponding to the traveling position of the recording tape is generated, and a read bit is transmitted to the video memory 2 by the address. The video of the scene A is synchronized with the address by the video synthesizing device 12 (FIG. 2).
(See Reference 2). When the recording tape of the recording VTR 13 (see FIG. 2) travels in the section f (see FIG. 6), the operator operates the VTR 10. At the IN point of the scene B image, the image synthesizing device 12 (see FIG. 2) fades out the scene A image output from the input 2 and outputs the image from the input 1, that is, the scene B image. And the image of scene A and the image of scene B are dissolved. As a result, the video of the section d in FIG. 4 is output from the video synthesizing device. As a result, record V
In TR13, a portion a of scene A and a portion d shown in FIG. 6 are recorded.

In this embodiment, the case where two videos are edited has been described. However, even when three or more videos are edited, the video memory 2 and the video memory 3 are alternately used.
By repeating the above operation, it is possible to edit similarly. For example, when editing scenes A, B, and C, scene A is first recorded in the video memory 2, and when the scene B is combined with scene A, the scene A is reproduced in the video memory 2 and the video memory 3 is reproduced. Records the scenes A and B input from the video input 1. At this point, scene A and scene B are combined and recorded on recording VTR 13. Here, the recording VTR 13 is cued up to the cue-up point of scene A,
Set so that it is just before the IN point. Thereafter, the recording VTR 13 is cued up to the cue-up point of scene A, and recording is started. At this time, the video in which the scene A and the scene B are combined is reproduced in the video memory 3, and the video of the scene C is input from the VTR 10.
At this time, scene A, scene B and scene C are synthesized,
It is recorded on the recording VTR 13 through the video output 4.

[0030]

According to the present invention, an editing machine and a recording VTR
In order to receive control data exchanged between and record and play back video, the IN point of the recording VTR,
By simply setting the OUT point as an address, the necessary video can be recorded and reproduced without an operator giving an IN point and an OUT point to the semiconductor recording device, and editing can be performed by one system.
Further, according to the present invention, an editing machine having no recording control unit can be used, and the configuration becomes simpler.

[Brief description of the drawings]

FIG. 1 is a block diagram showing one embodiment of a semiconductor memory device according to the present invention.

FIG. 2 is a system diagram showing one embodiment of a video editing system using a semiconductor storage device according to the present invention.

FIG. 3 is a diagram showing the contents of a material VTR tape.

FIG. 4 is a diagram showing a video that is finally desired to be recorded on a recording VTR.

FIG. 5 is a diagram showing a portion where a recording VTR runs in a first edition.

FIG. 6 is a diagram showing a portion where a recording VTR runs in a second edition.

FIG. 7 is a diagram showing an embodiment of a system for performing dubbing editing by a conventional editing system.

FIG. 8 is a diagram showing an embodiment of a system for performing dissolve editing in a conventional editing system.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 video input unit 2 video memory 3 video memory 4 video output unit 5 time code: memory address correspondence table 6 address generation unit 7 control signal input unit 8 control signal analysis unit 9 editing machine 10 VTR 11 semiconductor recording device 12 video synthesis device 13 Recording VTR 14 Editing machine 15 VTR 16 Video synthesizing device 17 Video recording device 18 Editing machine 19 VTR 20 Video recording device 21 Video synthesizing device 22 Recording VTR

Claims (2)

(57) [Claims] A control signal input unit, a video signal input unit, and a video signal output unit, wherein the control signal input unit is connected to the control signal input unit;
A control signal analyzing unit for analyzing a time code and an edit-on bit externally supplied through the control signal input unit and transmitting time code data and edit-on data corresponding to the time code and the edit-on bit; Receiving the time code data and the edit-on data, transmitting an address corresponding to the time code data, and a read request signal and a write request signal in accordance with the edit-on data; A storage table for storing the time code data and edit-on data sent from the analysis unit, and a storage table connected to the storage table and the control signal analysis unit, and referring to the data stored in the storage table, Address, the read request signal, and the write request signal An address generating means comprising an address generating unit for transmitting, and an address connected to the address generating means and having an address corresponding to the address, wherein the address, the read request signal and the write request signal are transmitted. Receiving a video input from the video input unit, and reproducing and outputting the recorded video to the video signal output unit; and a first video memory and a second video memory. When one video memory is in a writing state, the second video memory is in a reading state, and conversely,
2. The semiconductor recording device according to claim 1, wherein said second video memory is in a writing state when said first video memory is in a reading state. 2. A video editing system for editing a plurality of videos recorded in a VTR by an editing machine connected to a VTR, a recording VTR, and a video synthesizing apparatus, wherein VTR, the video synthesizing device,
And a control signal input unit, a video signal input unit, a video signal output unit, and first and second video memories connected to the video signal input unit and the video signal output unit. A semiconductor recording device is provided, and when recording any one of the plurality of videos (hereinafter, referred to as a first video) from the VTR to the recording VTR, the editing machine sends the recording VTR and the video to the recording VTR. A time code indicating the recording position of the first video and an edit-on bit for a recording instruction are sent to the control signal input section of the semiconductor recording device, and the time code and the edit-on bit are transmitted to the semiconductor recording device. After analyzing the data, the data of the time code and an address corresponding to the time code are stored, and the address and the write signal are transmitted to the first video memory. After the first video is recorded in the first video memory according to the address and the write signal, the first video in the first video memory is received upon receiving an address corresponding to a running position of the recording VTR. 1 is output from the video output, and when the recording VTR reaches a position where the second video is to be synthesized, the second video is output from the video output, and the first video and the first video are output. And the second video are combined by the editing machine, and are recorded on the recording tape of the recording VTR until the second video is completed. In the second video memory, the video is input from the video signal input unit. The first and second images are recorded, and the combined image of the first and second images is recorded as the recording VT.
R, the recording VTR is cued up to the cue-up point of the first video, and set so as to be located just before the position where the third video is to be synthesized by the VTR. Cue up the VTR to the cue-up point of the first video, start recording,
In the second video memory, a video in which the first and second video are combined is reproduced, and the third video is read from the VTR.
Is input, the first to third images are combined, and the resultant is recorded on the recording VTR through the image signal output unit.
(N is an integer) video editing method characterized in that image is synthesized.