JP2740734B2 - Clock device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a timepiece device, and more particularly, to a timepiece device suitable for displaying the current time in a device such as a fan heater.

[0002]

2. Description of the Related Art Conventionally, there has been known a clock device which is provided in a device such as a fan heater and displays the current time. This type of clock device includes clock means for measuring the current time, and clock control means such as a microcomputer for controlling the clock means, and is generally incorporated in a control device for a device such as a fan heater. Power is supplied from a household outlet together with the control device.

[0003] By the way, in this type of timepiece device, the microcomputer is not operated when a power failure occurs,
There is a disadvantage that the time of the clock means is erased and the user must reset the current time after the power is restored.

Therefore, there is a type in which a capacitor is provided to back up the power supply to the microcomputer in the event of a power failure, so that the power supplied from the capacitor keeps the microcomputer energized even during the power failure. For example, when responding to a power outage time of up to 3 minutes,
Provide a capacitor with a capacity capable of supplying power for 3 minutes.
As a result, if a power failure occurs within three minutes, the current time can be displayed even during the power failure.

[0005] However, in general, a large-capacity capacitor capable of backing up the power supply to the microcomputer for three minutes is very expensive and disadvantageously increases the cost of the product.

[0006]

The present invention eliminates such inconveniences, and the present invention is inexpensive and simple in configuration, and can accurately correct the time of the clock means when power is restored even if there is a power failure. It is an object to provide a simple clock device.

[0007]

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention relates to a clock device comprising a clock unit for measuring a current time and a clock control unit for controlling the clock unit. A capacitor that is charged when the means is energized and discharged during a power failure ;
And nonvolatile storage means for storing information about time of the data and the clock means shows the relationship between the amount of discharge, when energized
The capacitor was charged and then forced to discharge
Then, a forced discharge means for charging again is provided, and the timepiece control means controls the capacitor by the forced discharge means when the power is supplied.
The relationship between the discharge time and the amount of discharge obtained by discharging the sensor
Write data to the storage means, write information about the time of the clock means to the storage means at the time of power failure, and show the relationship between the discharge time and the discharge amount of the capacitor at the time of power recovery
Data and information on the time of the clock means
An information writing / reading means for reading from the storage means, a discharge amount detecting means for detecting a discharge amount of the capacitor at the time of power recovery, and a power failure based on the discharge amount detected by the discharge amount detection means at the time of power recovery and the data. Power outage time calculating means for calculating the time spent,
Current time correction means for correcting the time of the clock means by adding the power failure time calculated by the power failure time calculation means to the time of the clock means stored in the storage means at the time of the power failure. .

[0008]

Further, in the present invention, it is preferable that the amount of discharge at the time of restoration of the capacitor is a difference between the amount of charge at the time of restoration of the capacitor and a reference value.

In this case, it is preferable that the reference value is a charge amount of the capacitor during energization after a lapse of a predetermined time from the start of energization or a charge amount of the capacitor immediately after a power failure.

[0011]

According to the timepiece device of the present invention, first, when energized,
The capacitor is charged sufficiently by forced discharge
At the time point, the capacitor is forcibly discharged. This and
Data indicating the relationship between the discharge time and the amount of discharge of the capacitor.
Data, and record the data with information writing / reading means.
Write it in memory. When data collection is completed
And charge the capacitor again.

When a power failure occurs , information of the clock control means
The time of the clock means at the time of the power failure is written by the writing / reading means.
It is stored in memory. During a power outage, the capacitor is discharged
And its charge gradually decreases.

Thereafter , when the power is restored, the discharge amount detecting means
To detect the amount of discharge of the capacitor
Means for reading the data. Next, discharge amount detection
And the amount of discharge of the capacitor detected by the output means.
Time during which the power outage time calculation means based on the data
Is calculated.

[0014] Then, at the time of a power failure,
The time of the clock means is read out by the current time correction means.
The power outage time calculation means calculates the time of the clock
The power outage time is added to correct the time of the clock means.

The amount of discharge of the capacitor in the timepiece device of the present invention is determined by the difference between the reference value and the amount of charge of the capacitor detected at the time of power restoration.

The reference value is a charge amount of the capacitor at the time of energization after a lapse of a predetermined time from the start of energization.
This is the amount of charge when the capacitor is fully charged. Alternatively, the reference value is the charge amount of the capacitor immediately after the power failure, that is, the charge amount when the capacitor starts discharging.

[0017]

An embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing a schematic configuration of one embodiment of the present invention, FIG. 2 is a circuit diagram showing a main part of FIG. 1, and FIG. 3 is a circuit diagram of a main part of another embodiment.

The timepiece device of the present embodiment is provided, for example, in a fan heater (not shown) or the like, and is suitable for operating or stopping the fan heater at a desired time. As shown in FIG. 1, the clock device includes a clock unit 1 for measuring the current time, and a clock control unit 2 for controlling the operation of the clock unit 1 by a microcomputer or the like. Is connected to the fan heater control means 3 for controlling the operation of the fan heater.

The clock means 1 has a current time display section 4 for displaying the current time. The clock control means 2 is provided with a capacitor C which is charged when energized and discharged when a power failure occurs. The capacitor C is not for backing up the power supply of the timepiece control means 2 but for detecting the amount of discharge as described later, so that its capacity may be smaller than that for the backup. Furthermore,
The clock control means 2 has EEP as a non-volatile storage means.
A ROM 5 is provided.

Note that a backup means such as a capacitor (not shown) is provided for maintaining the state of power supply to the clock control means 2 for 0.5 seconds even when the supply of electricity is stopped due to a power failure or the like. .

To explain each part in more detail, as shown in FIG. 1, the clock control means 2 comprises a power failure detection part 6, an information writing / reading part 7, a discharge amount detection part 8, a power failure time calculation part 9, A current time correction unit 10 is provided. The power failure detection unit 6 detects that a power failure has occurred and also detects that power has been restored. The information writing / reading unit 7 writes the time information of the clock means 1 and the discharge data of the capacitor C, which will be described later, into the EEPROM 5 when a power failure occurs.
This information is read from the EPROM 5.
The discharge amount detection section 8 detects the discharge amount of the capacitor C. Here, in the present embodiment, the charge amount of the capacitor C during energization after a lapse of a predetermined time from the start of energization to the capacitor C, that is, the charge amount when the capacitor C is sufficiently charged is set as a reference value. The difference between the reference value and the charge amount of the capacitor C when the power
Of discharge. Note that this reference value may be used as the charge amount of the capacitor C immediately after the power failure.

The power outage time calculating section 9 calculates the power outage time based on the discharge amount of the capacitor C at the time of power recovery. Then, the current time correction unit 10 includes the power outage time calculation unit 9
Is to correct the time of the clock means 1 on the basis of the power outage time obtained by the above.

As shown in FIG. 1, the capacitor C is provided with a forced discharging means 11 for forcibly discharging the charged capacitor C when energized. The circuit added to the capacitor C including the forced discharging means 11 will be described. As shown in FIG. 2, R ₁ is a charging resistor, and R ₂ is a discharging resistor. Tr ₁ is an input control transistor for inputting the voltage of the capacitor C to the discharge amount detector 8 when the power is restored. The detection of the discharge amount is specifically a work by the CPU, and an A / D input port is used as the input port. The capacitor C is sufficiently charged for a predetermined time by the charging resistor R _1. Tr ₂ is a charge / discharge control transistor as the forced discharge means 11 and controls charging and discharging of the capacitor C when energized. The charge / discharge control transistor Tr ₂ forcibly discharges the capacitor C when the capacitor C is sufficiently charged during energization, and the CPU processes data indicating the relationship between the discharge time and the discharge amount at that time. Thereafter, the data is written into the data storage unit 12 of the EEPROM 5 by the information writing / reading unit 7.
At this time, the charge voltage of the capacitor C every 10 seconds after the start of the discharge of the capacitor C is represented by CP.
A / D input is performed by an input transistor Tr ₁ whose bias is controlled by U. Thus, the data storage unit 12 stores a plurality of data corresponding to the charging voltage level of the capacitor C every 10 seconds. When the data collection is completed, the charge / discharge control transistor Tr
₂ causes the capacitor C to be charged again.

Next, the operation of the control device of this embodiment will be described. First, as described above, the capacitor C, which has been sufficiently charged when energized by the forcible discharging means 11, is forcibly discharged, and the data is written by the information writing / reading unit 7 to the EEPROM.
After being stored in the data storage unit 12 of M5, the capacitor C is charged again.

When a power failure occurs, the information writing / reading unit 7
The time information of the clock means 1 is written in the current time storage unit 13 of the EEPROM 5. The writing to the EEPROM 5 is performed during 0.5 seconds during which the power is maintained by the backup means (not shown). During a power outage, the capacitor C is discharged, and its charge gradually decreases. At this time, since the capacitor C, even power failure time is relatively long, it is possible to set the discharge time by the value of the discharge resistor R _2, for example, the ratio in the case of backing up the power supply to the clock control unit 2 Then, the capacity may be small.

When the power is restored, the discharge amount of the capacitor C is detected by the discharge amount detecting section 8. Thus, first, the charge voltage value of the capacitor C detected by the discharge amount detection unit 8 is compared with a plurality of data stored in the data storage unit 12 of the EEPROM 5. Then, the power outage time calculation unit 9 finds the closest value among the plurality of data, and sets the time corresponding to the data as the power outage time.
Next, the current time correction unit 10 adds the power outage time found by the power outage time calculation unit 9 to the time of the clock unit 1 at the time of the power outage stored in the current time storage unit 13 of the EEPROM 5, and Correct the time of. in this way,
There is no need to reset the time of the clock means 1 again after the power is restored, and even if there is a variation in the product of the capacitor C, the data indicating the relationship between the discharge time and the discharge amount of the capacitor C used is stored. Since the power outage time is calculated based on the time, the time of the clock means 1 can be corrected very accurately. Then, the clock means 1 is automatically set according to the time corrected by the current time correction unit 10.

[0028]

[0029]

As is apparent from the above description, the present invention
In the timepiece device, the forced discharge means is provided to strengthen the capacitor.
Between discharge time and discharge amount
Is written in the storage means by the information writing / reading means.
The capacitor may have errors in the product, etc.
Even so, accurate data can be collected in advance.

When a power failure occurs and the power is restored,
The time information of the clock means stored in the storage means is read.
And discharge of the capacitor by the discharge amount detection means.
The power outage time calculation means detects the amount of
Calculate the time of power outage based on the above data
Thus, an accurate power outage time can be obtained. And then
The time is stored in the storage unit at the time of the power failure by the time correction unit.
The power failure calculated by the power failure time calculation means at the time of the clock means
Add the time and correct the time of the clock means.
In addition to eliminating the hassle of rework, etc.,
The time of the measuring means can be corrected.

Further, since a capacitor for detecting the amount of discharge is provided, it can be constructed at a lower cost than a case where a large-capacity capacitor for backup at the time of power failure is provided.
Product cost can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of an embodiment of the present invention.

FIG. 2 is a circuit diagram showing a main part of FIG. 1;

FIG. 3 is a circuit diagram of a main part of another embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Clock means, 2 ... Clock control means, 5 ... Storage means, 7 ...
Information writing / reading means, 8: Discharge amount detecting means, 9: Power failure time calculating means, 10: Current time correcting means, 11: Forced discharging means, C: Capacitor.

Claims (4)

(57) [Claims] 1. A clock device comprising: clock means for measuring a current time; and clock control means for controlling the clock means. A capacitor which is charged when power is supplied to the clock control means and discharged when a power failure occurs, Discharge time and discharge of the capacitor
And nonvolatile storage means for storing time information about the data and the clock means shows the relationship between the amount, the when energized
Charge the capacitor, then force discharge, then
And a forced discharging means for charging and discharging the battery , wherein the timepiece control means controls the capacitor by the forced discharging means when energized.
Data showing the relationship between discharge time and discharge amount obtained by discharging
Writing over data in the storage means, before the information about the time of the clock means to the storage means at the time of power failure writing, the power recovery
Data showing the relationship between discharge time and discharge amount of the capacitor
And information relating to the time of the clock means.
An information writing / reading means for reading from the power supply, a discharge amount detecting means for detecting a discharge amount of the capacitor at the time of power recovery, and a power failure based on the discharge amount detected by the discharge amount detection means at the time of power recovery and the data. A power outage time calculating means for calculating time, and a current time for correcting the time of the clock means by adding the power outage time calculated by the power outage time calculating means to the time of the clock means stored in the storage means at the time of the power outage A timepiece device comprising correction means. 2. The discharge amount at the time of power restoration of the capacitor is
2. The timepiece device according to claim 1 , wherein the difference is a difference between a charge amount at the time of power restoration of the capacitor and a reference value . 3. The method according to claim 1, wherein the reference value is a predetermined time after the start of energization.
3. The timepiece device according to claim 2, wherein the amount of charge of the capacitor at the time of energization after the power supply is performed . 4. The method according to claim 1, wherein the reference value is a charge of a capacitor immediately after a power failure.
Watch according to claim 2, wherein it is a coulometric.