JP2723711B2 - Display integrated tablet device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display-integrated tablet device used for a personal computer, a word processor and the like.

[0002]

2. Description of the Related Art As means for inputting handwritten characters and figures into a computer or a word processor, for example, a liquid crystal display is combined with an electrostatic induction type tablet.
Characters and figures input to an electrostatic induction type tablet have been put into practical use as if they were input on paper as if they were written with a writing instrument, and displayed on a liquid crystal display. However, in this electrostatic induction type tablet, since the reflectance and transmittance are different between the portion with and without the electrodes, the electrodes are seen in a grid pattern on the display screen, causing a deterioration in the quality of the liquid crystal display. . Accordingly, the present inventor has recently proposed a display-integrated tablet device as shown in FIG. 15 as a tablet that has eliminated such disadvantages (Japanese Patent Application No. Hei 3-0467).
No. 51). In this display-integrated tablet device, the display electrodes of the liquid crystal display also serve as coordinate detection electrodes, and coordinate detection and display are performed in a time-division manner within one frame as shown in FIG. In FIG. 15, a liquid crystal panel 1 has common electrodes Y arranged in a direction crossing each other.
(Y ₁ -Yn) segment is constituted by a liquid crystal layer interposed between the electrodes X (X ₁ through XM), the liquid crystal layer in a portion where the common electrode Y and the segment electrode X intersect with each pixel Has become. That is, here, pixels of n × m dots are arranged in a matrix. Compared to a tablet with a tablet on the above-mentioned liquid crystal display, this display-integrated tablet has the advantage of eliminating the grid-like electrode pattern, making it easier to see. There is an advantage that reduction in size and weight is facilitated. A common drive circuit 2 for driving the common electrode Y and a segment drive circuit 3 for driving the segment electrode X are connected to a display control circuit 5 and a position detection control circuit 6 via a switching circuit 4. I have. The switching circuit 4 is controlled by a control circuit 7, and outputs an output from the display control circuit 5 to the driving circuits 2 and 3 during a display period, and outputs a position detection control circuit 6 during a coordinate detection period.
Are output to the driving circuits 2 and 3.

During the display period, the display control circuit 5 receives the shift data S from the output terminal S, the inverted signal FR from the output terminal FR, and the clock CP from the clock output terminal CP1.
1 and the clock CP2 from the clock output terminal CP2.
Display data D0 to D3 are output from data output terminals D0 to D3, respectively. The clock CP1 is a clock having a cycle of a scanning period for scanning one row of pixels. The clock CP1 is sent from the output terminal CP10 of the switching circuit 4 to the clock input terminal CK of the common drive circuit 2 and the latch pulse input terminal LP of the segment drive circuit 3. Is entered. Also, the shift data S
Is a pulse signal for designating each common electrode Y, is output from the output terminal S0 of the switching circuit 4, and is input from the shift data input terminal D101 of the common drive circuit 2 in synchronization with the clock CP1. In response to the shift of the shift data S, a drive signal is output to the common electrode Y from the output terminals 01 to n of the common drive circuit 2 corresponding to the shift position. This drive signal is supplied to the DC power supply circuit 12.
Is generated based on the biases V0 to V5 supplied from. The clock CP2 is a clock having a period obtained by dividing a scanning period for scanning pixels of one column into several periods, and is output from the output terminal CP20 of the switching circuit 4 and input to the clock input terminal XCK of the segment driving circuit 3. . The display data D0 to D3 are output terminals Dout of the switching circuit 4.
Input terminals D0 to D of the segment driving circuit 3
3 and sequentially taken into a register in the segment drive circuit 3. When the display data corresponding to the pixels of one row is fetched, the latch pulse input terminal L
These display data are latched at the timing of the clock CP1 input to P, and drive signals corresponding to the respective display data are output from the output terminals 01 to m of the segment drive circuit 3 to the segment electrodes X. This drive signal is also created based on the biases V0 to V5 supplied from the DC power supply circuit 12. The inversion signal FR is a signal for periodically inverting the polarity of the voltage applied to the liquid crystal to prevent the liquid crystal from being deteriorated by electrolysis. By the operation of the common drive circuit 2 and the segment drive circuit 3, the pixels of the liquid crystal panel 1 are driven according to the row order, and an image corresponding to the display data is displayed on the liquid crystal panel 1.

On the other hand, during the coordinate detection period, the position detection control circuit 6 receives the shift data Sd from the output terminal Sd, the inverted signal FRd from the output terminal FRd, and the clock output terminal CP1d.
To output a clock CP1d, a clock output terminal CP2d to output a clock CP2d, and data output terminals D0 to D3 to output drive data D0d to D3d, respectively. Clock C
P1d is a clock having a period of a scanning period for scanning the common electrodes for one row, and is an output terminal CP of the switching circuit 4.
10 is input to the clock input terminal CK of the common drive circuit 2 and the latch pulse input terminal LP of the segment drive circuit 3. The shift data Sd is a pulse signal for specifying each common electrode Y, is output from the output terminal S0 of the switching circuit 4, and is synchronized with the clock CP1d from the shift data input terminal D101 of the common drive circuit 2. Is entered. In accordance with the shift of the shift data Sd, a drive signal is output to the common electrode Y from the output terminals 01 to n of the common drive circuit 2 corresponding to the shift position. This drive signal is generated based on biases V0 to V5 supplied from DC power supply circuit 12. Clock CP
2d is a clock having a cycle of a scanning period for scanning the segment electrodes X for one column, which is output from the output terminal CP20 of the switching circuit 4 and input to the clock input terminal XCK of the segment driving circuit 3. Drive data D0 to D3
Are output from the output terminal Dout of the switching circuit 4, input to the input terminals D0 to D3 of the segment driving circuit 3, and sequentially taken into registers in the segment driving circuit 3. When drive data corresponding to the segment electrodes X for one row is fetched, these drive data are latched at the timing of the clock CP1d input to the latch pulse input terminal LP, and the drive signal corresponding to each drive data is latched. Are output from the output terminals 01 to m of the segment driving circuit 3 to the segment electrode X. This drive signal is also created based on the biases V0 to V5 supplied from the DC power supply circuit 12. The inversion signal FRd is a signal for periodically inverting the polarity of the voltage applied to the liquid crystal to prevent deterioration of the liquid crystal due to electrolysis, but does not invert during the coordinate detection period.

FIG. 17 is a diagram showing the drive timing of the display-integrated tablet in the coordinate detection period. The coordinate detection period is divided into an X coordinate detection period and a subsequent Y coordinate detection period.
During the Y coordinate detection period, a pulse voltage signal is sequentially applied to the common electrode Y. By the application of the pulse voltage signal, an electrostatic induction voltage is induced in the detection pen 8 by the stray capacitance between the electrodes X and Y and the position detection pen (hereinafter, referred to as detection pen) 8. The induced voltage of the detection pen 8 is amplified by an operational amplifier (hereinafter referred to as “op-amp”) 9, and X
It is input to the coordinate detection circuit 10 and the Y coordinate detection circuit 11. The X-coordinate detection circuit 10 and the Y-coordinate detection circuit 11 detect the time until the induced voltage reaches the maximum value based on the output signal from the amplifier 9 and the timing signal from the control circuit 7, The X coordinate and the Y coordinate of the position indicated by the detection pen 8 are detected. Note that, in order to reduce the length of the coordinate detection period, the coordinate detection scan is performed at a higher speed than the display scan.

[0006]

However, the above-mentioned display-integrated tablet device has the following problems. First, there is a problem that noise from clothes or the like gets on the detection pen 8 and malfunctions occur. Clothes processed with synthetic fibers, cloth stretched on chairs, and underwear processed with different types of fibers are often charged to a high voltage due to friction. It becomes noise. Further, even when the clothes and the like are not charged, contact with the detection pen 8 causes charging due to friction, which causes noise. Further, noise may be put on the detection pen 8 from a device placed around the display-integrated tablet device during operation. Thus, noise is detected by the detection pen 8
If you ride, wrong coordinates will be detected. In particular, if the erroneously detected coordinate is a so-called menu selection position, a menu not intended by the operator is selected, and the operator is greatly confused. Second, there is a problem that the display image quality is reduced and power consumption is increased with the coordinate detection scanning. The display integrated tablet device,
Since the display period and the coordinate detection period are set, if the display period of one screen is the same length as the display period of the display-only liquid crystal display panel, the frame frequency becomes lower as it is. For this reason, when the liquid crystal display panel is of a reflection type, flicker occurs due to the afterglow characteristics of the fluorescent lamp illuminating the room and the combination of the power frequency of the fluorescent lamp and the frame frequency of the liquid crystal display panel. Sometimes (degraded image quality).
In addition, the coordinate detection scan is performed at a higher speed than the display scan, and thus consumes a large amount of power. However, since the display-integrated tablet device always has the coordinate detection period following the display period, the power consumption is low. Increase to a degree that cannot be ignored.

Accordingly, an object of the present invention is to provide a display-integrated tablet device which can prevent malfunction due to noise of a detection pen and can suppress a decrease in image quality and an increase in power consumption due to coordinate detection scanning to a level that does not cause a problem. Is to do.

[0008]

In order to achieve the above object, a display-integrated tablet device according to the present invention comprises:
A plurality of first electrodes arranged in different directions from each other
And a second electrode, wherein the first electrode and the second electrode intersect
A display panel having a pixel corresponding to the position can be set in a time division display period and the coordinate detection period, the display period, both the image display when sequentially applies the image display voltage to the both electrode groups A control drive circuit for sequentially applying a coordinate detection voltage to the two electrode groups during the coordinate detection period while periodically inverting the polarity of the application voltage, and a designated electrode of the two electrode groups on the display panel surface. A detection pen capable of inducing an electrostatic induction voltage by capacitive coupling with the detection pen, receiving the electrostatic induction voltage induced in the detection pen by the coordinate detection voltage during the coordinate detection period, and based on the received electrostatic induction voltage. A display integrated tablet device comprising a coordinate detection circuit that detects and outputs coordinates indicated by the detection pen.
Receiving the electrostatic induction voltage induced in the detection pen by the polarity inversion of the image display voltage during the display period; comparing the received electrostatic induction voltage with a preset reference voltage; When the electro-induction voltage is higher than the reference voltage, it is determined that the detection mode should perform the coordinate detection. A mode detection circuit that outputs a mode signal representing the coordinates, a coordinate output from the coordinates detection circuit and a mode signal output from the mode detection circuit, and the coordinates are output as they are when the mode signal indicates a detection mode. And a coordinate output selection circuit for stopping the output of the coordinates when the mode signal indicates the non-detection mode. In addition,
The polarity of the image display voltage is reversed several times within one frame display period.
And its inversion is a natural number multiple of one electrode scanning cycle.
It is desirable to be synchronized in the period.

It is preferable that the mode detection circuit has a peak detector that receives the electrostatic induction voltage and generates a DC voltage proportional to the peak value of the received electrostatic induction voltage.

An amplifier circuit for amplifying the electrostatic induction voltage induced in the detection pen is provided, and the coordinate detection circuit and the mode detection circuit branch and receive the electrostatic induction voltage amplified by the amplifier circuit. It is desirable.

Further, it is desirable that the peak detector has a filter circuit for removing a DC component included in the received electrostatic induction voltage.

Preferably, the filter circuit is a band-pass filter having a pass band at a fundamental frequency of the AC signal.

Preferably, the filter circuit includes a capacitor formed by using a dielectric covering the tip of the electrode of the detection pen.

The peak detector synchronizes with the timing at which the polarity of the AC signal is inverted, integrates the electrostatic induction voltage during a period in which the electrostatic induction voltage rises, and generates the DC voltage. It is desirable to create

When the mode detection circuit determines to shift from the detection mode to the non-detection mode, after the output voltage of the peak detector temporarily falls below the reference voltage,
It is desirable to output a mode signal indicating the determination result to shift to the non-detection mode only when the value is still below the predetermined period.

A plurality of values of the reference voltage are provided,
It is desirable that the value is set to be higher in the case of transition from the detection mode to the non-detection mode than in the case of transition from the non-detection mode to the detection mode.

The control drive circuit receives a mode signal output from the mode detection circuit and sets both the display period and the coordinate detection period in a time-sharing manner when the mode signal indicates a detection mode. It is desirable to have means for setting only the display period when the mode signal indicates the non-detection mode.

It is preferable that the control drive circuit has a means for controlling the image data transfer rate in the display period set in the detection mode and the display period set in the non-detection mode in the same manner.

Further, the control drive circuit is configured to control the image data during the display period in the detection mode more than the display period in the non-detection mode so that the frame frequency in the detection mode and the frame frequency in the non-detection mode are substantially the same. It is desirable to have a means for transferring data at high speed. doing.

The present invention has been created by the following consideration and analysis by the present inventors.

The present inventor has investigated how a device having a tablet function is actually used. According to the survey, in many cases, input means such as a keyboard is used in many cases, and a tablet is not used as an input means within the entire lighting time (total use time) of the apparatus. In addition, even during the time when the tablet is used as the input means, the operator's thinking time, the processing time of the device, the exchange of information with the terminal, the operation of the operator, the call to the operator, the interruption of the visitor Due to work, etc., the detection pen is
(Here, the liquid crystal display panel surface; hereinafter, simply referred to as the “panel surface”.) The longer the time, the longer the detection pen approaches the panel surface is one of the total use time of the device.
Less than a percentage. Therefore, if the coordinate detection period is set only when the detection pen is approaching the panel surface, and only the display period is set when the detection pen is separated from the panel surface, the image quality is actually reduced. It is possible to improve power consumption. In addition, if only the detection coordinates when the detection pen is approaching the panel surface are valid, and when the detection pen is invalid when the detection pen is away from the panel surface, the detection pen may be affected by noise such as clothing. Malfunction can be prevented.

Here, how to determine whether or not the detection pen is approaching the panel surface, that is, whether or not the coordinate detection should be performed, becomes a problem.

In general, a method is known in which a mode switch to be operated by an operator is provided on a side surface of the detection pen, and a micro switch which responds when lightly pressed is provided at the tip of the detection pen. However, the method using the mode switch on the side of the detection pen is cumbersome to operate, and is a method that ignores the position of the operator. In addition, the method using the microswitch at the tip of the detection pen slightly delays the start of detection.
(For example, characters such as "dots"), it is difficult to extract features, and recognition may be erroneous. Moreover, it is not possible to bring the detection pen closer to the expected input point to some extent without touching it, for example, to display a cursor with a “+” mark at the expected input point. This is because the micro switch does not work unless it contacts the panel surface.

Under such circumstances, the present inventor has paid attention to the fact that a spike-like electrostatic induction voltage is induced in the detection pen by the AC signal for inverting the voltage between the electrodes of the liquid crystal. This situation will be described in detail with reference to the drawings. FIG. 12 shows the drive timing of the display-integrated tablet device shown in FIG. The alternating signal (inversion signal) FR is inverted several tens of times during the display of one frame so that the average value of the voltage between the electrodes of the liquid crystal becomes zero. When the inversion signal FR is at a low level, the selection voltages for the common electrode Y and the segment electrode X are V ₀ and V ₅ , respectively, and are described as “ON” in FIG. On the other hand, when the inversion signal FR is at a high level, the selection voltages for the common electrode Y and the segment electrode X are V ₅ and V ₀ , respectively.
It is written. The display is performed only in the pixel in which both the crossing common electrode Y and the segment electrode X are “ON”, and the display is not performed in the pixel in which one or both of the common electrode Y and the segment electrode X are not “ON”. That is, display is performed only in a pixel in which the absolute value of the voltage between both electrodes Y and X is | V ₅ −V ₀ |
The voltage polarity between X is determined by the inverted signal FR. In this example, the polarity of the inversion signal FR is inverted at times t ₀ , t ₃ , and t ₆ , and at this time, the voltages of all the common electrodes Y and the segment electrodes X are simultaneously changing. At this time, the detection pen 8
Is placed on the panel surface, a spike-like electrostatic induction voltage is induced as shown in the lower part of FIG. 12 by capacitive coupling with the electrodes Y and X. The induced electrostatic induction voltage hardly depends on the display contents, and as shown in FIG.
Greatly depends on the distance between the panel and the panel surface. That is, as the detection pen 8 moves away from the panel surface, the peak value of the electrostatic induction voltage becomes smaller (see FIGS. 14B and 14C).
Shows waveforms when the detection pen 8 is on the panel surface and when the detection pen 8 is separated from the panel surface, respectively. ). Therefore, by comparing the magnitude of the spike voltage with the preset reference voltage, it is possible to know whether or not the detection pen 8 is approaching the panel surface.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to embodiments.

FIG. 1 shows the overall configuration of a display-integrated tablet device according to a first embodiment of the present invention, and FIG. 2 shows the configuration of a main part of the display-integrated tablet device. The common drive circuit 2, the segment drive circuit 3, the switching circuit 4, the display control circuit 5, and the position control circuit 6 constitute a control drive circuit. The same components as those of the conventional display-integrated tablet device shown in FIG. 12 are denoted by the same reference numerals. As shown in FIG. 1, the detection pen 8 is connected to the panel surface 1a.
When the detection pen 8 is placed at the timing, the polarity of the AC signal FR shown in FIG. 12 is inverted (at the same time, the image display voltage, that is, the common electrode drive signal and the segment electrode drive signal are also inverted). A spike-like electrostatic induction voltage is induced. This electrostatic induction voltage is linearly amplified by an operational amplifier 9 connected to the detection pen 8. As shown in FIG. 2, the output side of the operational amplifier 9 has an analog gate 2
0,21 are connected. In addition, analog gate 2
The X coordinate detection circuit 10 and the Y coordinate detection circuit 11 are connected to 0, and the mode detection circuit 23 is connected to the analog gate 21, respectively. The analog gate 21 receives the control voltage gm during the display period and opens, and closes during the coordinate detection period. On the other hand, the analog gate 20 is closed during the display period, and is opened by receiving the control voltage gt during the coordinate detection period. Therefore, the electrostatic induction voltage induced in the detection pen 8 is branched at the output side of the operational amplifier 9 and during the display period, the mode detection circuit 2 passes through the analog gate 21.
The signal is supplied to the X coordinate detection circuit 10 and the Y coordinate detection circuit 11 through the analog gate 20 during the coordinate detection period. The reason for branching after the electrostatic induction voltage is amplified by the operational amplifier 9 is that the magnitude of the electrostatic induction voltage induced in the detection pen 8 is on the order of several tens of mV, and if the branching is performed as it is, the detection accuracy is reduced due to noise. It is because it falls. The mode detection circuit 23 receives the electrostatic induction voltage induced by the detection pen 8 during the display period through the operational amplifier 9 and the analog gate 21. This mode detection circuit 23
Compares the received electrostatic induction voltage with a preset reference voltage, and determines the detection mode in which coordinate detection should be performed when the electrostatic induction voltage is higher than the reference voltage. On the other hand, when the electrostatic induction voltage is smaller than the reference voltage, the non-detection mode in which the coordinate detection is not performed is determined. And
A mode signal (high-level or low-level binary information) representing this determination result is output. As the mode signal,
An analog value or several levels can be used, but in this case, binary information is sufficient. As shown in FIG. 1, the mode signal output from the mode detection circuit 23 is
Along with the coordinates output by the X coordinate detection circuit 10 and the Y coordinate detection circuit 11 during the coordinate detection period, the coordinate output selection circuit 1
3 is supplied. When the mode signal indicates the detection mode, the coordinate output selection circuit 13 outputs the received coordinates as they are. On the other hand, when the mode signal indicates the non-detection mode, the output of the coordinates is stopped, for example, all the coordinate outputs are ignored or a signal indicating the origin of the XY coordinates is output. As described above, it is possible to determine whether the coordinates output by the coordinate detection circuits 10 and 11 are normal or noise based on the mode signal output by the mode detection circuit 23. Therefore, malfunction due to noise of the detection pen 8 can be prevented.

As shown in FIG. 12, the electrostatic induction voltage has a spike-like differential waveform. It is difficult to directly compare the peak value of this waveform with the reference voltage. Therefore, as shown in FIG.
A peak detector 24 for converting a spike-like differential waveform into a DC voltage is provided. The peak detector 24 includes a differential amplifier OP _1, the diodes D _1, D _2, resistors Rs, Rf and a capacitor C _1, C _2, is composed of a reset circuit RC, electrostatic induction voltage When Vs (having a positive or negative peak value) is input, a DC voltage Vo proportional to the peak value is created. The created DC voltage Vo is equal to the output side capacitor C ₂
Is stored in The reset circuit RC includes, for example, a field effect transistor (FET), and can reset the voltage Vo generated in the previous frame before the start of display in each display period. On the other hand, the input side capacitor C ₁
A filter circuit (high-pass filter) is configured to remove a DC component included in the electrostatic induction voltage Vs. Therefore, it is possible to prevent noise from entering the circuit when the electrode of the detection pen 8 generates a DC voltage due to frictional charging with clothing or the like. Note that the installation location of the capacitor C ₁ is not limited to the mode detection circuit 23, an operational amplifier 9, the analog gate 21, may be provided in any vessel detection pen 8. Further, the capacitor C _1, as shown in FIG. 4 (a), the detection electrodes (electrode tip) 80 of the detection pen 8 may be constituted covered with a dielectric layer 8a. The material of the dielectric layer 8a is resin or glass, and the thickness is about 0.2 mm. According to this method, it is not necessary to particularly connect a single capacitor, and the structure can be simplified.
In addition, erroneous input can be significantly improved when the finger of the operator comes into contact with the electrode tip portion 80 or the like. However,
In the structure shown in FIG. 4A, when a character is written many times on the panel surface 1a, the dielectric layer 8a is worn and the electrode tip 80
May be exposed, and may no longer serve its purpose. Fig. 4 (b)
In order to avoid such a problem, a dielectric ball 8b having a rounded shape is provided at the electrode tip portion 80 in FIG.

The detecting pen 8 is, as shown in FIG.
A configuration in which the micro switch 84 is incorporated may be adopted.
The detection pen 8 includes a substantially cylindrical plastic (dielectric) case 82 having a tapered end 82a, and a detection electrode 81 fitted inside the end 82a of the case 82.
And a pen core 83 slidably fitted in the opening at the tip of the detection electrode 81. The pen core 83 has a rod shape (the material may be an insulating material such as Teflon, or may be a metal if it can be insulated from the detection electrode 81). The tip 83a is exposed outside the case 82, while the tip 83a is exposed. 83b
Is connected to a micro switch 84 in the case 82. The micro switch 84 has an electrode 85 that moves in the axial direction together with the pen core 83, and electrodes 86 and 87 fixed in a case 82. The electrode 86 has a body 9
While the potential +5 V is applied from the 0 side, the electrode 87 is grounded together with the shield electrode 89. Shield electrode
89 (formed by electroless plating or the like) is provided inside (or outside) the case 82 and shields noise to the detection electrode 81. When the detection pen 8 is used, the tip of the pen core 83 is set with a pen pressure of tens of grams (spring 88).
(Press against panel surface 1a). As a result, it is detected that the electrode 85 is in contact with the electrodes 86 and 87 and the input is being performed. When the pen core 83 is separated from the panel surface 1a, the electrode 85 and the electrodes 86, 87
Are separated from each other and return to the original state. Note that the pen core 83
When is worn out, only the pen core 83 can be replaced.

It is desirable that a band-pass filter having a pass band at the fundamental frequency of the AC signal FR is provided as the filter circuit. Since the electrostatic induction voltage induced in the detection pen 8 is the same as the frequency of the alternating signal FR, if only this frequency component is passed, a necessary electrostatic induction voltage can be obtained and external noise ( Frequency components are high).

The mode detection circuit 23 rectifies the electrostatic induction voltage to obtain a DC voltage proportional to the peak value of the received electrostatic induction voltage, as shown in FIG. One frame may be integrated. Here, FIG. 3A shows the AC signal FR, and FIG. 3C shows the waveform of the received electrostatic induction voltage (including noise). Normally, the alternating signal FR in the display period is inverted every time thirteen common electrodes Y are scanned. Therefore, for example, when the number of common electrodes Y is 400, the number of inversions during one screen display is 400/13 ≒ 30, so that a DC voltage is obtained by performing the double-wave rectification and integrating the 30 pulses. Can be. As described above, by integrating a large number of pulses, the influence of noise included in the electrostatic induction voltage can be reduced, and the detection accuracy can be increased. Further, the influence of noise can be further reduced by the sampling signal shown in FIG. This sampling signal rises in synchronization with the timing at which the polarity of the alternating signal FR is inverted. Although the pulse width of the sampling signal is widely illustrated in the figure for simplicity, it is actually about the same as the pulse width of the electrostatic induction voltage shown in FIG. / 10. The electrostatic induction voltage passes through an analog gate circuit using the sampling signal as a gate, and is then rectified to obtain a waveform shown in FIG. The waveform obtained by integrating this waveform is the waveform shown in FIG. As described above, by limiting the period during which the received electrostatic induction voltage is integrated to a short period during which the sampling signal is rising, the influence of noise can be reduced. Further, the effect can be further enhanced by differentiating the waveform of the received electrostatic induction voltage to narrow the pulse width thereof and, at the same time, further narrowing the pulse width of the sampling signal.

When the operator is ready for input or thinking while holding the detection pen 8 near the panel surface 1a,
The mode determined by the mode detection circuit 23 may not be constant and may become unstable (a state corresponding to chattering in the switch). As a result, the display screen may flicker. To avoid this phenomenon,
The following two measures are effective. The first means is that when the mode detection circuit 23 determines to shift from the detection mode to the non-detection mode, the output voltage of the peak detector 24 once drops below the reference voltage, and then drops even after a predetermined period has elapsed. This is a means for making a determination to shift to the non-detection mode only when FIG. 7 shows the situation at this time. FIG. 6A shows the output voltage of the peak detector 24, and indicates that the detection pen 8 frequently contacts or separates from the panel surface 1a. When this output voltage is directly compared with the reference voltage and binarized, a waveform in which the high level and the low level are drastically interchanged as shown in FIG. However, after the output voltage once drops below the reference voltage, and only when the output voltage is still lower after the elapse of the period td, when shifting to the non-detection mode (low level), FIG.
As shown in (c), a stable waveform is obtained. The second means is a means for providing a plurality of values of the reference voltage and setting a higher value in the case of transition from the detection mode to the non-detection mode than in the case of transitioning from the non-detection mode to the detection mode. Specifically, as shown in FIG. 9, an operational amplifier OP ₂ and a Zener diode D ₃ are provided in the mode detection circuit 23.
Are combined to form a comparator having hysteresis characteristics. FIG. 8 shows the situation at this time.
FIG. 3A shows the output voltage of the peak detector 24.
Eu and El are reference voltages of different values (Eu> El). It should be noted that the numbers in FIG. 3A indicate that the output voltage is the reference voltage Eu, El.
(FIGS. 9B and 9C). When the output voltage is binarized as it is with reference to the reference voltages Eu and El, a waveform in which the high level and the low level are drastically interchanged as shown in FIGS. However, when Eu is the reference voltage when the output voltage changes from bottom to top, and when El is the reference voltage when the output voltage changes from top to bottom, as shown in FIG. A waveform is obtained. Considering this from the position of the detection pen 8, when the detection pen 8 approaches the panel surface 1a from a distance, the reference voltage Eu and the detection pen 8 are connected to the panel surface 1a.
The case where the reference voltage is separated from is equivalent to the reference voltage El. That is, when the detection pen 8 is approached to the panel surface 1a from a distance, the detection mode is not entered unless it is considerably approached, but once the detection mode is entered, the detection mode is maintained until the detection pen is farther from the entered position. Therefore, it is possible to avoid a problem that the display screen flickers.

FIG. 11 shows the overall configuration of a display-integrated tablet device according to the second embodiment. This display-integrated tablet device includes a control circuit 7 'and a display control circuit 5' instead of the control circuit 7 and the display control circuit 5 shown in FIGS. Other configurations are the same as those of the first embodiment shown in FIG. The control circuit 7 'includes a mode detection circuit 2
When the mode signal indicates the detection mode, both the display period and the coordinate detection period are set in a time-sharing manner (display / coordinate detection mode). On the other hand, when the mode signal indicates the non-detection mode, only the display period is set (display mode). The display control circuit 5 'is of a programmable type, receives a mode signal output from the mode detection circuit 23, and adjusts the transfer mode (image data transfer speed, clock signal, synchronization signal, etc.) according to the content of the mode signal. ) Can be changed. In this display-integrated tablet device, as shown in FIG. 10, first, the control circuit 7 'sets a display period and performs display scanning (step S1). During this display period, the mode detection circuit 23 compares the electrostatic induction voltage induced in the detection pen 8 with the reference voltage to determine the mode (step S2). When the electrostatic induction voltage is higher than the reference voltage, scanning is performed in the display / coordinate detection mode (step S4). When the electrostatic induction voltage is lower than the reference voltage, scanning is performed in the display mode (step S7). ). When scanning in the display / coordinate detection mode, not only the display period but also the coordinate detection period is set to perform the coordinate detection scan (step S5), and the coordinate output selection circuit 1
The coordinate values are output through 3. Thus, the detection pen 8
Operates as a tablet for a very short time approaching the panel surface 1a, and performs only display for most of the period. Therefore, image quality degradation and power consumption increase due to coordinate detection
It can be suppressed to a level that does not cause any problem in practical use.

Here, when the display period and the coordinate detection period are mixed as described above, the method of setting the image data transfer speed from the display control circuit 5 'to the liquid crystal display panel 1 and the number of frames per second are as follows. The following two cases can be considered. One is that the image data transfer speed is the same between the display mode and the display / coordinate detection mode (the same applies to the clock signal and the synchronization signal), and the display period is simply interrupted by the coordinate detection period in the display / coordinate detection mode. Settings. With this setting, the configuration of the entire apparatus can be simplified. The other is
The image data transfer speed in the display / coordinate detection mode is faster than that in the display mode (clock signals and synchronization signals are the same).
This is a setting for making the number of frames per second in the display mode and the display / coordinate detection mode the same. With this setting, it is possible to prevent the scanning period from being lengthened in the display / coordinate detection mode, and thus to prevent flickering regardless of the type of lighting equipment and power supply frequency.

[0034]

As apparent from the above, according to the present invention, each other respectively
A plurality of first and second electrodes arranged in different directions
Corresponding to the location where the first electrode and the second electrode intersect.
A display panel having a pixel that the display period and the coordinate detection period and can be set by time division, to the above display period sequentially applied to the image display voltage to the both electrodes when both the <br/> image While periodically inverting the polarity of the display voltage, a control drive circuit for sequentially applying a coordinate detection voltage to the two electrode groups during the coordinate detection period, and a command of the two electrode groups on the display panel surface. A detection pen capable of inducing an electrostatic induction voltage by capacitive coupling with an electrode; receiving the electrostatic induction voltage induced on the detection pen by the coordinate detection voltage during the coordinate detection period; A display-integrated tablet device comprising a coordinate detection circuit that detects and outputs coordinates indicated by the detection pen based on the detection pen, wherein the detection pen is induced in the detection pen by polarity reversal of the image display voltage during the display period. Upon receiving the electrostatic induction voltage, the received electrostatic induction voltage is compared with a preset reference voltage, and when the electrostatic induction voltage is higher than the reference voltage, it is determined that the detection mode is to perform coordinate detection. On the other hand, a mode detection circuit that determines a non-detection mode in which coordinate detection is not performed when the electrostatic induction voltage is smaller than the reference voltage, and outputs a mode signal indicating a determination result, and a coordinate output by the coordinate detection circuit. Upon receiving the mode signal output by the mode detection circuit,
When the mode signal indicates the detection mode, the coordinates are output as it is, while when the mode signal indicates the non-detection mode, the output of the coordinates is stopped. It can be determined whether or not it is approaching the surface. Therefore, it is possible to prevent a malfunction caused by noise on the detection pen. Ma
In addition, the polarity of the image display voltage is set within one frame display period.
Multiple times, and the inversion is automatically performed during one electrode scanning cycle.
Since it is synchronized with several times the cycle, multiple spike voltages
The mode signal can be formed based on
And the reversal cycle is set between each electrode scan.
, Flicker on the display is reduced.

In the case where the mode detection circuit has a peak detector that receives the electrostatic induction voltage and creates a DC voltage proportional to the peak value of the received electrostatic induction voltage, It is possible to easily compare the magnitude with the reference voltage.

The coordinate detection circuit and the mode detection circuit branch and receive the electrostatic induction voltage amplified by the amplifier circuit, the amplifier circuit amplifying the electrostatic induction voltage induced by the detection pen. In this case, the electrostatic induction voltage is not mixed with noise, and the detection accuracy can be improved.

In the case where the peak detector has a filter circuit for removing a DC component included in the received electrostatic induction voltage, when the electrode of the detection pen generates a DC voltage due to frictional charging with clothes or the like. In addition, it is possible to prevent noise from entering the circuit.

Further, when the filter circuit is a band-pass filter having a pass band at the fundamental frequency of the AC signal, only the frequency component of the electrostatic induction voltage induced in the detection pen can be passed. External noise having a high frequency component can be blocked.

In the case where the filter circuit includes a capacitor formed by using a dielectric covering the tip of the electrode of the detection pen, it is not necessary to connect a single unit capacitor, thereby simplifying the structure. Can be. In addition, erroneous input can be greatly improved when the operator's finger contacts the electrode tip.

The peak detector synchronizes with the timing at which the polarity of the AC signal is inverted, integrates the electrostatic induction voltage during a period in which the electrostatic induction voltage rises, and generates the DC voltage. Can be limited to a short period for integrating the received electrostatic induction voltage, and the effect of noise can be reduced.

When the mode detection circuit determines to shift from the detection mode to the non-detection mode, after the output voltage of the peak detector once falls below the reference voltage,
When outputting the mode signal indicating the determination result to shift to the non-detection mode only when the value is still lower than the predetermined period, it is possible to prevent the mode signal from becoming unstable (a state equivalent to chattering in the switch). As a result, flickering of the display screen can be prevented.

A plurality of values of the reference voltage are provided,
The mode signal becomes unstable (a state equivalent to chattering in the switch) when a higher value is set in the transition from the detection mode to the non-detection mode than in the transition from the non-detection mode to the detection mode. Can be avoided, and as a result, flickering of the display screen can be prevented.

The control drive circuit receives the mode signal output from the mode detection circuit, and sets both the display period and the coordinate detection period in a time-sharing manner when the mode signal indicates the detection mode. When the mode signal indicates the non-detection mode, when the means for setting only the display period is provided, the detection pen operates as a tablet only for a very short time when the detection pen is approaching the panel surface, and most of the time, only the display is performed. It can be carried out. Therefore, a decrease in image quality and an increase in power consumption due to coordinate detection can be suppressed to a level that does not cause any problem.

In the case where the control drive circuit has means for controlling the image data transfer rate in the display period set in the detection mode and the display period set in the non-detection mode in the same manner, Can be simplified.

Further, the control drive circuit controls the image data in the display period in the detection mode more than in the display period in the non-detection mode so that the frame frequency in the detection mode and the frame frequency in the non-detection mode are substantially the same. Has a means for transferring the data at high speed, it is possible to prevent the scanning period from being lengthened in a mode in which both the display period and the coordinate detection period are set in a time-division manner (display / coordinate detection mode). Flicker can be prevented regardless of the type of power supply frequency.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an overall configuration of a display-integrated tablet device according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a configuration of a main part of the display-integrated tablet device.

FIG. 3 is a diagram showing a peak detector included in a mode detection circuit of the display-integrated tablet device.

FIG. 4 is a view showing a structure of an electrode tip of a detection pen.

FIG. 5 is a diagram showing a state in which a microswitch is built in a detection pen.

FIG. 6 is a diagram showing a waveform when the electrostatic induction voltage is rectified and integrated.

FIG. 7 is a diagram showing a mode signal output by the mode detection circuit.

FIG. 8 is a diagram showing a mode signal output by the mode detection circuit.

FIG. 9 is a diagram illustrating a comparator included in the mode detection circuit.

FIG. 10 is a flowchart illustrating the operation of the display-integrated tablet device according to the second embodiment of the present invention.

FIG. 11 is a diagram showing the overall configuration of the display-integrated tablet device.

FIG. 12 is a diagram showing the drive timing of the display-integrated tablet device previously proposed by the present applicant.

FIG. 13 is a diagram showing the distance dependence of the peak value of the electrostatic induction voltage.

FIG. 14 is a diagram showing the distance dependence of the waveform of the electrostatic induction voltage.

FIG. 15 is a diagram showing the overall configuration of a display-integrated tablet device previously proposed by the present applicant.

FIG. 16 is a diagram showing how to set a display period and a coordinate detection period of the display-integrated tablet device.

FIG. 17 is a diagram showing drive timing of the display-integrated tablet device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Liquid crystal display panel 1a Panel surface 2 Column drive circuit 3 Segment drive circuit 4 Switching circuit 5, 5 'Display control circuit 6 Position detection control circuit 7, 7' Control circuit 8 Detection pen 8a Dielectric layer 9 Operational amplifier 10 X coordinate detection circuit 11 Y coordinate detection circuit is 12 power supply circuit 13 coordinate output selection circuit 20, 21
Analog gate 23 mode detection circuit

Claims (13)

(57) [Claims] 2. The method according to claim 1, wherein the first and second arrays are arranged in different directions.
A first electrode and a second electrode;
A display panel having pixels corresponding to locations where the poles intersect , a display period and a coordinate detection period can be set in a time-division manner, and an image display voltage is sequentially applied to the two electrode groups during the display period. Then both while reversing the polarity of the image display voltage periodically, a drive control circuit for sequentially applying a voltage coordinate detection to the two electrode groups is in the coordinate detection period,
A detection pen capable of inducing an electrostatic induction voltage by capacitively coupling with a designated electrode of the two electrode groups on the display panel surface, and an electrostatic force induced on the detection pen by the coordinate detection voltage during the coordinate detection period. A display-integrated tablet device including a coordinate detection circuit that receives an induction voltage and detects and outputs coordinates indicated by the detection pen based on the received electrostatic induction voltage, wherein the image is displayed during the display period. Receiving an electrostatic induction voltage induced in the detection pen by reversing the polarity of the display voltage, comparing the received electrostatic induction voltage with a preset reference voltage, and comparing the electrostatic induction voltage with the reference voltage. When the electrostatic induction voltage is smaller than the reference voltage, the mode is determined to be the non-detection mode in which the coordinate detection is not performed, and the mode signal indicating the determination result is determined. A mode detection circuit that outputs a signal, and receives the coordinates output by the coordinate detection circuit and the mode signal output by the mode detection circuit, and outputs the coordinates as they are when the mode signal indicates the detection mode, A display-integrated tablet device, comprising: a coordinate output selection circuit that stops outputting the coordinates when a signal indicates a non-detection mode. 2. The display-integrated tablet according to claim 1.
In the device, the polarity of the image display voltage is duplicated within one frame display period.
Invert several times, and the inversion is a natural number of one electrode scanning period.
Display integrated type, characterized in that it is synchronized with double cycle
Bullet device. 3. The display-integrated tablet device according to claim 1, wherein the mode detection circuit receives the electrostatic induction voltage and generates a DC voltage proportional to a peak value of the received electrostatic induction voltage. A display integrated tablet device having a peak detector. 4. The display-integrated tablet device according to claim 1, further comprising an amplifier circuit for amplifying an electrostatic induction voltage induced in the detection pen, wherein the coordinate detection circuit and the mode detection circuit are provided as an amplifier circuit. A tablet device integrated with a display, which branches and receives the electrostatic induction voltage amplified by the device. 5. The display-integrated tablet device according to claim 3 , wherein the peak detector has a filter circuit for removing a DC component included in the received electrostatic induction voltage. Tablet device. 6. The display-integrated tablet device according to claim 5 , wherein the filter circuit is a band-pass filter having a pass band at a fundamental frequency of the AC signal. . 7. The display-integrated tablet device according to claim 5 , wherein the filter circuit includes a capacitor configured by using a dielectric covering an electrode tip of the detection pen. Body type tablet device. 8. The display-integrated tablet device according to claim 3 , wherein the peak detector is synchronized with a timing at which the polarity of the alternating signal is inverted, and within a period during which the electrostatic induction voltage rises. A display-integrated tablet device, wherein the DC voltage is created by integrating the electrostatic induction voltage. 9. The display-integrated tablet device according to claim 3 , wherein when the mode detection circuit determines to shift from the detection mode to the non-detection mode, the output voltage of the peak detector is equal to the reference voltage. A display-integrated tablet device, which outputs a mode signal indicating a determination result to shift to the non-detection mode only when the value once falls below the threshold after a predetermined period has elapsed. 10. The display-integrated tablet device according to claim 3 , wherein a plurality of values of the reference voltage are provided, and a transition is made from the detection mode to the non-detection mode rather than from the non-detection mode to the detection mode. The display-integrated tablet device characterized in that the value is set to a higher value. 11. The display-integrated tablet device according to claim 1, wherein the control drive circuit receives a mode signal output by the mode detection circuit, and the display period and the display period when the mode signal indicates a detection mode. A display-integrated tablet device comprising: means for setting both a coordinate detection period in a time-sharing manner and setting only the display period when the mode signal indicates a non-detection mode. 12. The display-integrated tablet device according to claim 11 , wherein the control drive circuit transfers image data between a display period set in a detection mode and a display period set in a non-detection mode. A display-integrated tablet device, comprising means for controlling the same speed. 13. The display-integrated tablet device according to claim 11 , wherein the control drive circuit controls the display period in the non-detection mode such that the frame frequencies in the detection mode and the non-detection mode are substantially the same. A display-integrated tablet device having means for transferring image data at a higher speed during a display period in the detection mode.