JP2716025B2 - Array type infrared detector and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an array type infrared detector using a semiconductor having a narrow band gap, particularly a compound semiconductor containing Hg, and a method for manufacturing the same.

[0002]

2. Description of the Related Art It is generally known that an infrared detector using a semiconductor having a narrow band gap has high sensitivity. In particular, a photovoltaic element having a pn junction in a detection portion, that is, an arrayed infrared detector having a configuration in which photodiodes are two-dimensionally arranged is applicable to an infrared imaging device such as a night vision camera and is effective. The typical one is
There is an array type infrared detector using HgCdTe crystal,
In recent years, HgCdTe that has been epitaxially grown on a heterogeneous substrate such as GaAs has been widely used in order to increase the area and reduce the cost of manufacturing an arrayed infrared detector and put it into practical use.

In this array type infrared detector, as shown in FIG. 2, a p-HgCdTe layer 4 is grown on a GaAs substrate 1 via a CdTe buffer layer 2, and an n-HgCdTe region 5 is formed on the p-HgCdTe layer 4. Are arranged in a pn junction diode array.

The infrared light 9 enters from the lower surface side of the GaAs substrate 1, passes through the GaAs substrate 1, the CdTe buffer layer 2, enters the p-HgCdTe layer 4, and is p-HgCdTe.
N-HgCdTe of each diode is photoelectrically converted in the layer 4
The carrier that has reached the region 5 is extracted from the In electrode 7 as a pixel signal. Reference numeral 6 denotes a ZnS protective film, and a signal processing circuit connected to the In electrode 7 is omitted.

The characteristics of the array type infrared detector are p-HgC
The evaluation is made based on the magnitude of the dark current, that is, the diffusion current mainly depending on the crystallinity of the dTe layer 4. Although the HgCdTe layer 4 on a heterogeneous substrate such as GaAs has a large number of dislocations due to lattice mismatch in the entire crystal though the CdTe buffer layer 2 is interposed, the crystallinity is improved by thermal cycle annealing (EPD). Reduction).

[0006]

Although thermal cycle annealing reduces the dislocation density near the surface, it has been experimentally demonstrated that the main effect is to move the dislocations toward the back of the crystal rather than to eliminate them. Has been confirmed. Near the interface between the CdTe buffer layer 2 and the p-HgCdTe layer 4, there are many dislocations 8 that have been moved by thermal cycle annealing, and many minority carriers are generated via these dislocations.

In the case of a general back-illuminated array type infrared detector, the quantum efficiency when infrared light is incident is taken into consideration, and p
Since the thickness of the -HgCdTe layer 4 is set to be about the diffusion length, minority carriers generated near the interface become dark currents of the pn junction diode, and even if the dislocation near the surface is reduced by thermal cycle annealing, The dark current has not been sufficiently reduced.

When the thickness of the p-HgCdTe layer 4 is increased to such an extent that minority carriers generated by dislocations near the interface do not influence, photo carriers generated by infrared light incident from the back surface do not reach the pn junction. There is a problem that the quantum efficiency is deteriorated.

An object of the present invention is to provide an array type infrared detector comprising photodiodes having excellent characteristics which reduce dark current via dislocations and do not cause deterioration of quantum efficiency, and a method of manufacturing the same. .

[0010]

In order to achieve the above object, an array type infrared detector according to the present invention is an array type infrared detector having a semiconductor substrate, a crystal, and a HgCdTe region. , CdTe or CdZn
Te is a semiconductor material different from Te, and a crystal is formed on the semiconductor substrate, and a CdTe buffer layer, a first HgCdTe layer having a relatively large forbidden band width, and a first Hg
The CdTe layer is formed by sequentially epitaxially growing a second HgCdTe layer having the same conductivity type and sensitivity to infrared rays. The HgCdTe region has a conductivity opposite to that of the first and second HgCdTe layers. It has a type,
Formed in an array on the crystal,
The pn junction formed by the gCdTe region is included in the second HgCdTe layer.

Further, the semiconductor substrate is a GaAs substrate.

Further, the semiconductor substrate is a Si substrate.

The composition ratio of Cd in the first HgCdTe layer is 0.5 or more.

The pn junction formed by the HgCdTe region and the first HgCdTe layer are formed by a second HgCdTe layer.
They are separated by the diffusion length of the gCdTe layer or more.

Further, a method of manufacturing an arrayed infrared detector according to the present invention is a method of manufacturing an arrayed infrared detector having at least an epitaxial growth step, a thermal cycle annealing step, and a pn junction forming step. Comprises a CdTe buffer layer on a GaAs substrate,
The first HgCdTe layer having a relatively large forbidden band width and the second HgCdTe layer having the same conductivity type as the first HgCdTe layer and having a sensitivity to infrared rays are sequentially epitaxially grown. The thermal cycle annealing step performs a process of moving dislocations present in the first and second HgCdTe layers to the back of the crystal, and the pn junction forming step includes the step of forming a pn junction in the second HgCdTe layer. Are formed in an array.

By the thermal cycle annealing, dislocations move to the vicinity of the interface between the HgCdTe layer having a large Cd composition and the CdTe buffer layer, and the dislocations are sufficiently reduced in the HgCdTe layer having sensitivity to infrared light. Minority carriers generated by dislocations in the HgCdTe layer near the interface with CdTe do not reach the pn junction even if diffused, so that dark current can be reduced. Furthermore, a photocurrent is generated that is absorbed only by the HgCdTe layer having sensitivity to infrared light incident from the rear surface, and a signal output corresponding to each pixel that reaches a nearby diode is generated. Therefore, no deterioration in quantum efficiency due to the introduction of the HgCdTe layer having a large Cd composition is observed.

Hereinafter, the present invention will be described with reference to the drawings. In the figure, the arrayed infrared detector according to the present invention has a basic structure including a semiconductor substrate, a crystal, and a HgCdTe region. The semiconductor substrate 1 is made of CdTe or CdZnTe
It has a semiconductor material different from (CdTe buffer layer 2). The crystal is formed on the semiconductor substrate 1,
The CdTe buffer layer 2, the first HgCdTe layer 3 having a relatively large band gap, and the second HgCdTe layer 3 having the same conductivity type and having sensitivity to infrared rays.
It is formed by sequentially epitaxially growing the gCdTe layer 4 and the gCdTe layer 4. The HgCdTe region 5 has a conductivity type opposite to that of the first and second HgCdTe layers 3 and 4 and is formed in an array on a crystal.
The pn junction formed by the gCdTe region 5 is included in the second HgCdTe layer 4.

The method for manufacturing an arrayed infrared detector according to the present invention is a method for manufacturing an arrayed infrared detector having at least an epitaxial growth step, a thermal cycle annealing step, and a pn junction forming step. Comprises a CdTe buffer layer on a GaAs substrate,
The first HgCdTe layer having a relatively large forbidden band width and the second HgCdTe layer having the same conductivity type as the first HgCdTe layer and having a sensitivity to infrared rays are sequentially epitaxially grown. The thermal cycle annealing step performs a process of moving dislocations existing in the first and second HgCdTe layers to the back of the crystal, and the pn junction forming step includes a step of forming a pn junction in the second HgCdTe layer. Are formed in an array.

Next, the array type infrared detector of the present invention will be described with reference to specific examples. The array-type infrared detector according to the embodiment of the present invention includes a Cd on a GaAs substrate 1 as shown in FIG.
A Te buffer layer 2 is formed, and a HgCdTe layer 3 which is sufficiently transparent (having a large Cd composition) to infrared light detected on the CdTe buffer layer 2 is grown.
HgCdTe layer 4 having sensitivity to infrared light on e layer 3
Is used. Perform normal thermal cycle annealing to keep dislocations away from near the surface,
The HgCdTe region 5 is grown, and a pn junction is formed in the HgCdTe layer 4 in an array to form a diode array. Reference numeral 6 denotes a ZnS protective film, and a signal processing circuit connected to the In electrode 7 is omitted.

In this structure and the manufacturing method, the dislocations move from the surface side to the deeper part of the crystal, and the HgC
Many dislocations are present in the HgCdTe layer 4 which is mostly present in the vicinity of the interface between the dTe layer 3 and the CdTe buffer layer 2 and has sensitivity to infrared light. Even if the minority carriers generated in the HgCdTe layer 3 having a large Cd composition diffuse, if the HgCdTe layer 4 has a certain thickness, it does not reach the pn junction, and the HgCdTe layer 4 itself has a sufficiently low dislocation. Therefore, the dark current can be reduced.

Further, the infrared light 9 incident from the back surface is Cd
The light passes through the HgCdTe layer 3 having a large composition, is absorbed only by the HgCdTe layer 4 having sensitivity to infrared light, generates a photocurrent, reaches a diode in the vicinity, and becomes a signal output corresponding to each pixel. Therefore, the quantum efficiency does not deteriorate due to the introduction of the HgCdTe layer 3.

Hereinafter, the operation and characteristics of the array type infrared detector of the present invention will be specifically described with reference to FIGS. CdTe buffer layer 2 on GaAs substrate 1
Is 5 μm, p-HgC having a composition transparent to infrared light
8 μm dTe layer (Cd composition x = 0.5) 3, p-HgCdTe layer (x = 0.23) having sensitivity to infrared light
4 is sequentially grown epitaxially to a thickness of 12 μm by MBE.

The carrier concentration is relatively p-type HgCdT
1 × 1 each using Ag dope that is easy to obtain e crystal
0 ¹⁶ cm ^-3 . At this time, dislocations were formed in the p-HgCdTe layer (x = 0.5) 3 and the p-HgCdTe layer (x = 0.2
3) The dislocation density (EPD) is 1 ×
It is about 10 ⁷ cm ^-2 (FIG. 3A).

Subsequently, a thermal cycle annealing treatment is performed to move the dislocations toward the back of the crystal (a region close to the interface with the CdTe buffer layer 2). As a result, the dislocation density in the p-HgCdTe layer 4 having sensitivity to infrared light is reduced,
It is about 1 × 10 ⁶ cm ⁻² (FIG. 3A).

Thereafter, B ion implantation is performed at about 150 keV.
N-HgCdT in an array
By forming the e region 5, a photodiode array is formed. The depth of the pn junction of the diode is 1.5 to
Since it is about 2 μm, it is completely contained in the p-HgCdTe layer 4 and 10 p.
They are separated by at least μm (FIG. 3C).

The size of each diode is 20 μmφ, and the pitch is 35 μm. Thereafter, an element is manufactured by forming a ZnS protective film 6 having a relatively small interface state density with respect to the HgCdTe layer 5 and finally forming an In electrode 7 (FIG. 1).

In practice, a SiMO for signal reading is further used.
Although there is a hybridizing step with SIC, it is omitted here.

Next, the operation of the array type infrared detector of the present invention,
The characteristics will be described. The infrared light 9 incident from the lower surface of the GaAs substrate 1 passes through the CdTe buffer layer 2 and the p-HgCdTe layer 3 which is sufficiently transparent to the infrared light 9, and has a sensitivity of p-HgCdTe which is sensitive to the infrared light 9. It is absorbed by the HgCdTe layer 4 and photoelectrically converted into a photocurrent. This photocurrent diffuses and reaches the nearest pn junction, where the n-HgCdTe region 5, In
The signal is sent to the SiMOSIC for signal reading via the electrode 7 and output as an infrared image.

It is the dark current and the quantum efficiency that affect the infrared image characteristics. In this structure and the manufacturing method, the dislocation, which is the source of the minority carrier that becomes the dark current, is located in the deep part of the crystal, ie, Cd. P-HgCdTe layer 3 having a large composition and C
Many dislocations are present in the vicinity of the interface of the dTe buffer layer 2 and have sufficiently low dislocations in the p-HgCdTe layer 4 having sensitivity to infrared light.

The diffusion length of the HgCdTe crystal grown by MBE or the like is generally about 10 μm, and in the embodiment of the present invention, the diffusion length from the p-HgCdTe layer 3 to the pn junction is 10 μm.
Considering that there are m or more, the minority carriers generated in the p-HgCdTe layer 3 where many dislocations exist do not reach the pn junction even if diffused, and do not become a dark current.

Since the p-HgCdTe layer itself has been reduced in dislocation, the dark current is kept sufficiently low, so that there is no deterioration in image characteristics due to the dark current. Further, the infrared light 9 incident from the back surface is p-HgCdT having a large Cd composition.
pH which is not absorbed by the e layer and has sensitivity to infrared light
A photocurrent is generated by being absorbed only in the gCdTe layer 4 and reaches a diode within the diffusion length and becomes a signal output corresponding to each pixel. Therefore, deterioration of the quantum efficiency due to the p-HgCdTe layer 3 is not observed.

As described above, the present invention is an arrayed infrared detector capable of reducing a dark current which causes deterioration of image characteristics and efficiently guiding only a photocurrent to a pn junction, thereby obtaining excellent image characteristics. .

In this embodiment, the case where a GaAs substrate is used has been described. However, even if the substrate is a Si substrate, the same effects can be obtained. Further, the composition and electric polarity of the HgCdTe layer are not limited to those of the present embodiment, and the Cd
The HgCdTe layer on the Te buffer layer is transparent to the infrared light to be detected, and the HgCdTe layer thereover has only to have a composition having sensitivity to the infrared light to be detected.
There is no effect if the type is reversed.

[0034]

As described above, in the array type infrared detector and the method of manufacturing the same according to the present invention, even when a heterogeneous substrate such as GaAs or Si is used, the dark current caused by dislocations and the like can be reduced. In addition, it is possible to provide an arrayed infrared detector capable of efficiently guiding only the photocurrent to the pn junction and obtaining excellent image characteristics.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining an array-type infrared detector according to one embodiment of the present invention.

FIG. 2 is a diagram showing a conventional example.

FIG. 3 is a diagram for explaining a method of manufacturing an arrayed infrared detector according to the present invention.

[Explanation of symbols]

 Reference Signs List 1 GaAs substrate 2 CdTe buffer layer 3 p-HgCdTe layer (x = 0.5) 4 p-HgCdTe layer (x = 0.23) 5 n-HgCdTe region 6 ZnS protective film 7 In electrode 8 Dislocation 9 infrared light

Claims (6)

(57) [Claims] An array type infrared detector having a semiconductor substrate, a crystal, and a HgCdTe region, wherein the semiconductor substrate is a semiconductor material different from CdTe or CdZnTe, and the crystal is formed on the semiconductor substrate. , A CdTe buffer layer, a first HgCdTe layer having a relatively large forbidden band width, and a second HgCdTe layer having the same conductivity type as the first HgCdTe layer and having sensitivity to infrared rays. HgCdTe region, wherein the first and second HgCdT regions
the pn junction formed by the HgCdTe region having the conductivity type opposite to that of the e-layer and being formed in an array on the crystal, and being included in the second HgCdTe layer. Characteristic array type infrared detector. 2. The array-type infrared detector according to claim 1, wherein the semiconductor substrate is a GaAs substrate. 3. The array-type infrared detector according to claim 1, wherein the semiconductor substrate is a Si substrate. 4. The array type infrared detector according to claim 1, wherein the composition ratio of Cd in the first HgCdTe layer is 0.5 or more. 5. A pn junction formed by the HgCdTe region and the first HgCdTe layer form a second HgCdTe layer.
2. The arrayed infrared detector according to claim 1, wherein the distance is longer than the diffusion length of the CdTe layer. 6. A method of manufacturing an arrayed infrared detector having at least an epitaxial growth step, a thermal cycle annealing step, and a pn junction forming step, wherein the epitaxial growth step comprises forming a CdTe layer on a GaAs substrate.
Buffer layer and first HgCd having relatively large band gap
The Te layer and the first HgCdTe layer are for performing a process of sequentially epitaxially growing a second HgCdTe layer having the same conductivity type and having sensitivity to infrared rays. And the second Hg
The process for moving dislocations existing in the CdTe layer to the back of the crystal is performed.
A method for producing an arrayed infrared detector, comprising performing a process of forming pn junctions in an array in a gCdTe layer.