JP2708442B2 - Semiconductor integrated circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit, and more particularly, to a current source suitable for a circuit requiring isolation for preventing signal interference. [Prior Art] Conventionally, there have been many proposals regarding current sources for integrated circuits. Representative examples are, for example, Bipolar and Moss Analog Integrated Circuit Design, by Alan Bee Greben, Jyon Willie and Sons (1984), pp. 170-183 (BIPOLAR
AND MOSANALOG INTEGRATED CIRCUIT DESIGN, Alan.B.Gre
bem (1984) pp. 170-183). [Problems to be Solved by the Invention] In recent years, miniaturization of integrated transistors has progressed, and high-speed, high-density integrated circuits can be realized. However, on the other hand, problems associated with miniaturization, such as a decrease in Early voltage, also appeared. The prior art described above does not consider the leakage of the signal from the collector to the base due to the decrease of the early voltage, and has a problem that the signal enters another circuit via the current source. SUMMARY OF THE INVENTION It is an object of the present invention to realize a current source capable of sufficiently blocking a signal even when a miniaturized transistor having a small Early voltage is used. [Means for Solving the Problems] The above object is achieved by providing a buffer circuit in an output circuit of a current source. [Operation] FIG. 1 shows a principle diagram of the present invention. FIG. 2 shows an example of a conventional current source. The operation of the present invention will be described below with reference to these two figures. When the output terminal OUT1 of the circuit shown in FIG. 2 is driven Early shaking emitter of the transistor Q _I1 under the influence of the resistance, the signal to the base of Q _I1 In this impact is transmitted, the signal enters the base common line L. Base common line L
It is kept by go-between low impedance to the action of Q _2. However, when a small signal is a problem, this impedance is not sufficient, and the signal affects other terminals. In order to obtain a current source having a good signal cutoff characteristic, it is necessary to make L less susceptible to the signal. Therefore, as shown in FIG. 1, between the base common line L and the output transistors Q _{I1 to} Q _In , Q _{B1 to} Q _Bn and R _{B1 are connected} as buffer circuits.
An emitter follower composed of ~ R _Bn is provided. As a result, a signal that enters the common base line L is reduced, and a current source with small signal leakage can be realized. Details will be described below in Examples. [Embodiment] A first embodiment of the present invention will be described with reference to FIG. The circuit comprises a base potential reference circuit, a buffer circuit having a high input impedance and a low output impedance, and an output circuit for driving an output current. First, a large signal analysis of the present circuit is performed. The base potential reference circuit sets the potential of the base common line. The bases of the output transistors Q _{I1 to} Q _In are fixed at a potential 1 V _BE lower than the base common line potential. Obtaining an output current I ₁ ~I _n desired by adjusting the load resistance R _E1 to R _En. If the base potential reference circuit shown in FIG. It is. Here, _Iref is a reference current, and _VL is a potential of the base common line L. Next, a small signal analysis of the present circuit is performed. FIG. 3a shows a small signal equivalent circuit of the output circuit. R _B1 is used for biasing Q _B1 and has a high resistance, so that description is omitted. Let n be the signal applied to the output terminal of the current source, and let v _{L be} the signal that has penetrated the base common line. At this time, v _L Becomes Where r _L is the impedance of the base common line, r _E
Is a small signal representation of R _E1 in emitter load resistor, r _E = R _E1
It is. r _A is Early resistance, β is current amplification factor, rπ ₁ , r
π ₂ is the operating resistance of the transistor. FIG. 3B shows the potential of each part of the circuit shown in FIG. 3A. For comparison, a small signal equivalent circuit of the output circuit of the conventional current source shown in FIG. 2 is shown in FIG. 4A, and a potential diagram is shown in FIG. Similarly, let v be a signal applied to the output terminal of the current source, and let v _{L be} a signal penetrating the base common line. At this time, v _L Becomes r _E = 0.8 KΩ, r _A = 20 KΩ, β = 100, r _L = 0.1 KΩ, r
The two are compared assuming that π ₁ = 26 KΩ and rπ ₂ = 5.2 KΩ. In the conventional circuit, v _L /v=4.63×10 ⁻⁵ , whereas in the present circuit, v _L /v=4.58×10 ⁻⁷ , which is an improvement of about 20 dB. This is because the most important coefficient that determines the value of v _{L in} equation (2) is (1 + β) ^2, and the corresponding equation (3)
Can be easily understood from the fact that the coefficient is (1 + β). FIG. 5 shows a second embodiment of the present invention. According to equation (2), the larger rπ ₁ is, the smaller v _L is. That is, the smaller the collector current of the transistors Q _{B1 to} Q _Bn is, the better. The collector current is small, there is a feature of the second embodiment in that no connecting a resistor emitter for Q _B1 to Q _Bn to increase the rπ _1. According to this embodiment, the effect of the isolation is enhanced. FIG. 6 shows a third embodiment of the present invention. This embodiment is a cascode type of the first embodiment. By using a cascode type, a current source having a high output impedance is obtained, and signal leakage is prevented by providing a buffer circuit. FIG. 7 shows the embodiment of FIG. 4 of the present invention. A low-pass filter utilizing the Miller effect is provided in the embodiment of FIG.
The impedance of the base common line L at the time of high frequency is reduced. Figures b and c show examples of the loads A and B in Figure a. FIG. 8 shows a fifth embodiment of the present invention. This embodiment uses pn
The first embodiment is constituted by p-type transistors. FIG. 9 shows a sixth embodiment of the present invention. MOSFE, which constitutes the first embodiment with a field effect transistor.
It can be applied to all T, JFET, and MESFET, reducing the effect of drain conductance and the effect of drain-gate capacitance. FIG. 10 shows a seventh embodiment of the present invention. This is one in which the sixth embodiment is constituted by a p-type FET. FIG. 11 shows an eighth embodiment of the present invention. FET and BJT are shared, and FET is used for the buffer circuit. Since the FET is used, the fluctuation of the source terminal hardly affects the gate voltage. For this reason, the isolation of the gate common line is strengthened, and a large current can be driven because the output transistor uses BJT. FIG. 12 shows a ninth embodiment of the present invention. In this embodiment, similarly to the eighth embodiment, an FET is used for a buffer circuit and a B circuit is used for an output circuit.
JT is used. A low-pass filter is provided on the gate common line by utilizing the fact that no current flows into the gate of the FET. As a result, even if a high-frequency signal is added to OUTx, OUT1 to OUTn are not affected. FIG. 13 shows a tenth embodiment of the present invention. In this example, a plurality of output circuits are connected to a buffer circuit. When the number of signals to be isolated is limited, the number of buffer circuits can be reduced. [Effects of the Invention] According to the present invention, a signal entering a base of a current source is reduced by about 20 dB as compared with the related art. Therefore, the problem of signal leakage via the current source can be greatly improved.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of a first embodiment of the present invention, FIG. 2 is a circuit diagram of a conventional current source, and FIG. 3 is a small signal of the first embodiment of the present invention. FIG. 4 is a small signal equivalent circuit diagram and a potential diagram of a conventional current source, and FIG.
6 is a third embodiment of the present invention, FIG. 7 is a fourth embodiment of the present invention, FIG. 8 is a fifth embodiment of the present invention,
FIG. 9 is a sixth embodiment of the present invention, and FIG. 10 is a seventh embodiment of the present invention.
FIG. 11 is a circuit diagram of an eighth embodiment of the present invention, FIG. 12 is a circuit diagram of a ninth embodiment of the present invention, and FIG. 13 is a circuit diagram of a tenth embodiment of the present invention. Q: transistor, R: resistor, OUT: current source terminal, L: base common line, I _ref: reference current,
I ₁ ~I _n ...... output current, r _L ...... base potential setting circuit output impedance, v _B ...... base common line potential, v ...... load potential, r _E ...... emitter resistance, r _A ...... Early resistance, i _A ......
Early current, i _1,2 ... small signal current, F ... field effect transistor, L _F ... gate common line.

   ────────────────────────────────────────────────── ─── Continuation of front page    (72) Inventor Tomoyuki Watanabe               1-280 Higashi Koikebo, Kokubunji-shi, Tokyo                 Central Research Laboratory, Hitachi, Ltd.                (56) References JP-A-61-114608 (JP, A)                 JP-A-52-107554 (JP, A)                 JP-A-54-132755 (JP, A)                 62-100520 (JP, U)

Claims (1)

(57) [Claims] A semiconductor integrated circuit having a reference potential reference circuit and a plurality of current source output circuits each having an input terminal to which a reference potential is input from the reference potential reference circuit through a common line and a current source terminal, wherein the current source output circuit is A first field-effect transistor, a signal from the common line is input to a control terminal of the first field-effect transistor, a second terminal of the first field-effect transistor is connected to a second operating potential point; A semiconductor integrated circuit, wherein the terminal is a current source terminal, a low-pass filter is provided on the common line, and the low-pal filter has a resistor and a capacitor provided on the common line. 2. 2. The semiconductor integrated circuit according to claim 1, wherein the capacitor is a first integrated circuit provided between one end of the resistor and one of a first operating potential point and the second operating potential point. A semiconductor integrated circuit comprising a capacitor. 3. 2. The semiconductor integrated circuit according to claim 1, wherein the capacitor has a second field-effect transistor, a second capacitor, and a load circuit, and the second field-effect transistor has a control terminal. The common line, the first terminal of which is connected to the first operating potential point via the load circuit, the second terminal of which is connected to the second operating potential point,
A semiconductor integrated circuit, wherein the second capacitor is provided between a first terminal and a control terminal of the second field-effect transistor. 4. 2. The semiconductor integrated circuit according to claim 1, wherein said current source output circuit has an impedance element, and said second terminal of said first field-effect transistor has said second operation via said impedance element. A semiconductor integrated circuit connected to a potential point. 5. In a semiconductor integrated circuit having a reference potential reference circuit, a plurality of buffer circuits to which a reference potential is input from the reference potential reference circuit through a common line, and output circuits provided corresponding to the buffer circuits, respectively. The buffer circuit has a first transistor and a first impedance element, and the first transistor has a control electrode connected to the common line, a first terminal connected to a first operating potential point, and The two terminals are connected to one end of the first impedance element, and the other end of the first impedance element is connected to a second operating potential point, and the output circuit includes a second transistor. The second transistor has a control terminal connected to a second terminal of the first transistor, and a second terminal connected to the second operating potential point. Cage, said first transistor is a field effect transistor, a low pass filter provided in the common line, the low-pass filter, a semiconductor integrated circuit, comprising a resistor and a capacitor provided to the common line. 6. 6. The semiconductor integrated circuit according to claim 5, wherein the capacitor is provided between one end of the resistor and one of the first operating potential point or the second operating potential point. A semiconductor integrated circuit comprising: a capacitor; 7. 6. The semiconductor integrated circuit according to claim 5, wherein the capacitor has a third transistor, a second capacitor, and a load circuit, wherein the third transistor is a field-effect transistor, The third transistor has its control terminal connected to the common line, its first terminal connected to the first operating potential point via the load circuit, its second terminal connected to the second operating potential point, A semiconductor integrated circuit, wherein the second capacitor is provided between a first terminal and a control terminal of the third transistor. 8. The semiconductor integrated circuit according to claim 5, wherein the output circuit has a second impedance element, and a second terminal of the second transistor is connected to one end of the second impedance element. And the other end of the second impedance element is connected to the second operating potential point. 9. In a semiconductor integrated circuit having a reference potential reference circuit, a plurality of buffer circuits to which a reference voltage is input from the reference potential reference circuit through a common line, and output circuits provided corresponding to the buffer circuits, respectively. The buffer circuit has a first transistor, the first transistor has a control terminal connected to the common line, the first terminal connected to a first operating potential point, the output circuit, A second transistor, wherein the second transistor has a control terminal connected to a second terminal of the first transistor, and a second terminal connected to a second operating potential point; The first transistor is a field-effect transistor, and a low-pass filter is provided on the common line. The low-pass filter includes a resistor and a capacitor provided on the common line. The semiconductor integrated circuit which is characterized in that. 10. 10. The semiconductor integrated circuit according to claim 9, wherein the capacitor is provided between one end of the resistor and one of the first operating potential point or the second operating potential point. A semiconductor integrated circuit comprising a single capacitor. 11. 10. The semiconductor integrated circuit according to claim 9, wherein the capacitor has a third transistor, a second capacitor, and a load circuit, wherein the third transistor is a field-effect transistor, The third transistor has its control terminal connected to the common line, its first terminal connected to the first operating potential point via the load circuit, its second terminal connected to the second operating potential point, A semiconductor integrated circuit, wherein the second capacitor is provided between a first terminal and a control terminal of the third transistor. 12. 10. The semiconductor integrated circuit according to claim 9, wherein the output circuit has an impedance element, a second terminal of the second transistor is connected to one end of the impedance element, and A semiconductor integrated circuit, wherein the other end of the element is connected to the second operating potential point.