JP2689011B2 - Linear transmitter - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention is used for power amplification in a high frequency band. In particular, the present invention relates to a linear amplifier that amplifies a modulated wave in which the signal level of the envelope changes greatly with high power efficiency. The present invention, in a linear amplifier that controls the power supply voltage of a high frequency power amplifier by the envelope of an input modulated wave, modulates the input modulated wave of a high frequency power amplifier by a difference signal between the envelope of the input modulated wave and the envelope of the output side. By doing so, it is possible to realize the linearity with respect to the high speed input modulated wave that cannot be adjusted only by controlling the power supply voltage.

[Conventional technology]

Conventionally, the linear transmitter has an operation class of class A or AB.
A class of high frequency power amplifier is used. Such a power amplifier has a drawback that the power efficiency is lowered when the envelope of the input signal is small. For this reason, for example, in a portable wireless device that uses a battery as a power source, the battery consumption is large,
There was a problem that the usage time of the radio was shortened.

The 29th example of the configuration of a conventional linear amplifier that solves this problem
Shown in the figure.

This conventional example is a configuration example of a linear transmission device using a drain-controlled high-efficiency linear amplifier previously filed by the applicant of the present application. Details of this amplifier are disclosed in JP-A-62-274906.

An analog signal or a digital signal is input to the input terminal 1, and this signal is modulated by the modulator 2. This modulated wave is amplified by the saturated power amplifier 4 and output from the output terminal 9.

The power amplifier 4 includes a field effect transistor as an amplification terminal, controls the drain voltage of this field effect transistor substantially in proportion to the envelope of the input signal, and causes the saturated output level of the power amplifier 4 to follow the envelope of the input signal. .

By such control, the power amplifier 4 is operated as a linear amplifier while maintaining the saturated state with high efficiency. Therefore, it is possible to greatly reduce the output distortion generated at an extremely high level in a normal saturation type amplifier. Moreover, even when the input power of the power amplifier 4 is small, by changing the drain voltage according to the change of the input power, the power amplifier 4 can be operated in a substantially saturated state, which causes a large deterioration in power efficiency. Can be prevented.

The drain voltage is supplied from the DC power supply terminal 8 through a DC / DC converter or a DC / voltage converter circuit 7 including a series control transistor. In order to control the drain voltage, the input modulated wave is branched by the directional coupler 3,
The envelope signal is detected by the envelope detection circuit 5, and the output of the envelope detection circuit 5 is level-shifted and other levels are corrected by the correction circuit 6 to control the DC voltage conversion circuit 7.

This conventional device can realize a linear amplifier using a highly efficient saturated high frequency power amplifier. For example, if a power amplifier 4 having a power efficiency of 70% is used and a DC voltage converter circuit 7 is a DC / DC converter having a power efficiency of 70%, ideally a linear transmitter having an overall efficiency of 49% is obtained. realizable.

[Problems to be solved by the invention]

In order to realize the linearity of the power amplifier with high accuracy, it is necessary to change the power supply terminal voltage so that the power usage is kept constant with respect to the input signal to the power amplifier 4. However, the characteristics of the power amplifier are generally deteriorated due to manufacturing variations, temperature changes, and the like. Therefore, even with the above-mentioned configuration, the linearity of the high frequency amplifier cannot be said to be sufficient.

It is an object of the present invention to solve the above problems and provide a linear transmitter that linearly amplifies a high-speed modulated wave with high power efficiency.

[Means for solving the problem]

The linear transmission device of the present invention is a linear transmission device including voltage control means for controlling a DC bias voltage supplied to a power amplifier according to an envelope signal level of an input modulated wave,
The voltage control means may include a frequency equalization circuit that equalizes the amplitude and phase of the envelope obtained from the modulated wave and supplies the equalized amplitude and phase to the bias means. Further, separately from this or in combination with this configuration, when the signal level of the envelope obtained from the modulated wave is smaller than a predetermined value, a means for holding the output voltage of the bias means at a certain value or more is included. You can

It is preferable to further include input control means for controlling the input signal of the power amplifier by the difference between the envelope signal level and the envelope signal level of the output signal of the power amplifier. When the power amplifier is a multi-stage amplifier, this input control means may control the signal input to the final stage amplifier. Therefore, the signal level may be controlled by the amplifier in the middle stage.

When it is necessary to control the transmission output of the linear transmission device, it is desirable to further include means for adjusting the control amount of the voltage control means and the control amount of the input control means in association with each other.

(Operation)

By changing the power supply voltage of the power amplifier according to the envelope of the input modulated wave, the power supply efficiency can be improved and the linearity of the saturated high frequency power amplifier can be improved.
By the way, imperfections occur in the control system due to voltage control and characteristic variations of the transmission system. This causes residual strain. In order to remove this residual distortion, the input modulation wave signal to the power amplifier is amplitude-modulated by the difference signal of the input / output envelope.
As a result, amplitude distortion compensation can be performed with high accuracy, and the distortion reduction effect is further increased.

In this configuration, the envelope is negatively fed back, but the configuration of this negative feedback is different from the normal feedback system. That is, since the power supply voltage is controlled in advance by the reference envelope, the distortion is considerably reduced, and the closed loop gain of the feedback system due to the input / output envelope can be reduced as compared with the case where the power supply voltage is not controlled. . Therefore, the negative feedback system operates stably.
Further, since the negative feedback system only removes residual distortion, even a relatively simple circuit can have wideband frequency characteristics and sufficient amplitude distortion compensation.

When amplifying a signal with a high modulation speed, a frequency equalization circuit is provided on the input side of the DC voltage conversion circuit. If a DC-DC converter is used as the DC voltage conversion circuit,
This switching frequency is at most about 1 MHz, and the frequency band is about 30 kHz. Therefore, the modulation speed capable of linear amplification is controlled. If a frequency equalization circuit is provided in front of the DC voltage conversion circuit, the frequency characteristics of the DC voltage conversion circuit can be broadened equivalently and a higher-speed modulated wave can be amplified.

In order to operate the active elements of the power amplifier, it is necessary to apply a bias voltage above a certain value. However, when the signal level of the envelope for controlling the power supply voltage is smaller than the value when there is a signal level, the voltage at which the active element does not operate may be applied. In such a case, distortion occurs in the amplified signal. In order to prevent this, the output voltage of the DC voltage conversion circuit is controlled so as not to fall below a predetermined voltage in consideration of the characteristics of the active element, and the amplifier is operated linearly.

〔Example〕

FIG. 1 is a block diagram showing a linear transmitter according to the first embodiment of the present invention.

The linear transmitter of this embodiment includes a power amplifier 4 that uses a modulated wave as an input signal, and includes a DC voltage conversion circuit 7 as bias means for supplying a DC bias voltage of the power amplifier 4, and this DC voltage conversion circuit 7 The directional coupler 3 and the envelope detection circuit 5 are provided as voltage control means for controlling the output voltage of the output voltage control circuit 1 by the envelope signal level of the modulated wave input to the power amplifier 4.

The input signal of the power amplifier 4 is a signal obtained by modulating an analog signal or a digital signal, and is supplied from the modulated wave input terminal 1 '. The amplified output of the power amplifier 4 is output from the output terminal 9. A DC voltage is supplied from the DC power supply terminal 8 to the DC voltage conversion circuit 7.

Here, the feature of the present embodiment is that the power value width device 4
As the input control means for controlling the input signal of 1 by the difference between the envelope signal level of the modulated wave input from the modulated wave input terminal 1'and the envelope signal level of the output signal of the power amplifier 4.
Directional coupler 13, envelope detection circuit 14, difference signal generation circuit 1
5, the DC amplifier 16 and the power control circuit 19 are provided.

The directional coupler 3 branches the modulated wave input to the modulated wave input terminal 1 ', and the envelope detection circuit 5 detects the envelope of the branched signal. In the output example of the power amplifier 4, the directional coupler 13 branches the output signal, and the envelope detection circuit 14 detects the envelope of the signal.

The input envelope signal output from the envelope detection circuit 5 is
It is supplied to the DC voltage conversion circuit 7. DC voltage conversion circuit 7
Outputs a voltage that substantially follows the signal from the envelope detection circuit 5. This voltage is supplied to the power supply terminal of the power amplifier 4 to obtain a high frequency output proportional to the envelope.

By these operations, the operation of the power amplifier 4 becomes a linear operation, and amplification with less distortion can be performed. Moreover,
The current efficiency as a linear amplifier is improved by the DC voltage conversion circuit 7.

By the way, in general, the characteristics of a high-frequency power amplifier change due to manufacturing variations and ambient temperature. In order to improve this, the envelope on the output side is compared with the envelope on the input side to correct the input power of the power amplifier 4. That is, the difference between the input and the output is obtained by the difference signal generation circuit 15, and the error signal is supplied to the power control circuit 19 via the DC amplifier 16.
The power control circuit 19 corrects the input power to the power amplifier 4 so that the amplitude characteristic of the power amplifier 4 becomes linear.
Specifically, the signal input to the power amplifier 4 is modulated.

In such a configuration, for example, when suppressing the distortion by 50 dB, the distortion of about 20 to 30 dB can be suppressed by controlling the power supply voltage by the output of the envelope detection circuit 5 on the input side. A distortion suppression amount of 20 to 30 dB is sufficient.
Therefore, the gain required for the DC amplifier 16 is at most 20-
It is about 30 dB. On the other hand, a loop gain of 50 dB is required in a configuration with only ordinary envelope feedback. As described above, the present embodiment can utilize a very stable negative feedback system with a small loop gain.

2 and 3 show configuration examples of the difference signal generation circuit 15 and the DC amplifier 16, respectively.

The difference signal generation circuit 15 has input terminals 151 and 152 and an output terminal.
158 with operational amplifier 156 and resistors 153, 154, 155 and 1
Composed of 57 and. The outputs of the envelope detection circuits 5 and 14 are supplied to the input terminals 151 and 152. The signals at the input terminals 151 and 152 are supplied to the operational amplifier 156 via the resistors 153 and 154, respectively. The non-inverting input of the operational amplifier 156 is grounded via the resistor 155, and the output is feedback-connected to the inverting input via the resistor 157.

The DC amplifier 16 has an input terminal 162 and an output terminal 168, and is composed of an operational amplifier 166 and resistors 163, 164, 165 and 167. The output of the difference signal generation circuit 15 is supplied to the input terminal 162, and is supplied to the non-inverting input of the operational amplifier 166 via the resistor 164. The non-inverting input of operational amplifier 166 is also grounded through resistor 165. The inverting input of the operational amplifier 166 is grounded via the resistor 163, and the output is feedback-connected to the inverting input via the resistor 167.

FIG. 4 is a circuit diagram showing an example of the power control circuit. This example shows a configuration using a PIN diode.

The signal of the modulated wave input terminal 1'is supplied to the modulated wave input terminal 1902, and the error signal is input to the control terminal 1908 via the DC amplifier 16. The output terminal 1911 is connected to the power amplifier 4.

The power supply terminal 1901 is connected to the PIN diode 1912 via the resistor 1903.
Connected to. The modulated wave input terminal 1902 is connected to the anode terminal of the PIN diode 1909 via bypass capacitors 1904 and 1905, and the connection point between the capacitors 1904 and 1905 is connected to the connection point between the resistor 1903 and the PIN diode 1912. P
The anode terminal of the IN diode 1909 is also connected to the control terminal 1908 via the choke coil 1906.
1908 is grounded via a bypass capacitor 1907. The cathode terminal of the PIN diode 1909 is connected to the output terminal 1911 via the bypass capacitor 1910 and is grounded via the resistor 1915. The cathode terminal of the PIN diode 1912 is connected to the anode terminal of the PIN diode 1913 and is grounded via the capacitor 1914.

In this circuit, the control voltage at control terminal 1908
The high frequency resistance of the diodes 1909, 1912 and 1913 changes. Therefore, it becomes equivalently a π-type resistance attenuator, and the high frequency power is attenuated.

FIG. 5 is a circuit diagram showing another example of the power control circuit,
A configuration using a dual gate FET is shown.

An error signal is input to the control terminal 1921 via the DC amplifier 16. The modulated wave input terminal 1924 has a modulated wave input terminal 1 '.
Is input. The output terminal 1939 is connected to the power amplifier 4. The power supply voltage is supplied to the power supply terminal 1933.

Control terminal 1921 is a dual gate FET1 via resistor 1922
It is connected to one gate terminal of the 928, and the connection point between the resistor 1922 and the gate terminal is grounded via the bypass capacitor 1923.

The modulated wave input terminal 1924 is a bypass capacitor 1925.
And the inductor 1927 for matching, and is connected to the other gate terminal of the dual gate FET 1928. The connection point between the capacitor 1925 and the inductor 1927 is grounded via the matching capacitor 1926.

At the connection point of the inductor 1927 and the dual gate FET 1928, the voltage of the power supply terminal 1933 is divided by the resistors 1931 and 1932 and supplied via the choke coil 1929.
The connection point between the choke coil 1929, the resistor 1931 and the resistor 1932 is grounded via the bypass capacitor 1930.

The source terminal of the dual gate FET 1928 is grounded, and the voltage of the power supply terminal 1933 is connected to the drain terminal of the choke coil 19
Supplied via 34. Power supply terminal 1933 and choke coil
The connection point with 1934 is grounded via a bypass capacitor 1935. The drain terminal of the dual gate FET 1928 is also connected to the output terminal 1939 via the matching inductor 1936 and the bypass capacitor 1938. The connection point between the inductor 1936 and the capacitor 1938 is grounded via the matching capacitor 1937.

The modulated wave input from the modulated wave input terminal 1924 is amplified by the dual gate FET 1928. At this time, the power gain changes depending on the voltage applied to the control terminal 1921. This is a dual gate FET1928 depending on the voltage of the second gate.
This is because the mutual conductance of changes. This enables highly accurate amplitude control.

FIG. 6 is a block diagram showing a linear transmitter according to the second embodiment of the present invention.

This embodiment differs from the first embodiment in that digital arithmetic processing in the baseband band is used to obtain the envelope of the modulated wave input to the power amplifier 4.

That is, the modulation unit 20 is provided with a complex envelope generation circuit 21, digital / analog converters 22, 23, a quadrature modulator 24 and a carrier wave oscillator 25, and in order to obtain the envelope of the modulated wave, the envelope generation circuit 100 and the digital・ Analog converter 102
Is provided.

A baseband signal is input to the input terminal 1, and this signal becomes a modulated wave via the complex envelope generation circuit 21, the digital / analog converters 22 and 23, and the quadrature modulator 24, and this is input to the power amplifier 4. To be done. A carrier wave is supplied from a carrier wave oscillator 25 to the quadrature modulator 24.

First, the operations of the complex envelope generation circuit 21, the digital / analog converters 22 and 23, the quadrature modulator 24, and the carrier wave oscillator 25 will be described. These circuits are known circuits that generate a modulation signal with an envelope and a variable phase. For example, Toyohiro Midai, Mitsuhiro Ono and Tatsuya Aono, "Development of a variable baud rate QPSK modulator", 1988 Electronic Information Proceedings of IEICE Spring National Convention, Volume B-1, Article No. SB-3-
2 shows an example of its use.

Here, when the carrier angular frequency of the modulated wave is ω _c , the envelope signal is R (t), and the modulation phase is φ (t), the modulated wave e
(T) In general, e (t) = R ( t) · Re [exp [jφ (t)] · exp [jω c t] ] = Re [E (t) · exp [jω c t] ] It is expressed as (1). However, Re [f] indicates the real part of the function f. E (t) is a complex envelope, and E (t) = I (t) -jQ (t) (2) It is expressed as I (t) and Q (t) are referred to as an in-phase envelope component and a quadrature envelope component, respectively.

The complex envelope generation circuit 21 calculates the values of the in-phase envelope component I (t) and the quadrature envelope component Q (t) according to the modulation input from the input terminal 1 by digital processing. These calculated values are used for digital / analog converters 22, 23, respectively.
I (t), Q
The waveform of (t) is obtained. These waveforms are applied to the quadrature modulator 24
To enter. This quadrature modulator 24 has I (t) and Q (t)
Is multiplied by an in-phase carrier and a quadrature carrier, and these are added together to obtain e (t).

The envelope generation circuit 100 uses the complex envelope generated by the complex envelope generation circuit 21, that is, the values of I (t) and Q (t) to generate the envelope R of the modulated wave input to the power amplifier 4.
(T), R (t) = [I (t) ² + Q (t) ² ] ^1/2 (4) This envelope R (t) is obtained by digital signal processing, and is output to the digital / analog converter 102 as it is or after being subjected to some correction.
The digital-analog converter 102 converts this signal into an analog signal and supplies it to the DC voltage conversion circuit 7.

In this way, since the voltage control envelope signal is generated by digital signal processing, it is possible to generate a highly accurate and stable signal.

The output of the digital-analog converter 102 is also supplied to the difference signal generation circuit 15 via the signal conversion circuit 18.

For the output signal of the power amplifier 4, the directional coupler 13
, And the envelope detection circuit unit 14 generates an output envelope and inputs it to the difference signal generation circuit 15.

In the first embodiment, both the input and output envelopes are detected by the envelope detection circuits 5 and 14 having the same configuration. Therefore, when the semiconductor elements used in the envelope detection circuits 5 and 14 have nonlinear characteristics. But I was able to offset that characteristic when generating the difference signal. On the other hand, in the second embodiment, the influence of the non-linear characteristic of the envelope detection circuit 14 remains on the output-side envelope, and the input-side envelope becomes a linear signal. Therefore, the two envelopes cannot be compared as they are. In order to accurately compare the two envelopes, it is necessary to cancel the non-linear characteristic of the envelope detection circuit 14.

Therefore, in the second embodiment, the digital-analog converter is
A signal conversion circuit 18 configured by the same circuit as the envelope detection circuit 14 or a circuit that realizes the same characteristics is inserted between the 102 and the difference signal generation circuit 15. The signal conversion circuit 18 cancels the influence of the detection characteristic of the envelope detection circuit 14 from the output of the difference signal generation circuit 15, and outputs the difference between the input envelope signal and the output envelope signal.

The output of the difference signal generation circuit 15 is amplified by the DC amplifier 16 and input to the power control circuit 19. Power control circuit 19
Corrects its power by amplitude-modulating the modulated wave signal input to the power amplifier 4. These operations are equivalent to those in the first embodiment.

By controlling the power supply voltage and the input of the power amplifier 4 in this manner, linear transmission that is excellent in power supply efficiency, operates with high accuracy, and is stable with respect to a modulated wave with high-speed envelope fluctuation. The device can be realized.

FIG. 7 and FIG. 8 show circuit diagrams of an example of the envelope detection circuit.

As the envelope detection circuit, a circuit using a diode and a circuit using a transistor have been conventionally known. FIG. 7 shows a circuit using a diode, and FIG. 8 shows a circuit using a transistor.

In the circuit shown in FIG. 7, the modulated wave input terminal 1401 is connected to the anode terminal of the diode 1405 via the capacitor 1402, and the cathode terminal of the diode 1405 is connected to the output terminal 14
Connected to 08. The diode 1405 also has a power supply 1404.
Is supplied via the resistors 1403 and 1407. The output side of the diode 1405 is grounded via the capacitor 1406.

The modulated wave input to the modulated wave input terminal 1401 has its direct current component cut by the capacitor 1402 and is input to the diode 1405. At this time, only the component higher than the anode voltage of the diode 1405 is conducted to the capacitor 1406, and the carrier wave is half-wave rectified. Capacitor 1406 bypasses the carrier and
Only the envelope is output to the output terminal 1408.

The detection voltage obtained at the output terminal 1408 is the diode 1405.
Includes components caused by the nonlinear characteristics of. In the case of the above-described first embodiment, by using such a detection circuit for both input and output and using a diode having uniform diode characteristics, it is possible to cancel the diode characteristics from the output of the difference signal generation circuit 15. .

In the circuit shown in FIG. 8, the modulated wave input terminal 1411 is connected to the base terminal of the transistor 1413 via the DC cut capacitor 1412. The power supply terminal 1414 is grounded via resistors 1415 and 1416 for biasing the base voltage, and the connection point of the two resistors 1415 and 1416 is connected to the base terminal of the transistor 1413. Between the power supply terminal 1414 and the ground point, resistors 1417 and 1418 for collector-emitter bias are also provided.
Transistor 1413 is inserted through. An AC bypass capacitor 1419 is connected in parallel to the bias stabilizing resistor 1418 so that only the DC component is applied.
The collector terminal of the transistor 1413 is grounded via the capacitor 1420 and is also connected to the output terminal 1421.

The modulated wave input to the modulated wave input terminal 1411 is half-wave rectified by the diode characteristic between the base and emitter of the transistor 1413, and output to the collector terminal. The carrier wave of this output is removed by the capacitor 1420, and only the envelope is output to the output terminal 1421. Similar to the case of the envelope detection by the diode, the diode characteristic between the base and the emitter is also superimposed on this output signal. When used in the first embodiment, this diode characteristic can be canceled by using an equivalent circuit for input and output as in the case of using a diode.

On the other hand, in the case of the second embodiment, the envelope on the input side is obtained by calculating the complex envelope signal. The envelope waveform in this case becomes highly accurate by increasing the number of bits for calculation. On the other hand, on the output side, an envelope detection circuit 14 using a diode is used. Therefore, the detected waveform contains a component due to the non-linear characteristic of the diode, and it is impossible to directly generate a difference signal from the envelope on the input side. Therefore, a signal conversion circuit 18 having substantially the same DC characteristic as the envelope detection circuit 14 on the output side is inserted between the digital / analog converter 102 and the difference signal generation circuit 15.

FIG. 9 shows an example of diode characteristics, and FIG. 10 shows an example of characteristics of the signal conversion circuit 18.

When the diode in the envelope detection circuit 14 has the characteristic shown in FIG. 9, a diode having the same characteristic is also provided in the signal conversion circuit 18, and the envelope signal output from the digital-analog converter 102 is provided to this diode. Input with bias voltage added. At this time, the envelope signal having the nonlinear characteristic of the diode is output to the output of the signal conversion circuit 18. By using this signal and generating a difference signal from the envelope signal on the output side, the diode characteristics are canceled from the difference signal.

11 and 12 show an example of the signal conversion circuit 18. Eleventh
The circuit shown in the figure is a case where the circuit shown in FIG. 7 is used as the envelope detection circuit 14, and is the circuit itself from which the DC cutting capacitor 1402 is removed. Also, the circuit shown in FIG.
This is a case where the circuit shown in the figure is used, and is the circuit itself from which the DC cutting capacitor 1412 is removed.

A semiconductor element used for the signal conversion circuit 18 is an envelope detection circuit.
The difference signal can be generated without error by making it almost the same as that of 14. Capacitor 1406 for removing carrier wave,
The presence or absence of 1420 does not depend on the characteristics.

As described above, the configuration using the envelope detection circuit 14 and the signal conversion circuit 18 can achieve a more accurate envelope feedback system.

FIG. 13 is a block configuration diagram of a main part of a linear transmission device according to a third embodiment of the present invention.

In the present embodiment, a power amplifier 4'having a two-stage configuration is used, and the power control circuit 19 'controls the signal level by an amplifier at an intermediate stage (in this case, the first stage).

The output of the envelope detection circuit 5 in the first embodiment or the output of the digital-analog converter 102 in the second embodiment is supplied to the DC voltage conversion circuit 7 as a control signal. The output of the DC amplifier 16 is supplied to the power control circuit 19 'as a control signal. The high frequency input terminal 401 of the power amplifier 4'has the modulated wave of the modulated wave input terminal 1'of the first embodiment or the quadrature modulator 24 of the second embodiment.
Is supplied.

A DC voltage is also supplied from the DC power supply terminal 8 to the DC voltage conversion circuit 7 and the power control circuit 19 '. The output of the DC voltage conversion circuit 7 is connected to the drain bias terminal 403 at the final stage of the power amplifier 4 '. The output of the power control circuit 19 'is the drain bias terminal 40 of the first stage of the power amplifier 4'.
Connected to 2.

The high frequency input terminal 401 is connected to the FET4 via the input matching circuit 404.
It is connected to the gate terminal of 05. The drain terminal of the FET 405 is connected to the drain bias terminal 402 via the choke coil 406, and the source terminal is grounded. The drain terminal of the FET 405 is also connected to the gate terminal of the FET 408 via the interstage matching circuit 407. The drain terminal of the FET 408 is connected to the drain bias terminal 403 via the choke coil 409,
The source terminal is grounded. The drain terminal of the FET 408 is also connected to the high frequency output terminal 411 via the output matching circuit 410.

The power control circuit 19 'controls the drain bias of the FET 405. This changes the power gain of FET405,
Is supplied with a signal modulated by the difference signal. In this way, the power amplifier 4'as a whole can perform more accurate amplitude compensation.

FIG. 14 is a circuit diagram showing an example of the power control circuit 19 'used in the third embodiment. A DC voltage is supplied from the DC power supply terminal 8 to the power supply terminal 1941. The power supply terminal 1941 is the collector of the transistor 1942.
It is connected to the output terminal 1943 via the emitter. The emitter terminal of the transistor 1942 has resistors 1944 and 1945 for voltage division.
Is grounded through and the connection point of the resistors 1944 and 1945 is connected to the inverting input of the operational amplifier 1947. The control signal from the control terminal 1947 is supplied to the non-inverting input of the operational amplifier 1946. The output of the operational amplifier 1946 is connected to the base terminal of the transistor 1942.

The transistor 1942 controls the DC voltage applied to the power supply terminal 1941 and supplies it to the output terminal 1943. The operational amplifier 1946 compares the divided voltage of the voltage of the output terminal 1943 with the control voltage input from the control terminal 1947, and supplies the difference to the base terminal of the transistor 1942. As a result, a highly accurate voltage is output to the output terminal 1943. This output voltage is supplied to the drain bias terminal 402 and the FET 40
Add modulation to 5.

In this way, by controlling the power gain of the amplifier of the transmission system by voltage, the amplitude of the entire transmission system is controlled with higher accuracy.

FIG. 15 is a block diagram of a linear transmitter according to a fourth embodiment of the present invention.

The device of this embodiment is provided with a transmission output control terminal 1951, and between the envelope detection circuit 5 and the DC voltage conversion circuit 7 and between the difference signal generation circuit 15 and the power control circuit 19.
The difference from the first embodiment is that level control circuits 1952 and 1953 are provided respectively.

A transmission output control signal is input to the transmission output control terminal 1951. The level control circuit 1952 adjusts the signal level input to the DC voltage conversion circuit 7 by this transmission output control signal. The level control circuit 1953 adjusts the output of the difference signal generation circuit 15 based on the transmission output control signal,
Adjust the control amount by 19. This controls the transmission output.

FIG. 16 is a block diagram of a linear transmitter according to a fifth embodiment of the present invention.

The apparatus of this embodiment includes an RF switch 1954, and the control signal of the transmission output control terminal 1951 is supplied to the RF switch 1954 and also to the DC voltage conversion circuit 7. The DC voltage conversion circuit 7 stops the bias supply to the power amplifier 4 by the control signal from the transmission output control terminal 1951. At the same time, the RF switch 1954 cuts off the input level of the power amplifier 4 (and the power control circuit 19). This stops the transmission output.

FIG. 17 is a block diagram showing the sixth embodiment of the present invention, and FIG. 18 is a block diagram showing the seventh embodiment of the present invention.

In the first and second embodiments described above, the cut-off frequency of the input / output of the DC voltage conversion circuit 7 is very small,
It is about KHz. Therefore, in the amplifier of the modulated wave signal that fluctuates at a frequency higher than the cutoff frequency, the DC voltage conversion circuit 7 cannot follow the change of the modulated wave signal. As a result, the output is distorted. For example, the frequency characteristic of the switching regulator depends on the control switch frequency and the filter in the regulator. In order to improve this frequency characteristic, the control switch frequency may be increased, but it is about 500 kHz at most due to the switching characteristics of the transistor or diode that is the switch. For this reason, it is difficult to obtain sufficient frequency characteristics, and as a result, a sufficient linear transmission device cannot be realized for a modulated wave signal with a high modulation frequency.

In the sixth and seventh embodiments, these drawbacks are eliminated and the frequency characteristics of the input and output are equivalently broadened with a simple structure, and the envelope detection circuit 5 changes to the DC voltage conversion circuit 7. The difference from the first and second embodiments is that the frequency equalization circuit 11 for equalizing the amplitude and phase of the supplied control signal is provided.

FIG. 19 is a block diagram showing details of the frequency equalization circuit 11.

The frequency equalizer 11 comprises a resistor R ₁ to R _6, the capacitor
It is configured to include C ₁ and C ₂ and operational amplifiers 112 and 113. One end of the resistors R ₁ and R ₆ is connected to the input terminal 111
Is connected to the other end of the resistor R ₁ is the resistance R _2, are commonly connected to one end of the capacitor C ₁ and C _2, the other end of the resistor R ₂ is grounded,
The other end of the capacitor C ₁ is connected to the output of the operational amplifier 112 together with the other end of the resistor R ₃ and one end of the resistor R ₄ ,
The other end of ₂ is connected to the inverting input terminal of the operational amplifier 112 together with one end of the resistor R ₃ , the non-inverting input terminal of the operational amplifier 112 is grounded, and the other end of the resistor R ₄ is one end of the resistor R ₅ and the resistor R ₆ Is connected to the inverting input terminal of the operational amplifier 113, the non-inverting input terminal of the operational amplifier 113 is grounded, and the output of the operational amplifier 113 is connected to the other end of the resistor R ₅ and the output terminal 114.

FIG. 20 shows an example of the spectrum of the envelope signal in the QPSK modulation method, that is, the envelope signal R (t) of the equation (4).
It is a characteristic view showing the frequency distribution of. However, roll-off = 0.5 and transmission speed is 32 Kb / s. In order to suppress the amplitude distortion of the power amplifier 4 to 50 dB or less, the DC voltage control circuit 7
The frequency characteristics of must include a spectrum component that is 50 dB lower than the DC component. So in this case, about 40
Bandwidth up to ~ 50KHz is required.

FIG. 21 shows an example of frequency equalization characteristics for obtaining this band. A curve A shows the frequency characteristic of the DC voltage conversion circuit 7 before frequency equalization, and its cutoff frequency is 10 KHz or less.
On the other hand, the frequency equalizing circuit 11 has a frequency characteristic such that the amplitude becomes large in a high frequency region as shown by a curve B. Therefore,
When this equalized signal passes through the DC voltage conversion circuit 7, its characteristic becomes as shown by the curve C. That is, the cutoff frequency is 50 KHz or higher. The drain voltage V _D of the power amplifier 4 is controlled by the improved output voltage of the DC voltage conversion circuit 7, and a high-speed modulated wave signal can be amplified.

The frequency equalization circuit 11 having the frequency characteristic as described above is
As shown in FIG. 19 as an example, it can be easily realized by using an operational amplifier, a resistor, and a capacitor (see William Electronic, "Electronic Filter", McGraw-Hill, translated by Kato).

FIG. 22 is a block diagram showing the eighth embodiment of the present invention, and FIG. 23 is a block diagram showing the ninth embodiment of the present invention.

In these embodiments, the level conversion circuit 12 is first provided as a means for holding the output voltage of the DC voltage conversion circuit 7 at a certain value or more when the signal level of the envelope is smaller than a predetermined value. Different from the embodiment and the second embodiment.

FIG. 24 shows an example of the drain voltage characteristic in which the gain of the power amplifier 4 is constant with respect to the high frequency input voltage.

In FIG. 24, the alternate long and short dash line indicates that the power amplifier 4 operates when the drain voltage is a certain value (about 2 V in the example of FIG. 24) or more, and the relationship between the high frequency input voltage and the drain voltage is almost linear. Indicates. In this case, the envelope detection circuit
The linearity of the power amplifier 4 can be maintained by amplifying the output of 14 with an appropriate amplification factor and shifting the voltage level thereof.

On the other hand, as shown by the solid line in FIG. 24,
The drain voltage characteristic is non-linear with respect to the high frequency input voltage, and a substantially constant drain voltage may be required in a region where the input voltage is small. In such a case, the broken line shown in FIG. 24 approximates the broken line. That is, it is approximated that when the high frequency input voltage is V _S or less, a drain voltage having a constant value V ₀ is required, and when the input voltage exceeds V _S , a drain voltage that linearly increases with respect to the high frequency input voltage is required. . FIG. 25 shows an example of a level conversion circuit for obtaining such characteristics.

The envelope signal output from the envelope detection circuit 5 is supplied to the input terminal 1201. The input terminal 1201 is connected to the inverting input of the operational amplifier 1203 via the resistor 1202. The non-inverting input of the operational amplifier 1203 is grounded. The output of the operational amplifier 1203 is connected to the anode of the diode 1204 and the cathode of the diode 1205. The cathode of diode 1205 is connected to the inverting input of operational amplifier 1203. The voltage −V _S is further supplied to the inverting input via the resistor 1206.
The connection point between the resistor 1206 and the operational amplifier 1203 is connected to the anode of the diode 1205 via the resistor 1208. diode
The anode of 1205 is further connected to the operational amplifier via resistor 1208.
Connects to inverting input of 1209. The voltage V ₀ is supplied to the non-inverting input of the operational amplifier 1209. The output of the operational amplifier 1209 is feedback-connected to the inverting input via the resistor 1210, and
It is output to the DC voltage conversion circuit 7 via the output terminal 1211.

When the signal level at the input terminal 1201 is below the voltage V _S ,
The diode 1204 becomes conductive and the diode 1205 becomes non-conductive, and the operational amplifier 1203 becomes a positive phase amplifier with a gain of "1". Since the non-inverting input of the operational amplifier 1203 is grounded, its output has a zero potential. Therefore, the voltage −V _S is applied to the resistor 1208 via the resistors 1206 and 1207.

When the signal level of the input terminal 1201 exceeds the voltage V _S , the diode 1204 becomes non-conductive, the diode 1205 becomes conductive, and the operational amplifier 1203 operates as an inverting amplifier.

The operational amplifier 1209 applies the offset voltage V ₀ to the resistor 12
Amplify the signal from 08. By supplying this amplified signal to the DC voltage conversion circuit 7 via the output terminal 1211, the drain bias voltage of the power amplifier 4 can be controlled as shown by the broken line in FIG. The slope when the high frequency input voltage exceeds V _S can be set by selecting the values of the resistors 1207 and 1210.

In this way, the power amplifier 4 can be operated sufficiently even when the signal level of the envelope is low, and an output signal with little distortion can be obtained.

FIG. 26 is a block diagram showing the tenth embodiment of the present invention, and FIG. 27 is a block diagram showing the eleventh embodiment.

These embodiments differ from the first and second embodiments in that a frequency equalizing circuit 11 and a level converting circuit 12 are provided. That is, the DC voltage conversion circuit 7 is controlled via the frequency equalization circuit 11 and the level conversion circuit 12. The point to be noted here is that level conversion is performed after frequency equalization, and the opposite is not effective. With such a configuration,
More stable and highly accurate voltage control can be performed, and linear amplification can be performed with high efficiency and low distortion and high efficiency.

FIG. 23 shows an example of the output power spectrum of the second embodiment. In this example, offset QPSK is used as the modulation format. The vertical axis of the figure shows the power spectrum, and the horizontal axis shows the frequency. As the power amplifier 4, a saturated type is used, and when the drain voltage is not controlled, only the DC voltage is operated, when the drain voltage is controlled according to the envelope of the input side, and when the drain voltage is controlled and the output side is controlled. The output when feedback is applied by the envelope is shown. By each distortion compensation, out-of-band side-effects (f ± Δf, f ± 2
It can be seen that Δf) becomes smaller.

In the above description, a DC-DC converter or a series control transistor is illustrated as the DC voltage conversion circuit 7 that controls a DC voltage with a control signal. As the DC / DC converter, a DC voltage conversion circuit using pulse width modulation, which is usually called a class S amplifier, can be used. Further, there are step-down DC / DC converters and switching regulators whose operation principle is very similar to this, and such a DC / voltage conversion circuit can be used.

Further, in the present specification, a terminal to which a bias voltage is supplied is a terminal to which power of at least an active element forming a high frequency power amplifier is supplied, and in a common emitter type amplifier of a bipolar transistor, a collector electrode, an FE.
In the source grounded form of T, it means a power supply terminal that can control the voltage of the drain electrode, and further an anode terminal. Further, even when the high frequency power amplifier is configured in multiple stages, the present invention can be similarly implemented by controlling the voltage of any or all of the power supply terminals of the constituent transistors. Furthermore, the present invention can be similarly implemented in the case of intermediate frequency modulation involving frequency conversion between the modulator and the power amplifier.

〔The invention's effect〕

As described above, the linear transmission device of the present invention uses a saturated high frequency power amplifier, controls the power supply voltage of the amplifier by the envelope of the modulated wave, and outputs the output envelope and the input envelope of the power amplifier. Amplitude modulation is applied to the input modulation wave to the high frequency power amplifier by the difference. This makes it possible to realize linearity with respect to a high-speed input modulated wave that cannot be adjusted only by controlling the power supply voltage.

Further, when the envelope is obtained from the baseband signal and used as the control signal, a detection circuit having the same or the same characteristic as the detection circuit of the output envelope cancels the detection characteristic, so that a highly accurate control signal can be generated.

Furthermore, by equalizing the frequency of the control signal of the DC voltage conversion circuit, the DC voltage conversion circuit can be broadened equivalently, and the power supply terminal voltage can be kept constant even when the envelope of the input modulated wave of the power amplifier is small. By keeping the value above the value, it is possible to prevent the unnecessary distortion from being generated from the active element, and it is possible to improve the linearity of the saturated power amplifier.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a linear transmitter according to the first embodiment of the present invention. FIG. 2 is a circuit diagram showing an example of a difference signal generation circuit. FIG. 3 is a circuit diagram showing an example of a DC amplifier. FIG. 4 is a circuit diagram showing an example of a power control circuit. FIG. 5 is a circuit diagram showing another example of the power control circuit. FIG. 6 is a block diagram showing a linear transmitter according to the second embodiment of the present invention. FIG. 7 is a circuit diagram showing an example of an envelope detection circuit. FIG. 8 is a circuit diagram showing another example of the envelope detection circuit. FIG. 9 is a diagram showing diode characteristics. FIG. 10 is a diagram showing characteristics of the signal conversion circuit. FIG. 11 is a diagram showing an example of a signal conversion circuit. FIG. 12 is a diagram showing another example of the signal conversion circuit. FIG. 13 is a block diagram showing a main part of a linear transmitter according to a third embodiment of the present invention. FIG. 14 is a diagram showing an example of a power control circuit used in this embodiment. FIG. 15 is a block diagram showing a linear transmitter according to a fourth embodiment of the present invention. FIG. 16 is a block diagram showing a linear transmitter according to a fifth embodiment of the present invention. FIG. 17 is a block diagram showing a linear transmitter according to a sixth embodiment of the present invention. FIG. 18 is a block diagram showing a linear transmitter according to a seventh embodiment of the present invention. FIG. 19 is a circuit diagram showing an example of a frequency equalization circuit. FIG. 20 is a diagram showing an example of an envelope spectrum. FIG. 21 is a diagram showing an example of frequency characteristics. FIG. 22 is a block diagram showing a linear transmitter according to an eighth embodiment of the present invention. FIG. 23 is a block diagram showing a linear transmitter according to the ninth embodiment of the present invention. FIG. 24 is a diagram showing an example of drain voltage characteristics in which the gain of the high frequency power amplifier is constant with respect to the high frequency input voltage. FIG. 25 is a circuit diagram showing an example of a level conversion circuit. FIG. 26 is a block diagram showing a linear transmitter according to the tenth embodiment of the present invention. FIG. 27 is a block diagram showing a linear transmitter according to an eleventh embodiment of the present invention. FIG. 28 is a diagram showing an example of the output power spectrum of the second embodiment. FIG. 29 is a block diagram of a conventional linear transmitter. 1 ... Input terminal, 1 '... Modulation wave input terminal, 2, 20 ...
Modulator, 3, 13 ... Directional coupler, 4 ... Power amplifier,
5, 14 ... Envelope detection circuit, 6, 17 ... Correction circuit, 7 ...
… DC voltage conversion circuit, 8 …… DC power supply terminal, 9 …… Output terminal, 11 …… Frequency equalization circuit, 12 …… Level conversion circuit,
15 ... Difference signal generation circuit, 16 ... DC amplifier, 18 ... Signal conversion circuit, 21 ... Complex envelope generation circuit, 22, 23, 102 ...
… Digital / analog converter, 24 …… Quadrature modulator, 25
...... Carrier oscillator, 100 …… Envelope generator, 1951 ……
Transmission output control terminal, 1952, 1953 ... Level control circuit, 19
54 ... RF switch.

Front page continuation (72) Inventor Yasushi Yamao 1-1-6 Uchisaiwaicho, Chiyoda-ku, Tokyo Within Nippon Telegraph and Telephone Corporation (72) Inventor Tadao Takami 1-1-6 Uchiyuki-cho, Chiyoda-ku, Tokyo Nippon Telegraph and Telephone Corporation Stock In-house (72) Inventor Shigeru Tomisato 1-6, Uchisaiwaicho, Chiyoda-ku, Tokyo Inside Nippon Telegraph and Telephone Corporation (56) Reference Japanese Unexamined Patent Publication No. 1-276809 (JP, A) Shokai 62-198711 (JP , U) Actual development Sho 61-18618 (JP, U)

Claims (2)

(57) [Claims] 1. A power amplifier using a modulated wave as an input signal, bias means for supplying a DC bias voltage to the power amplifier, and voltage control for controlling an output voltage of the bias means based on an envelope signal level of the modulated wave. The input signal of the power amplifier is controlled by the difference between the envelope signal level and the envelope signal level of the output signal of the power amplifier, and the voltage control means is provided. Is a frequency equalization circuit that equalizes the amplitude and phase of the envelope obtained from the modulated wave and supplies the equalized amplitude and phase to the bias means. 2. A power amplifier using a modulated wave as an input signal, bias means for supplying a DC bias voltage to the power amplifier, and voltage control for controlling the output voltage of the bias means by the envelope signal level of the modulated wave. The input signal of the power amplifier is controlled by the difference between the envelope signal level and the envelope signal level of the output signal of the power amplifier, and the voltage control means is provided. The linear transmission device is characterized in that it includes means for holding the output voltage of the bias means at a certain value or more when the signal level of the envelope obtained from the modulated wave is smaller than a predetermined value.