JP2688666B2 - How to vectorize shapes - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a vectorization method of a graphic, and more particularly, to a vectorization method effective for vectorizing a contour of a graphic.

[Background of the invention and its problems]

When recording figures, raster data and vector data can be considered as data formats.Generally, vector data, especially contour vector data, has a smaller capacity than raster data, and enlarges figures while maintaining the quality of figures. It is easy to display in reduced or deformed form,
It is valid data. Conventionally, this vector data is generally given as a part of the boundary pixels of the figure arranged as a series of data, and the quality of the reproduced figure depends on which boundary pixel is selected. In particular, when a character such as a kanji is recorded and reproduced as a vectorized graphic, the quality of the reproduced graphic (character) greatly affects the commercial value.

And, as one of the criteria for this quality, there is a point whether or not the right-angled part, especially the concave part, is expressed as a clear right-angled part. However, as far as the inventor knows, it seems that the angle calculation of the boundary pixel is conventionally performed when vectorizing, and it takes a lot of processing time to detect the right-angled portion itself. Therefore, it was difficult to express a right angle clearly.

[Object of the invention]

The present invention was devised to solve such a conventional problem, and an object thereof is to provide a high-speed vectorization method of a graphic that can express a concave right-angle portion as a sharp right angle.

[Summary of the Invention]

The graphic vectorization method according to the present invention relates to a method of using the video processing system that the applicant of the present invention has already filed in a series of patent applications, and the following processing is performed using the system. is there. That is, a chain code or a chain code and a code altitude is given to the boundary pixel of the figure, and when the code string has a predetermined pattern, rewriting and addition are performed. The predetermined pattern and the rewriting result thereof are given as shown in Table 1 according to the direction in which the code is added.

FIG. 1 shows a video processing system used for vectorizing a graphic. The video processing system includes a calculation unit 3 including a numerical calculation unit 1 and a state calculation unit 2, and the calculation unit 3 includes memories 41 to 41. Data is input from 44. The output of the arithmetic unit 3 is input to the conversion unit 5 or the sequential processing unit 6, and the outputs of the conversion unit 5 and the sequential processing unit 6 are returned to the memories 41 to 44 via the local bus. The data input to the calculation unit 3 is temporarily held by the proximity processing unit 7, and the data for 9 pixels is simultaneously input to the calculation unit 3.

As shown in FIG. 2, the state calculation unit 2 is provided with a binarization unit 8, a boundary pixel extraction unit 9, and a pattern matching unit 10, and the binarization unit 8 sets the data to “1” at a predetermined threshold or Data of "0" is generated, and the boundary pixel extraction unit 9 sets a predetermined flag (for example, "1") when the pixel is a boundary pixel.
Is output. The pattern matching unit 10 outputs a predetermined signal (for example, "1") when the data of 9 pixels matches the predetermined pattern. The outputs of the boundary pixel extraction unit 9 and the pattern matching unit 10 are selected and output by the selector 11.

Only the boundary pixel extraction unit 9 in the state calculation unit 2 is shown in FIG. As shown in FIG. 3A, when the pixel values of the convolution in the image are indicated by the symbols a to i, the central pixel e
Is a boundary pixel, one of its upper, lower, left, and right pixels must have a background pixel value, and any one of b, d, f, and h has a background pixel value (for example, "0"), and e is It is the pixel value of the figure (for example, "1"). Therefore, Is the boundary pixel extraction logic.

As shown in FIG. 5, the numerical operation unit 1 includes nine multiplication kernels 121 to 129 and can multiply the pixel value of 9 pixels by different multipliers.

FIG. 4 shows the sequential processing unit 6. The sequential processing unit 6 includes a delay unit 13, a comparator 14, and a logic unit 15. The logic unit 15 includes a state calculation unit 2 (not shown) in the calculation unit 3. Signal and the density of the pixel to be processed (e in FIG. 3A) are input. The delay unit 13 has a line memory 16 and flip-flops 17 to 19, and in the line memory 16, the logic unit 15 is provided.
Holds the output of about 1 scan line, and flip-flops 17, 18
Then, the output of the line memory 16 is delayed by one clock. The flip-flop 19 delays the output of the logic unit 15 by one clock, and the delay unit 13 as a whole inputs the four pixels processed by the logic unit 15 to the comparator 14. The four pixels correspond to a, b, c, d in FIG. 3A, and the logic unit 15 determines the processing target pixels e and a to d based on the processing result of these pixels and the density value of the processing target pixel e. Processed pixels (below
Called FP ₂ , FP ₃ , FP ₄ , FP ₅ . ) Is processed. In the present invention, the sequential processing unit 6 is used for labeling, and the following processing is required for labeling.

i) Determining that the target pixel is not a surrounding pixel value. (Parallel processing) ii) When a label number is not already given in the sequential information of FP _{2 to} FP ₅ , a new label number is given to the target pixel. (Sequential Processing) iii) When one type of label number already exists in the sequential information of FP _{2 to} FP ₅ , the label number is given to the target pixel. (Sequential processing) iv) When there are a plurality of label numbers in the sequential information of FP _{2 to} FP ₅ , give one of the label numbers to the target pixel,
The information that the plural label numbers belong to the same group is managed. (Sequential processing) The selector 20 is provided for the output of the logic unit 15 and the output of the arithmetic unit 3.
, And these outputs are selectively sent to the subsequent stage.

FIG. 6 shows the conversion unit 5. The conversion unit 5 connects the light calculation unit 22 to the output branch of the high-speed memory 21,
The output of 22 is connected to the data input of the high speed memory 21.
The binary densities of 8 pixels a to d and f to i in FIG. 3A are input to the light calculation unit 22 as a series of 8-bit data A,
Further, the chain code C _P immediately before the pixel to be processed is input. The light operation unit 22 performs an A × 1000 binary operation for shifting A by 3 bits to the left and an operation for adding C _P to the operation result. C _P is 3-bit data of 0 to 7, and as a result, 11-bit data in which A and C _P are parallel is generated. this
The 11-bit data is input to the address input of the high speed memory 21, and the high speed memory 21 outputs the chain code CC to be given to the processing target pixel e based on the address input. The high speed memory 21 stores a chain code to be output as shown in FIG. Since the CC to be output becomes C _P in the next calculation, the above-mentioned C _P need only be input in the first calculation, and the output of the high-speed memory 21 may be input to the light calculation unit 21 in the second and subsequent calculations. In this way, the conversion unit 5 can be used for chain code generation.

Furthermore, the conversion unit 5 is used as a code table indicating that a plurality of label numbers belong to the same group at the time of labeling (process iv described above). For example, the labeling number “5” and the labeling number “1” may belong to the same group. When it is determined, the corresponding labeling number "1" is written in the address "5". As a result, the labeling number is corrected by referring to the high speed memory 21 after the labeling process when one screen is scanned once.

After assigning one labeling number to each group, the whole screen is scanned again, and the starting point of each group (pixels in the group when the scan line first enters the group)
Alternatively, the x, y coordinates of the end point (pixels in the group when the scanning line leaves the group) are registered in the high speed memory 21 as shown in FIG. As a result, one of the boundary pixels of each group can be found immediately when the chain code is generated, which is effective for the chain code generation.

When processing the right angle of the concave in vectorization,
According to the processing of the flowchart shown in the figure. Before performing the processing of this flowchart, preprocessing such as noise processing and binarization is often performed. Each process of the flowchart will be described below.

i) Boundary Pixel Extraction As described with reference to FIGS. 2 and 3, all boundary pixels are extracted in one scan. Here, the background pixel is given a number such as "255" that is not included in the chain code.

ii) Labeling As described with reference to FIG. 4, labeling numbers are applied to all boundary pixels in one scan (temporary labeling),
Correct the labeling number in the second scan.

iii) Registration of start point coordinates of each group As described with reference to FIG. 7, the start points or end points of all groups are registered in the high-speed memory in one scan. Here, the starting point is registered.

iv) Chain code generation 3 × as described in connection with FIGS. 6 and 8.
The pattern of 8 pixels around the central pixel in 3 convolutions and the chain code generated immediately before that are input to the light calculation unit of the conversion unit, and the chain code in the convolution at that time is generated. The generated chain code is stored in the light calculation unit and MP
Transferred to the U, the MPU determines the convolution to be read next according to the chain code, and the memory 41 to 43
Predetermined pixels are sequentially read from and are sent to the neighborhood processing unit 7 via the local bus.

The generated chain code is written in memory 44,
As shown in FIG. 10, a figure in which boundary pixels are displayed is generated by the chain code string. At this time, the background pixel is given a number such as "255" that is not included in the chain code.

Note that it is of course possible to execute the chain code generation by software.

v) Rewriting the chain code for the treatment of the right-angled portion As shown in Table 1, if the direction of attaching the chain cord is set, there are four types of chain cord patterns to treat the concave right-angled portion. There are also four types of pixel patterns corresponding to this chain code pattern. This pattern is composed of 3 pixels, and the chain code of each pixel is input to each multiplication kernel 9 in the numerical calculation unit 1. Since the chain code is displayed with 3 bits, 1
The chain code of one pixel is input to three kernels in parallel, 0-bit right shift, 1-bit right shift, and 2-bit right shift are performed by these kernels, and then the least significant bit is output. As a result, each chain code of 3 pixels is decomposed bit by bit and output.
These 9-bit outputs are input to the pattern matching unit 10 in the state calculation unit 2 of FIG. 2 and compared with the chain code pattern to be judged at that time. Since there are four types of patterns to be judged as described above, it is possible to judge the concave right angle portion for all pixels by four scans. For example, when the “654” chain code pattern is determined, a 9-bit pattern obtained by decomposing these chain codes bit by bit is registered in the pattern matching unit, and the pixel pattern corresponding to this pattern is stored in the memories 41 to 43. Read from. In the figure of Fig. 10, pixel a,
Since only the patterns b and c meet this condition, the pattern matching unit outputs "true" (for example, "1") only when this pixel pattern is input, and this output is output from the conversion unit. It is input to a predetermined address of the high speed memory. A value after rewriting of the chain code to be rewritten at that time is stored in the high-speed memory. For example, for the pattern of “654”, the chain code of “64” is stored. When a true output is generated by this, chain codes of "6" and "4" are sequentially output,
Pixels having a chain code of "5" are rewritten to a chain code of "6", and background pixels which are not boundary pixels (Fig. 10d) are rewritten to a chain code of "4". This process is performed in one scan for one pattern, and as described above, the process is completed in four scans for four patterns.

The pattern matching unit 10 can only compare three pieces of 3-bit data, and cannot distinguish the boundary pixel from the background pixel. However, when any of the pixels is a background pixel, the boundary pixel determination unit The determination is made at 23, and writing to the memory 44 is prohibited at the timing when the processing of the conversion unit 5 for these pixels ends. As a result, proper right angle portion processing is performed.

The subsequent vectorization processing is software processed in the MPU.

[Effects of the Invention] In the vectorization method of a graphic according to the present invention, a chain code or a code equivalent to the chain code is given to boundary pixels of the graphic, and when the code string has a predetermined pattern, the rewriting and addition are performed. Since most of the processing is supported by hardware, the concave right angle portion can be expressed as a sharp right angle, and it has an excellent effect of being high speed.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a video processing system used to carry out the method of the present invention, FIG. 2 is a block diagram showing a state calculation unit in a calculation unit of the same video processing system, and FIG. 3 is a state calculation unit. A logic circuit diagram showing a boundary pixel extraction unit, FIG. 3A is a conceptual diagram showing convolution in an image, FIG. 4 is a block diagram showing a sequential processing unit in a video processing system, and FIG. 5 is a calculation unit of the video processing system. 6 is a block diagram showing a numerical operation unit in FIG. 6, FIG. 6 is a block diagram showing a conversion unit in the video processing system, FIG. 7 is a conceptual diagram showing coordinate values registered in a high speed memory in the conversion unit, and FIG. FIG. 9 is a conceptual diagram showing a chain code registered in the memory, FIG. 9 is a flowchart showing a vectorization method, and FIG. 10 is a conceptual diagram showing a figure displaying the chain code. 1 ... Numerical calculation unit, 2 ... State calculation unit, 3 ... Calculation unit,
41 to 44 …… Memory, 5 …… Conversion unit, 6 …… Sequential processing unit,
7 ... Neighborhood processing unit, 8 ... Binarization unit, 9 ... Boundary pixel extraction unit, 10 ... Pattern matching unit, 11 ... Selector, 121-129 ... Multiplication kernel, 13 ... Delay unit, 14 …
… Comparator, 15 …… Logic part, 16 …… Line memory,
17〜19 …… Flip-flop, 20 …… Selector, 21 ……
High-speed memory, 22 ... Multiplier kernel, 23 ... Boundary pixel determination unit.

Claims (1)

(57) [Claims] 1. When a boundary pixel of a figure is expressed by a chain code, when a certain chain code group has a constant pattern, it is determined to be a concave right-angled portion, and a point at the corner of this right-angled portion is determined. In the vectorization method of the figure in which the chain code determined by the relationship with the adjacent pixel is added, and the chain code group is changed according to the addition of the chain code at this point, the chain code pattern corresponds to the coordinates of each boundary pixel. Write to the input memory and the output memory at the address, register the chain code string in the pattern matching register, register the modified value of each code when modifying the registered chain code string in the table, The pixel pattern corresponding to the registered chain code string is sequentially read from the input memory, and the chain code of the read pixels is read. Is compared with the chain code string registered in the pattern matching register, and when the two match, the code registered in the table is output, and the code of the pixel in the output memory is rewritten with the output code. A vectorization method for figures.