JP2672743B2 - Evaluation method of contaminant impurities - Google Patents

Evaluation method of contaminant impurities

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Publication number
JP2672743B2
JP2672743B2 JP12188392A JP12188392A JP2672743B2 JP 2672743 B2 JP2672743 B2 JP 2672743B2 JP 12188392 A JP12188392 A JP 12188392A JP 12188392 A JP12188392 A JP 12188392A JP 2672743 B2 JP2672743 B2 JP 2672743B2
Authority
JP
Japan
Prior art keywords
type
semiconductor substrate
impurities
contaminant
type semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP12188392A
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Japanese (ja)
Other versions
JPH05315428A (en
Inventor
学 逸見
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
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Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP12188392A priority Critical patent/JP2672743B2/en
Publication of JPH05315428A publication Critical patent/JPH05315428A/en
Application granted granted Critical
Publication of JP2672743B2 publication Critical patent/JP2672743B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【産業上の利用分野】本発明は、特に半導体装置の製造
工程で発生する汚染不純物の種類と量とを評価する評価
方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an evaluation method for evaluating the type and amount of contaminant impurities generated in the manufacturing process of semiconductor devices.

【0002】[0002]

【従来の技術】MOSLSIやバイポ−ラICなどの半
導体装置は、洗浄工程、酸化工程、フォトリソグラフィ
工程など数百の製造工程を経て製造される。このような
製造工程では、鉄、ニッケル、クロムなどの重金属が混
入すると半導体装置の性能を劣化させるため、細心の注
意をはらって重金属汚染の排除を行っている。しかしな
がら、高集積化および高密度化が進むにつれて、新しい
製造工程の導入が必要となってきており、また要求され
るクリーン度も従来より大きくなり、重金属汚染の把握
の必要性が従来にもまして大きくなっている。
2. Description of the Related Art Semiconductor devices such as MOS LSIs and bipolar ICs are manufactured through hundreds of manufacturing processes such as a cleaning process, an oxidation process, and a photolithography process. In such a manufacturing process, when heavy metals such as iron, nickel and chromium are mixed in, the performance of the semiconductor device is deteriorated, so that heavy metal contamination is removed with great care. However, with the progress of higher integration and higher densities, new manufacturing processes have to be introduced, and the required cleanliness has also become greater than before, so the need to understand heavy metal contamination is greater than ever before. It is getting bigger.

【0003】このような状況のなかで、重金属による汚
染度を検出する方法としては、オージェ分析(AE
S)、SIMS、全反射螢光X線分析、などの各種物理
分析法がある。こうした分析法は汚染不純物の種類の確
定ができること、またその不純物量も求められること等
の利点がある。しかし前者の2つは半導体基板を切断し
所望の大きさの試料にする必要があること、またその試
料を評価装置の中に入れて真空に引く必要がある、時間
がかかる等の欠点がある。さらには試料を切断する際、
別の汚染不純物が混入し測定データが混乱する可能性も
ある。全反射螢光X線分析は、半導体基板を切断するこ
となく評価できるという利点があるが、ウェハ(半導体
基板)面内分布を詳細に調べようとすると、測定に時間
がかかるという欠点がある。また物理分析は一般に検出
感度が十分でないことが多く、電気的測定に比べ不満が
残る。
Under such circumstances, Auger analysis (AE) is a method for detecting the degree of contamination by heavy metals.
There are various physical analysis methods such as S), SIMS, and total reflection X-ray fluorescence analysis. Such an analysis method has an advantage that the type of contaminant impurities can be determined and the amount of the impurities can be obtained. However, the former two have the disadvantages that it is necessary to cut the semiconductor substrate into a sample of a desired size, and that the sample needs to be put into an evaluation device and evacuated, and that it takes time. . Furthermore, when cutting the sample,
It is possible that other contaminating impurities are mixed in and the measurement data is confused. The total reflection fluorescence X-ray analysis has an advantage that it can be evaluated without cutting the semiconductor substrate, but has a disadvantage that it takes time to measure the in-plane distribution of the wafer (semiconductor substrate) in detail. In addition, physical analysis generally has insufficient detection sensitivity, and remains unsatisfactory as compared with electrical measurement.

【0004】一方、半導体基板のライフタイムを測定
し、その値で汚染不純物の有無を検出する方法がある。
これは汚染不純物が半導体基板中に混入すると、キャリ
ア濃度が低下し、キャリアのライフタイムが低下する現
象を利用したもので、簡便であること、感度が良いこと
等の利点がある。またこの方法の場合、非接触法でライ
フタイムを測定することができる上、真空に引く必要も
ないため、測定しようとする半導体基板に何ら加工を加
えることなく短時間で測定することができるという利点
がある。
On the other hand, there is a method of measuring the lifetime of a semiconductor substrate and detecting the presence or absence of contaminant impurities based on the measured value.
This utilizes the phenomenon that the carrier concentration is reduced and the carrier lifetime is reduced when contaminant impurities are mixed in the semiconductor substrate, and has advantages such as simplicity and high sensitivity. In addition, in this method, the lifetime can be measured by a non-contact method, and since it is not necessary to draw a vacuum, it is possible to measure in a short time without adding any processing to the semiconductor substrate to be measured. There are advantages.

【0005】ところで、歩留まり向上のために、汚染源
を排除するためには汚染不純物の種類、汚染不純物の量
および汚染源の位置等を検知する必要がある。しかしな
がら従来のライフタイム測定法では、ライフタイム低下
に関与した汚染不純物の種類も汚染不純物の量も汚染源
の位置も検知することができないという問題がある。
In order to improve the yield, it is necessary to detect the type of contaminant impurities, the amount of contaminant impurities, the position of the contaminant source, etc. in order to eliminate the contaminant source. However, the conventional lifetime measurement method has a problem in that it is not possible to detect the type of contaminant impurities, the amount of contaminant impurities, and the position of the contaminant source that contributed to the decrease in lifetime.

【0006】[0006]

【発明が解決しようとする課題】このように従来の方法
では、非接触で短時間内に容易に汚染不純物の有無を測
定する方法はあるが、不純物の種類等を特定することが
できないという問題があった。
As described above, in the conventional method, there is a method of easily measuring the presence or absence of contaminant impurities in a short time without contact, but the type of impurities cannot be specified. was there.

【0007】本発明は、前記実情に鑑みてなされたもの
で、不純物の有無に加え容易に不純物の種類等を検知す
ることのできる方法を提供することを目的とする。
The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide a method capable of easily detecting the type of impurities in addition to the presence or absence of impurities.

【0008】[0008]

【課題を解決するための手段】そこで本発明では、n型
半導体基板とp型半導体基板とを用意し、これらに対
し、汚染発生状況を評価したい工程を付与し、付与後の
n型半導体基板とp型半導体基板とに対しそれぞれキャ
リアのライフタイムを検出し、検出値を、あらかじめ測
定しておいた不純物のn型半導体基板とp型半導体基板
に対するライフタイムデータの相関関係と比較し、比較
結果から不純物の種類およびまたは量を検知するように
している。
Therefore, in the present invention, an n-type semiconductor substrate and a p-type semiconductor substrate are prepared, a process for evaluating the contamination occurrence state is added to these, and the n-type semiconductor substrate after the addition is provided. And the p-type semiconductor substrate are respectively detected with a carrier lifetime, and the detected value is compared with the correlation of the lifetime data of the impurity with respect to the n-type semiconductor substrate and the p-type semiconductor substrate which have been measured in advance. The type and / or amount of impurities are detected from the result.

【0009】[0009]

【作用】本発明では半導体基板中に汚染不純物が混入し
た場合、半導体基板のキャリアが電子か正孔か、すなわ
ち導電型によってタイフタイムに与える影響が異なるこ
とに着目してなされたもので、上記方法によれば、汚染
不純物の種類を非接触でかつ容易に検知することが可能
となる。
In the present invention, when contaminant impurities are mixed in the semiconductor substrate, the influence on the tie-time differs depending on whether the carriers of the semiconductor substrate are electrons or holes, that is, the conductivity type. According to this, it becomes possible to easily detect the type of contaminant impurities in a non-contact manner.

【0010】すなわち、あらかじめ種々の重金属で汚染
された場合の各導電型における半導体基板のキャリアの
タイフタイムを測定し基準値として記憶しておき、種類
を検知すべき汚染不純物に汚染された半導体基板のライ
フタイムを各導電型について測定し、それぞれの値を前
記基準値と比較することにより、不純物の種類を同定す
る。
That is, the carrier time of the semiconductor substrate of each conductivity type when it is previously contaminated with various heavy metals is measured and stored as a reference value. The lifetime is measured for each conductivity type, and each value is compared with the reference value to identify the type of impurity.

【0011】また不純物濃度を変化させてライフタイム
の基準値を測定しこの不純物濃度を定量的に測定してお
くようにすれば、汚染不純物の種類のみならず不純物濃
度についても同定することができる。また非接触で各ウ
ェハ面内での測定を短時間で行うことができるため、不
純物分布についても容易に測定することができる。
If the impurity concentration is changed to measure the reference value of the lifetime and the impurity concentration is quantitatively measured, not only the type of contaminant impurities but also the impurity concentration can be identified. . Further, since the measurement on each wafer surface can be performed in a short time in a non-contact manner, the impurity distribution can be easily measured.

【0012】[0012]

【実施例】以下本発明の実施例について図面を参照しつ
つ詳細に説明する。
Embodiments of the present invention will be described below in detail with reference to the drawings.

【0013】まず、同一の不純物濃度のp型不純物とn
型不純物とをそれぞれ注入したp型シリコン基板および
n型シリコン基板を用意し、第1の加熱炉を用いて10
00℃〜1150℃、1時間の熱処理を行った。このの
ち光導電減衰法を用いてライフタイムを測定した。この
方法は、一定時間試料に光を照射し、キャリアを伝導帯
まで励起した時点から、基底状態に戻るまでの時間を測
定する方法である。ここでは5点について測定しその平
均値をXY座標にプロットした。その結果を図1に黒丸
で示す。なお比較のために汚染なし(加熱前)のp型シ
リコン基板およびn型シリコン基板のライフタイムを図
1に三角印で示す。ここでは共に400μsecであ
る。
First, p-type impurities and n having the same impurity concentration are used.
A p-type silicon substrate and an n-type silicon substrate, into which type impurities have been injected, respectively, are prepared, and a first heating furnace is used to
Heat treatment was performed at 00 ° C to 1150 ° C for 1 hour. After that, the lifetime was measured using the photoconductive decay method. This method is a method of irradiating a sample with light for a certain period of time, and measuring the time from when the carriers are excited to the conduction band to when they return to the ground state. Here, the measurement was performed at 5 points and the average value was plotted on the XY coordinates. The results are shown by black circles in FIG. For comparison, the lifetimes of the p-type silicon substrate and the n-type silicon substrate without contamination (before heating) are indicated by triangle marks in FIG. Here, both are 400 μsec.

【0014】ここで、熱処理温度が1000〜1050
℃の範囲では、汚染度は低く、汚染不純物量が少なくp
型シリコン基板に対してのみライフタイムが低下する。
この変化は連続的である。
Here, the heat treatment temperature is 1000 to 1050.
In the range of ° C, the pollution degree is low, and the amount of contaminant impurities is small.
The lifetime is reduced only for the silicon substrate.
This change is continuous.

【0015】そして1100℃を越えると汚染不純物量
が増加し、p型、n型ともにライフタイムが低下する。
When the temperature exceeds 1100 ° C., the amount of contaminant impurities increases, and the p-type and n-type lifetimes decrease.

【0016】これらのシリコン基板に対して全反射螢光
X線分析をおこなった結果、ライフタイムの値に対応し
て各濃度の鉄(Fe)が検出された。図1中の濃度数値
はこのX線分析によるものである。
As a result of total reflection X-ray fluorescence analysis on these silicon substrates, iron (Fe) of each concentration was detected corresponding to the lifetime value. The concentration values in FIG. 1 are based on this X-ray analysis.

【0017】次に第2の加熱炉を用いて同様に1000
℃〜1150℃、1時間の熱処理を行った。こののち光
導電減衰法を用いてライフタイムを測定し、ここでもX
Y座標にプロットした。その結果を図1に白丸で示す。
Next, using the second heating furnace, 1000
The heat treatment was performed at 1 ° C to 1150 ° C for 1 hour. After that, the lifetime was measured using the photoconductivity decay method.
It is plotted on the Y coordinate. The results are shown by white circles in FIG.

【0018】この図から明らかなように、p型、n型シ
リコン基板に対してともにライフタイムが低下する。
As is apparent from this figure, the lifetime is reduced for both p-type and n-type silicon substrates.

【0019】これらのシリコン基板に対して全反射螢光
X線分析をおこなった結果、ライフタイムの値に対応し
て各濃度の銅(Cu)が検出された。図1中の濃度数値
はこのX線分析によるものである。
As a result of total reflection X-ray fluorescence analysis on these silicon substrates, copper (Cu) at each concentration was detected corresponding to the lifetime value. The concentration values in FIG. 1 are based on this X-ray analysis.

【0020】このように黒丸と白丸とは異なる軌跡を描
くため、汚染不純物が不明な場合、ライフタイムを測定
し、この図面上にプロットすれば、鉄と銅の区別は容易
に可能である。
Since the black circle and the white circle draw different trajectories in this way, if the contaminant impurities are unknown, the lifetime can be measured and plotted on this drawing to easily distinguish between iron and copper.

【0021】このように第1および第2の加熱炉で熱処
理した結果を基準値としてXY座標に図1にプロットし
ておく。すなわち、あらかじめ他の方法によって不純物
の種類と濃度を検知したものに対し、不純物の種類と濃
度に対してライフタイムを測定し相関関係を得ておくわ
けである。
The results of the heat treatments in the first and second heating furnaces are plotted in FIG. 1 on the XY coordinates as reference values. That is, the lifetime is measured and the correlation is obtained with respect to the type and the concentration of the impurity, while the type and the concentration of the impurity are detected by another method in advance.

【0022】このようにして準備をおこなったのち、汚
染測定対象である第3の加熱炉でp型、n型シリコン基
板を熱処理する。そして、このp型、n型シリコン基板
のライフタイムを光導電減衰法で測定し、図1上にプロ
ットしたところ、図1中にAで示す位置であった。この
点Aは鉄の基準曲線上にあり、1×1011cm-2〜1×1
10cm-2の間にある。従って第3の加熱炉では鉄が汚染
不純物として、1×1011cm-2〜1×1010cm-2が混入
することがわかる。
After the preparation is carried out in this way, the p-type and n-type silicon substrates are heat-treated in the third heating furnace which is the object of contamination measurement. The lifetimes of the p-type and n-type silicon substrates were measured by the photoconductivity decay method and plotted on FIG. 1 to find that they were at the positions indicated by A in FIG. This point A is on the iron standard curve and is 1 × 10 11 cm -2 to 1 × 1
It lies between 0 10 cm -2 . Therefore, it can be seen that in the third heating furnace, 1 × 10 11 cm -2 to 1 × 10 10 cm -2 is mixed as iron as a contaminant impurity.

【0023】そこで確認のために、全反射螢光X線分析
をおこなった結果、鉄(Fe)が2×1010cm-2検出さ
れた。
For confirmation, a total reflection X-ray fluorescence analysis was carried out. As a result, iron (Fe) was detected at 2 × 10 10 cm -2 .

【0024】このように本発明の方法では極めて容易に
短時間で汚染不純物の種類および量が非接触非破壊で測
定できる。この方法では、面内測定が5点測定で2分、
500点測定でも1時間で行うことができ、極めて短時
間で容易に行うことができる。従って、汚染因子(源)
の抽出が可能となり、汚染低減対策が立て易くなる。
As described above, according to the method of the present invention, the type and amount of the contaminant impurities can be measured very easily and in a short time without contact and nondestruction. With this method, in-plane measurement is 5 minutes for 2 minutes,
Even 500-point measurement can be performed in 1 hour, and can be easily performed in an extremely short time. Therefore, the pollution factor (source)
Can be extracted, and pollution reduction measures can be easily taken.

【0025】さらにウェハ面内の不純物分布の詳細なデ
ータが短時間で得られるため、汚染源の位置や方向を高
精度に検出することができる。
Furthermore, since detailed data of the impurity distribution on the wafer surface can be obtained in a short time, the position and direction of the contamination source can be detected with high accuracy.

【0026】なお前記実施例では2種類の汚染不純物に
ついてのみ基準データを測定しておくようにしたが、可
能性のある不純物に対し多数のデータを得、記憶してお
くようにすれば多種の不純物に対して測定可能である。
In the above-mentioned embodiment, the reference data was measured only for two kinds of contaminated impurities, but if a large number of data are obtained and stored for possible impurities, various kinds of data will be obtained. It can be measured for impurities.

【0027】また、前記実施例では測定値をXY座標に
プロットしたが、データベースとして記憶しておくよう
にし、計算機で演算するようにしてもよい。
Although the measured values are plotted on the XY coordinates in the above embodiment, they may be stored as a database and calculated by a computer.

【0028】さらに、ウェハ面内の各位置での測定値の
平均値を用いて汚染量を検出するようにしてもよいが、
各位置での汚染不純物分布を得るようにしてもよい。
Further, the amount of contamination may be detected by using the average value of the measured values at each position on the wafer surface.
The distribution of contaminant impurities at each position may be obtained.

【0029】[0029]

【発明の効果】以上説明してきたように、本発明によれ
ば、p型基板とn型基板の両方に対してキャリアのライ
フタイムを測定することにより、非接触非破壊で容易に
短時間で汚染不純物の種類等を検出することができる。
As described above, according to the present invention, by measuring the carrier lifetime for both the p-type substrate and the n-type substrate, non-contact, non-destructive, easy and short-time operation is possible. It is possible to detect the type of contaminant impurities.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明実施例の方法によるライフタイムの測定
結果を示す図。
FIG. 1 is a diagram showing a result of measuring a lifetime by a method according to an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

A 検出点 A detection point

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 評価しようとする汚染不純物をp型半導
体基板とn型半導体基板との両方に混入させ、キャリア
のライフタイムを測定して、それぞれの測定値を基準値
として記憶する工程と、汚染発生状況を評価したい製造
工程でp型半導体基板とn型半導体基板との両方を同様
に処理し、処理後のn型半導体基板とp型半導体基板と
の両方についてそれぞれキャリアのライフタイムを検出
し、検出値を、あらかじめ測定しておいた前記基準値と
比較し、比較結果からp型およびn型のライフタイムの
相関関係に基づき汚染不純物の種類を検知する工程を含
むことを特徴とする汚染不純物の評価方法。
1. A step of mixing a contaminant impurity to be evaluated into both a p-type semiconductor substrate and an n-type semiconductor substrate, measuring a carrier lifetime, and storing each measured value as a reference value, The p-type semiconductor substrate and the n-type semiconductor substrate are processed in the same manner in the manufacturing process in which the contamination generation status is to be evaluated, and the carrier lifetime is detected for both the processed n-type semiconductor substrate and p-type semiconductor substrate. Then, the method includes a step of comparing the detected value with the previously measured reference value, and detecting the type of contaminant impurities based on the correlation between the p-type and n-type lifetimes from the comparison result. Evaluation method of contaminant impurities.
JP12188392A 1992-05-14 1992-05-14 Evaluation method of contaminant impurities Expired - Fee Related JP2672743B2 (en)

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Application Number Priority Date Filing Date Title
JP12188392A JP2672743B2 (en) 1992-05-14 1992-05-14 Evaluation method of contaminant impurities

Publications (2)

Publication Number Publication Date
JPH05315428A JPH05315428A (en) 1993-11-26
JP2672743B2 true JP2672743B2 (en) 1997-11-05

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US7699997B2 (en) 2003-10-03 2010-04-20 Kobe Steel, Ltd. Method of reclaiming silicon wafers
FI121555B (en) 2005-10-07 2010-12-31 Teknillinen Korkeakoulu Measurement method, arrangement and software product
JP6344168B2 (en) * 2014-09-11 2018-06-20 株式会社Sumco Method and apparatus for evaluating metal contamination of boron-doped p-type silicon wafer, and method for producing boron-doped p-type silicon wafer

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