JP2655453B2 - Automatic interference canceller - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is applied to an interference canceling device for digital microwave radio communication. In particular, it relates to an automatic interference elimination device using a transversal filter.

[0002]

2. Description of the Related Art Digital microwave communication systems
And a system that coexists with the analog FM system. In recent years, digital microwave communication has been changed from interleaved transmission to co-channel transmission for effective use of frequency. If the frequency utilization efficiency is increased in this manner, the problem of interference from analog wireless communication (FM interference) may occur. Come up. That is, ordinary digital microwave communication
Sufficient isolation from existing analog lines
Need to take action. For this reason, the antenna branch angle etc.
If the analog signal of the existing line is not
Signal interference. Automatically compensates for such interference
For example, Matsue et al.
Out-coming interference compensator ", 1986
National Convention Lecture number 416 and others.

[0003] Transversal to eliminate interference
Japanese Patent Application Laid-Open No. 62-23 / 1987 as an interference removing means using a filter.
There is one proposed in Japanese Patent No. 3943. This conventional example will be described with reference to FIG. → in the figure is N (or ZN: N
Indicates that the signal is a certain integer) bit digital signal. The digital modulation signal input from the terminal 1 is split into two and input to multipliers 3 and 4, respectively, and the phase of the output of the carrier recovery circuit 17 and π / 2 (9
0 °) After performing quadrature synchronous detection with the delayed carrier and removing the harmonic components with the low-pass filters 9 and 10, the P and Q channels sent on the transmission side by the analog / digital conversion circuits 13 and 14, respectively. Is reproduced as a digital signal of P and Q channels having errors due to analog interference. On the other hand, the analog signal serving as the interference source is connected to terminal 2
Are input to the multipliers 5 and 6, and are subjected to quadrature synchronous detection using a carrier whose phase has been adjusted by the phase shifter 19 so as to have the same phase as that of the carrier to be subjected to quadrature synchronous detection in the demodulation circuit 100. After removing the harmonic components by the low-pass filters 11 and 12 having the same characteristics as the low-pass filters 9 and 10, the analog-to-digital conversion circuits 15 and 16 respectively in-phase components of an analog signal serving as interference sources and The orthogonal components are quantized. These quantized signals are input to digital multipliers 21 to 24, and the most significant (Most Signif) of these quantized signals is input.
icant Bit) bits, the control signal generating circuit 1 for automatic interference canceller as the quadrant decision signals _{D P} and _{D Q}
02 is input. In the digital multipliers 21 to 24,
In-phase interference control signals R _OP , _ROQ and quadrature interference control signals I _OP , _IOQ output from the control signal generation circuit 102 for the automatic interference canceling circuit, and the outputs of the analog / digital circuits 15 and 16 and digital multiplication respectively. Is performed, and the result is output to the digital adder 35 or 36. The digital adder 35 (36) replaces the digital multipliers 21 and 23 (22 and 24) with the digital adder 33.
(34), where it is added to the output of the analog / digital conversion circuit 13 (14). Of the output of the digital adder 33 and 34, it is inputted to the control signal generation circuit 102 for automatic interference canceller as respective next order bit error signal E _P and E _Q of the transmitted data signals. The error signal E _P and E _Q will amount proportional to the error components including analog interference component included in the digital modulation signal. Control signal generation circuit 10 for automatic interference cancellation circuit
2 exclusive OR circuits 25 to 28 output these error signals E
Takes each correlation between _P and E _Q quadrant decision signals D _P and D _Q, averaging operation is performed by the counting circuit 29 to 32 perform up-down counting, control signals R _OP and R for each phase interference _OQ and orthogonal interference control signal I
_OP and _IOQ are output. By controlling the outputs of the digital multipliers 21 to 24 in this manner,
The output of the digital adders 33 and 34 guarantees that the error value of the interference component due to the analog signal included in the digital signal is minimized in the sense of the square error. Also,
The outputs of the digital adders 33 and 34 are input to a control signal generating circuit 103 for DC offset, and DC offset control signals OFFSET (P) and (Q) are created. These DC offset control signals OFFSET
By (P) and (Q), control is performed so that the DC offset of the input baseband signals of the analog / digital conversion circuits 13 and 14 is optimized. Here, the DC offset control signal generation circuit 103 can be located after the analog / digital conversion circuits 13 and 14, but the analog / digital conversion circuits 13 and 14
Is a digital signal containing an analog interference component, the control is likely to be unstable. Usually, after removing the analog interference component, that is, the digital adders 33 and 3
It is located after 4.

[0004]

In such a conventional apparatus, since the error component due to the DC offset shift and the error component due to the analog interference are commonly used, the carrier frequency of the analog interference signal is changed to the carrier frequency of the digital signal. When the frequency is near the frequency, the control by the DC offset shift and the control for removing the analog interference are in a competitive state, and there is a disadvantage that the control diverges.

The present invention eliminates such a drawback and provides an automatic interference eliminator capable of realizing stable interference elimination even when the frequency difference between the carrier frequency of the digital modulation signal and the carrier frequency of the analog signal is small. The purpose is to do.

[0006]

According to the present invention, there is provided a first terminal for receiving a second modulated carrier modulated by a digital modulation signal, the first terminal being interfered by a first modulated carrier modulated by an analog signal; A second terminal for inputting one modulated carrier,
Subjecting said a first demodulator circuit for outputting a first quantization signal by performing linear交同synchronous detection in the second modulated carrier, a quadrature synchronous detection in the first modulated carrier above Symbol first demodulator and the same phase A second demodulation circuit for outputting a second quantized signal, an automatic interference canceling circuit for removing the second quantized signal from the first quantized signal to generate a third quantized signal, and A first control signal generation circuit that outputs a control signal of the automatic interference removal circuit based on the quantized signal and the second quantized signal, and outputs an offset control signal to the first demodulation circuit based on the third quantized signal An automatic interference canceller having a second control signal generating circuit to input the second quantized signal, and a frequency difference between a carrier frequency of the first modulated carrier and a carrier frequency of the second modulated carrier. Difference discrimination comparing the threshold with a threshold A switch that selects one of a control signal output from the first control signal generation circuit or a preset fixed signal based on a comparison result of the frequency difference determination circuit and gives the selected signal to the automatic interference removal circuit. It is characterized by having.

[0007]

When the frequency difference between the carrier frequency of the digital modulation signal and the carrier frequency of the analog signal falls below a threshold value, a reset signal for stopping the operation of the automatic interference elimination circuit is provided instead of the control signal output from the control signal generation circuit. . As a result, even when the frequency difference is small, divergence of control is prevented, and stable interference removal is performed.

[0008]

An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of this embodiment. In this embodiment, as shown in FIG. 1, a terminal 1 for receiving a second modulated carrier modulated by a digitally modulated signal interfered with a first modulated carrier modulated by an analog signal is provided. a terminal 2 for inputting a modulated carrier, a demodulation circuit 100 for outputting a first quantization signal by performing linear交同synchronous detection in the second modulated carrier, the said first modulated carrier in demodulation circuit 100 and the same phase A demodulation circuit 101 for performing quadrature synchronous detection and outputting a second quantized signal; an automatic interference canceling circuit 104 for removing the second quantized signal from the first quantized signal to generate a third quantized signal; A control signal generating circuit 102 for outputting a control signal for an automatic interference elimination circuit 104 based on the third quantized signal and the second quantized signal.
And a control signal generating circuit 103 that outputs an offset control signal to the demodulation circuit 100 based on the third quantized signal. Further, as a feature of the present invention, the second quantized signal is input, A frequency difference discriminating circuit 37 for comparing a frequency difference between a carrier frequency of the first modulated carrier and a carrier frequency of the second modulated carrier with a threshold, and a control signal generating circuit based on a comparison result of the frequency difference discriminating circuit 37 Automatic interference elimination circuit 1 by selecting either the control signal output from the control signal 102 or a preset fixed signal.
And a switch 38 to be provided to the control unit 04.

Next, the operation of this embodiment will be described. The operation and signal flow of the demodulation circuits 100 and 101, the control signal generation circuit 102 for the automatic interference elimination circuit, the control signal generation circuit 103 for the DC offset, and the automatic interference elimination circuit 104 are the same as those of the conventional example. Is the same. That is,
When the frequency difference Δf between the carrier frequency of the digital modulation signal and the carrier frequency of the analog signal is larger than a preset frequency difference, the frequency difference discriminating circuit 37 connected to the analog / digital conversion circuits 15 and 16 outputs a reset signal. For example, “1” is output as R. At this time, the switch 38 receives the reset signal R and selects the output of the control signal generation circuit for the automatic interference wave elimination circuit as the output. Thus, for in-phase interference control signal _{R OP, R OQ} and quadrature interference control signal _{I OP, I OQ} becomes an output of the respective counting circuits 29,32,30 and 31, the same operation as the conventional example. However, when the frequency difference Δf becomes smaller than a preset frequency, “0” is output as the reset signal R, and the output R _{OP of} the switch 38,
R _{OQ, I} OP, to select a signal of all "0" as _{I OQ.} At this time, the outputs of the digital multipliers 21 to 24 and the outputs of the digital adders 35 and 36 become all "0" signals, have no adverse effect on the digital signal, and control the DC offset for the interference from the analog signal. And the operation is stable.

[0010]

As described above, according to the present invention, when a frequency difference between a carrier frequency of a digital modulation signal and a carrier frequency of an analog signal is smaller than a certain frequency difference, an automatic interference elimination circuit is provided. Is stopped (reset), so that there is an effect that interference can be stably removed even when the frequency difference is small.

[Brief description of the drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a conventional example.

[Explanation of symbols]

 1, 2 terminal 3 to 6 multiplier 7, 8 π / 2 phase shifter 9 to 12 low-pass filter 13 to 16 analog / digital conversion circuit 17 carrier recovery circuit 18 clock recovery circuit 19, 20 phase shifter 21 to 21 24 Digital Multiplying Circuit 25-28 Exclusive Logic Circuit 29-32 Counting Circuit 33-36 Digital Adder 37 Frequency Difference Judgment Circuit 38 Switcher 100, 101 Demodulation Circuit 102, 103 Control Signal Generation Circuit 104 Automatic Interference Cancellation Circuit

Claims (1)

(57) [Claims] 1. A first terminal for receiving a second modulated carrier modulated by a digital modulation signal, the first terminal being interfered by a first modulated carrier modulated by an analog signal, and a first terminal for receiving the first modulated carrier. a secondary terminal, a first demodulator circuit for outputting a first quantization signal by performing linear交同synchronous detection in the second modulated carrier, on Symbol first demodulator circuit and the same phase to said first modulated carrier < a second demodulation circuit that performs quadrature synchronous detection and outputs a second quantized signal; and an automatic interference that generates the third quantized signal by removing the second quantized signal from the first quantized signal. A cancellation circuit, a first control signal generation circuit that outputs a control signal of the automatic interference cancellation circuit based on the third quantization signal and the second quantization signal, and the first control signal generation circuit based on the third quantization signal. Generates a second control signal that outputs an offset control signal to the demodulation circuit In the automatic interference canceller having a circuit, the second quantized signal is input, and a threshold value and a frequency difference between the carrier frequency of the first modulated carrier and the carrier frequency of the second modulated carrier are compared. A frequency difference discriminating circuit, and selecting one of a control signal output from the first control signal generating circuit or a preset fixed signal based on a comparison result of the frequency difference discriminating circuit and providing the selected signal to the automatic interference canceling circuit An automatic interference elimination device comprising a switch.