JP2643803B2 - Microcomputer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a microcomputer, and more particularly to a microcomputer capable of emulating a plurality of target devices with one emulation chip.

[0002]

2. Description of the Related Art As a first prior art example, referring to FIG. 3 which shows an emulation configuration diagram of a conventional single-chip microcomputer, this single-chip microcomputer includes a CPU evaluation chip 2 and a peripheral emulation chip 1 (a peripheral emulation function product). ), A peripheral address signal 3, a peripheral data signal 4, and a peripheral write signal 5 are output to write data to a peripheral circuit at a desired address built in the peripheral emulation chip 1.

When the peripheral read signal 6 is output in place of the peripheral write signal 5, the data of the peripheral circuit at the desired address is transmitted from the peripheral emulation chip 1 to the peripheral emulation chip 1.
Read to the PU evaluation chip 2. As described above, emulation can be performed by controlling the peripheral emulation chip 1 by the CPU evaluation chip 2.

FIG. 4 is a block diagram in the case where a chip corresponding to the emulation chip 1 of FIG. 3 is implemented by a single-chip microcomputer 7 with a built-in PROM of this chip specification (functional specification equivalent to a mask ROM product). A method of configuring the emulation chip 1 with a single-chip microcomputer 7 with a built-in PROM has been conventionally performed.

Referring to FIG. 4, when operating as a normal single-chip microcomputer, the conventional single-chip microcomputer outputs a PROM address signal 13 from a CPU 9 to a PROM 8,
From the ROM 8, the P corresponding to the PROM address signal 13
The ROM data signal 14 is output to the CPU 9 and the CPU 9 outputs the internal write signal 23 and the internal peripheral read signal 2
4. Access to internal peripheral circuits (15, 16, 17) via peripheral address bus 25 and peripheral data bus 26.

When operating as a peripheral emulation chip, this single-chip microcomputer supplies an external emulation signal 10 to an emulation input terminal 11 and uses an internal emulation control signal 12 as a normal single-chip microcomputer of the PROM 8 and CPU 9 described above. Is stopped, and access to the peripheral circuits (15, 16, 17) is stopped. Each of the ports 18, 19 and 20 is controlled by the internal emulation control signal 12 so that the peripheral address signal 3, the peripheral data signal 4, the peripheral write signal 5, and the peripheral read signal 6 can be controlled by the internal emulation control signal 12. The peripheral address signal 3 becomes the internal peripheral address signal 21, the peripheral data signal 4 becomes the internal peripheral data signal 22, the peripheral write signal 5 becomes the internal peripheral write signal 23, and the peripheral read signal 6 becomes the internal peripheral read signal. 24, and has a configuration for operating peripheral circuits (15, 16, 17) via a peripheral address bus 25 and a peripheral data bus 26.

As described above, the single-chip microcomputer 7 enters the emulation mode in accordance with the external emulation signal 10, and the same signal as the contents of the peripheral address signal 3 is transmitted to the peripheral circuit (15, 16, 1).
7), and the peripheral circuit at the address corresponding to the peripheral address signal 3 is accessed.

Next, a second conventional example is disclosed in
An input / output control method disclosed in Japanese Patent No. 12859 will be described.

In the second conventional input / output control method, the data holding means holding the address information of the input / output device, and the coincidence detecting means detecting the coincidence between the data held by the data holding means and the address bus information are provided. When the coincidence detecting means detects address information corresponding to the input / output device, the CPU activates reference software and performs processing for the input / output device by this software processing.

That is, a method of reading an address output to the bus and rewriting and converting the address to an arbitrary address set in advance by software is described. As a device, a data storage function rewritable by software and a function of comparing data with data are described. Is used.

[0011]

However, the above-described single-chip microcomputer with a built-in PROM according to the first conventional example has the following problems when used as an emulation function product.

That is, in the case of the conventional example shown in FIG. 4, the addresses of the peripheral circuits (15, 16, 17) are fixed on the product as addresses (A, B, and C). It is valid only when the corresponding address signal is externally supplied, and the address B and the address C are the same as the address A.

Therefore, products that can be emulated using this chip are equipped with peripheral circuits (15, 16, 1).
7) is not more than one each and the addresses are limited to those assigned to the addresses (A, B and C). As a result, a single-chip microcomputer or a peripheral circuit incorporating a plurality of identical peripheral circuits such as a product having two peripheral circuits 15 mounted thereon (in this case, the addresses of the peripheral circuits 15 are different addresses such as address A and address D) (1
5, 16, 17) cannot emulate a single-chip microcomputer having the same peripheral circuit but a different address, such as a product assigned to addresses (D, E, and F), and emulation of these products. In order to perform this operation, a single-chip microcomputer with a built-in PROM equipped with two peripheral circuits 15 having an emulation function and a built-in PROM in which the addresses of the peripheral circuits (15, 16, 17) are assigned to addresses (D, E and F) A single-chip microcomputer must be developed. That P
Until the development of a single-chip microcomputer with a built-in ROM is completed, there is a problem in that software development is delayed because an emulation configuration cannot be made.

SUMMARY OF THE INVENTION An object of the present invention has been made in view of the above-mentioned problems, and an apparatus capable of emulating a plurality of target devices having various peripheral circuits with a small number of chips having an emulation function is described in the second conventional example. It can be provided without a special load circuit such as a contest addressable memory.

[0015]

A microcomputer according to the present invention comprises a central processing unit, a PROM, a plurality of peripheral circuits each assigned a unique address, and the PRO.
And a means for reading data stored in the M and supplying the data to the central processing unit on a single chip, wherein the central processing unit responds to an emulation mode signal supplied from outside the microcomputer. Operation and the central processing unit of the PROM
Operation of the peripheral circuit is stopped , and a signal for designating the address of the peripheral circuit input from outside the microcomputer.
Input from outside the microcomputer
Clock signal, data signal and data read / write control signal
Signals that specify the addresses of peripheral circuits
Operates the peripheral circuit as an address signal to be applied to the side circuit
Corresponding to the emulation mode signal
Then, a signal designating the address of the peripheral circuit is transmitted to the PRO.
First means for providing a valid signal for specifying the address of M;
Reads the PROM data corresponding to the
Second means for extracting the data and the address of the peripheral circuit
And a third means for providing an effective signal for designating the peripheral circuit.
Peripheral signal input from the outside as the
A valid signal or a PROM data
First selecting means for selecting whether or not is a valid signal is provided.
And is a configuration.

Further , before the microcomputer of the present invention,
The first selecting means includes an emulation mode signal.
May be controlled by the following .

Further, the microcomputer according to the present invention may further comprise an address signal to be supplied to said peripheral circuit.
Validates a signal that specifies a peripheral circuit input from outside
Or whether the PROM data is a valid signal
Different from the emulation mode signal
Second selection controlled by emulation mode signal
It is also possible to adopt a configuration provided with selection means .

[0018]

In the microcomputer according to the present invention, although the address of the built-in peripheral circuit is fixed, the data content written in the built-in PROM section is rewritten, so that the peripheral circuit input from outside the chip is rewritten. A desired peripheral circuit can be selectively operated irrespective of the contents of the address designating signal.

[0019]

The object of the present invention is to emulate a plurality of target devices individually having different peripheral addresses with a minimum number of emulation chips. Hereinafter, embodiments of the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a configuration of a microcomputer according to a first embodiment of the present invention.

Referring to FIG. 1, a microcomputer according to a first embodiment of the present invention outputs an internal peripheral address signal 21 output from a port 18 receiving a peripheral address signal 3 to P.
4 except that the switching circuit 27 is configured to transmit the PROM data signal 14a to the peripheral address bus 25 in accordance with the PROM data signal 14 output from the PROM 8 and the internal emulation control signal 12. The same components as those of the first prior art microcomputer shown in FIG. 1 are denoted by the same reference numerals.

Next, the operation of the microcomputer according to the first embodiment of the present invention will be described.

When the external emulation control signal 10 is input, the CPU 9 stops accessing the PROM 8 and peripheral circuits. As for the peripheral address signal 3, the internal peripheral address signal 21 is transmitted to the PROM 8 via the port 18. The PROM 8 has an internal emulation control signal 12
As a result, an address signal of the PROM 8
The signal 13 generated from 9 is a valid signal. In this case, the internal peripheral address signal 21 is selected as a valid signal.

From the PROM 8, the internal peripheral address signal 2
The data written at the address designated by 1 is read and becomes the PROM data signal 14. The PROM data signal 14 is output to the peripheral address bus 25 via the switching circuit 27 controlled by the internal emulation control signal 12, and functions as a valid signal 14a for specifying the address of the peripheral circuit (15, 16 and 17). Becomes the address designating signal 14a of the peripheral circuit.

As described above, even when the contents of the peripheral address signal 3 do not correspond to the contents of the addresses A, B and C (for example, addresses D, E and F), the PROM is used.
By writing the contents of the address A at the address D, the contents of the address B at the address E, and the contents of the address C at the address F as data to be written in advance to the PROM data signal 8, When the peripheral address signal 3 is the address D, the address content of the address A is output and the peripheral circuit 15 can be accessed. Similarly, when the peripheral address signal 3 is at the address E, the peripheral circuit 16 can be accessed, and when the peripheral address signal 3 is at the address F, the peripheral circuit 17 can be accessed.

As described above, a target device having any address can be emulated by a single emulation chip as long as the peripheral circuit has the same functional specification.

The target device is a peripheral circuit 15
In the case where two peripheral circuits corresponding to the above are mounted and each address is an address A and an address D, two emulation chips are used, and the address A is used as PROM data of one emulation chip. Is written at the address D as the PROM data of the other emulation chip, and the contents of the address A are written at the address D at the address D, so that when the contents of the peripheral address signal 3 are the address A, the peripheral of one emulation is written. When the circuit is accessed and the content of the peripheral address signal 3 is address D, the other peripheral circuit is accessed,
Emulation is possible with this emulation chip.

The path for transmitting the peripheral address signal 3 of the microcomputer of the first conventional example to the PROM 8 is P
A single-chip microcomputer with a built-in ROM can use a path for writing data to the PROM from outside the chip, which is usually provided by the single-chip microcomputer. The PROM data signal 14 is transferred to the peripheral address bus 25 via the switching circuit 27.
The path for outputting the data read from the PROM under the control of the CPU under the control of the CPU as in the transfer instruction to the normal peripheral circuit in the single-chip microcomputer directly to the peripheral address bus is used. be able to.

As described above, the peripheral address signal 3 is set to the PRO level in accordance with the external emulation control signal 12.
By controlling the transmission to the M8 and the output of the PROM data signal 14 to the peripheral address bus 25, a plurality of target devices can be emulated by one emulation chip without adding a special circuit and increasing the chip area. What you can do is possible.

Next, a microcomputer according to a second embodiment of the present invention will be described. Referring to FIG. 2, which is a block diagram of a microcomputer according to a second embodiment of the present invention, the microcomputer according to the second embodiment includes an external emulation control signal 29 and an external emulation control signal 29 as components of the microcomputer according to the first embodiment. An emulation input terminal 30 for inputting a signal, an internal emulation control signal 31, and an internal peripheral address signal 21 controlled by the internal emulation control signal 31 are switched between an address signal 21 a output from a peripheral address bus 25 and an address signal 21 b transmitted to the PROM 8. This is a configuration in which a switching circuit 28 is added.

Furthermore, the microcomputer of this embodiment, the configuration for controlling the switching circuit 2 7 inside the emulation control signal 31, and a configuration of inputting the internal emulation control signal 31 to the PROM 8, the other components The same components as those of the microcomputer of the first embodiment are denoted by the same reference numerals.

The operation of the microcomputer according to the second embodiment is exactly the same as the operation of the microcomputer according to the first embodiment, and a detailed description thereof will be omitted.

As described above, by adopting a configuration in which the emulation function is controlled by the external emulation signal 10 and the external emulation control signal 29, the case where the peripheral address signal 3 is connected to the peripheral address bus 25 as it is and the address conversion is not performed. It is possible to switch between the case where the connection is performed via the PROM 8 and the address conversion is performed.

[0033]

As described above, according to the present invention, in a single-chip microcomputer with a built-in PROM, an emulation control signal is switched between an address line for a PROM and an address line for a peripheral circuit, and the built-in PROM is used for address conversion. Thus, emulation of a plurality of target devices can be performed only by rewriting the data in the PROM, even though the addresses of the peripheral circuits incorporated in the emulation chip are fixed.

Therefore, the period for newly developing an emulation chip, the cost and the amount of money can be greatly reduced, and the software development environment can be provided to the user in a short time, so that the debugging period can be extended.

[Brief description of the drawings]

FIG. 1 is a block diagram of a microcomputer according to a first embodiment of the present invention.

FIG. 2 is a block diagram of a microcomputer according to a second embodiment of the present invention.

FIG. 3 is an emulation configuration diagram of a single-chip microcomputer.

FIG. 4 is a block diagram of a conventional single-chip microcomputer having an emulation function.

[Explanation of symbols]

 1 peripheral emulation chip 2 CPU evaluation chip 3 peripheral address signal 4 peripheral data signal 5 peripheral write signal 6 peripheral read signal 7 single chip microcomputer 8 PROM 9 CPU 10 external emulation control signal 11 emulation control signal 12 internal emulation control signal 13 PROM Address signal 14, 14a PROM data signal 15 Peripheral circuit (address A) 16 Peripheral circuit (address B) 17 Peripheral circuit (address C) 18, 19, 20 Port 21, 21a, 21b Internal peripheral address signal 22 Internal peripheral data signal 23 Internal peripheral write signal 24 Internal peripheral read signal 25 Peripheral address bus 26 Peripheral data bus 27, 28 switching circuit 29 External emulation control signal 30 Emulation Shon input terminal 31 internal emulation control signals

Claims (3)

(57) [Claims] A central processing unit; a PROM; a plurality of peripheral circuits each assigned a unique address;
Means for reading data stored in the ROM and supplying the read data to the central processing unit on a single chip, wherein the central processing unit responds to an emulation mode signal supplied from outside the microcomputer. Operation and the central processing unit of the PROM
Operation of the peripheral circuit is stopped , and a signal designating the address of the peripheral circuit inputted from outside the microcomputer and a signal inputted from outside the microcomputer are inputted.
Clock signal, the signal that specifies the address of the peripheral circuits by the respective data signal and a data read-write control signal
To the peripheral circuit as an address signal for giving
Means for operating, and the emulation mode signal
Correspondingly, a signal designating the address of the peripheral circuit
A first means for providing a valid signal for designating a ROM address;
PROM data corresponding to a valid signal for specifying an address
Second means for reading out the data from the peripheral circuit.
In <br/> microcomputer provided with the third means for an effective signal specifying the address, given to the peripheral circuit
Peripheral circuit input from outside as the address signal
Valid signal or specify the data of the PROM.
First selection means for selecting whether the data is a valid signal
A microcomputer characterized by being provided . 2. The emulator according to claim 1, wherein
2. The microcomputer according to claim 1, wherein the microcomputer is controlled by an operation mode signal . 3. An address signal applied to the peripheral circuit.
A signal designating the peripheral circuit input from the outside.
A valid signal, or the PROM data as a valid signal
Emulation mode signal for selecting whether to
Controlled by another emulation mode signal
3. The microcomputer according to claim 1 , further comprising a second selection unit .