JP2634055B2 - Focus position detection device - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an in-focus position detecting device capable of performing automatic focusing with high accuracy and in real time.

(Prior Art) Conventionally, an image of an object to be focused as an object to be focused is formed on a CCD line sensor and an image sensor by an image signal generating optical system, and an image formed on the CCD line sensor and the image sensor is formed. A focus position detection device that electrically processes an image signal as an image signal based on an image of an object, detects a position where the contrast of the image is maximum, and performs focusing, and an image of a test object using a split image. Are formed on the CCD line sensor and the image sensor, and the image signals based on the images of the two test objects formed on the CCD line sensor and the image sensor are electrically processed and the test is performed. 2. Description of the Related Art There is a focus position detection device that detects a coincidence position of an object without image shift and performs focusing.

However, in the above-described focusing position detecting device that detects and focuses on the position where the contrast of the image becomes maximum, the saturation of the image signal taken out from the CCD line sensor and the imaging tube is prevented. AGC circuit for processing, a processing circuit for thinning out horizontal scanning lines, a counter circuit for measuring a rise time from a predetermined level to a maximum level of a detection signal for detecting whether or not focus is achieved, etc. And the circuit configuration becomes considerably complicated.

On the other hand, using the split image,
In a focus position detecting device that forms a plurality of images and focuses on the basis of a shift of the image, there are two or more CCD line sensors and two or more image pickup tubes, and two or more circuit systems for taking out the image signal. Since an electrical processing circuit for determination is required, the circuit configuration is further complicated.

In particular, in an automatic focus position detection device used for an industrial microscope, a predetermined work (for example, when the inspection target is a gap of a video head, the work is a video head), the focus is large, and the tact time is large. In order to reduce the time, real-time processing is required and a device with high focusing accuracy is required. However, there is an inconvenience in performing any of the above-described focus position detection devices in real-time processing.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a focus position detecting device capable of responding to a demand for real-time processing while simplifying an electric processing circuit.

Configuration of the Invention (Means for Solving the Problems) The focus position detecting apparatus according to the present invention is characterized in that an image signal generating optical system for obtaining an image of a test object and generating an image signal, and the image signal A focus position detection circuit that detects whether or not the image signal generation optical system is at a focus position and outputs a focus position determination signal, wherein the focus position detection circuit includes: A comparator for comparing the image signal with two reference levels, that is, a first reference level and a second reference level lower than the first reference level; a clock oscillator for generating a clock pulse having a predetermined period; and two outputs of the comparator. A transition detection unit for detecting a transition in synchronization with a clock pulse of the clock oscillator, a fall detection unit for detecting a fall of an output of the transition detection unit of a signal compared at a second reference level, detection And a logical circuit for calculating the logical sum of the logical sum output and the fall detection unit, and where a focus position determination signal is formed based on the output of the logical circuit. Preferably, the comparator includes a first comparator that compares the image signal with a first reference level, and a second comparator that compares the image signal with a second reference level.
A first transition detection unit that detects a transition between a low level and a high level of an output of the first comparator in synchronization with the clock pulse; and a low level of an output of the second gomperator. A second transition detection unit that detects a transition between the first transition detection unit and the second transition detection unit in synchronization with the clock pulse while shifting the transition from the first transition detection unit, and the logic circuit unit includes the first transition detection unit. An OR circuit that outputs an output based on a logical sum of an output of the second transition detection unit and an output of the second transition detection unit, and an AND circuit that outputs an output based on a logical product of an output of the OR circuit and an output of the falling detection unit. ing.

(Example) Hereinafter, an example of a focus position detecting device according to the present invention will be described with reference to the drawings.

FIG. 1 is a schematic diagram showing the overall configuration of a focus position detecting apparatus according to the present invention. In this figure, reference numeral 1 denotes a material of a test object as a focus target object, and 2 denotes an image of the sample 1 thereof. An image signal generating optical system for generating an image signal as an obtained image signal;
Is a line sensor. The image signal generating optical system 2 is provided with a piezo element 5 that constitutes a part of a driving means in the lens barrel 4. The image signal generating optical system 2 moves away from the sample 1 by expanding and contracting the piezo element 5. The object 1 is brought into close proximity to perform automatic focusing on the sample 1. Reference numeral 7 denotes an objective lens attached to the lens barrel 4 of the image signal generating optical system 2.
Reference numeral 8 denotes an imaging lens attached to the lens barrel 4 of the image signal generating optical system 2.

The sample 1 is, for example, a video head. Here, automatic focusing at the time of measuring the gap width of the video head will be described. FIG. 2 schematically shows a gap portion of the sample 1, wherein 9 is a core portion, 10 is a gap portion, and the core portion 9 has a sintered magnetic material (ferrite).
Is used, and since a metal material is used for the gap portion 10, the core portion 9 looks black and the gap portion 10 looks white, and the difference in contrast is large. In FIG. 2, arrows indicate the scanning direction of the line sensor 3.

The line sensor 3 is arranged in the longitudinal direction of the gap 10, and a part of an image corresponding to the gap portion of the sample 1 is formed. The line sensor 3 includes a line sensor driving circuit 11
, And the accumulated charges accumulated in the line sensor 3 are sequentially transferred by the line sensor drive circuit 11 to the focus position detection circuit 12 as image signals. When the image signal generating optical system 2 is in focus with respect to the sample 1, the image of the gap portion of the sample 1 is clearly formed by the line sensor 3.
As shown in FIG. 3, the image signal taken out by a series of transfer charges becomes a rectangular wave-like detection signal Q that rises and falls quickly, and the image signal generating optical system 2 When the camera is out of focus,
Since the image of the gap portion of the sample 1 is blurred and formed on the line sensor 3, the image signal taken out by a series of transfer charges is detected as a ridge having a slow rise and fall as schematically shown in FIG. It becomes signal Q '.

As shown in FIG. 5, the in-focus position detecting circuit 12 includes a clock oscillator 13, a frequency dividing circuit 14, a selecting circuit 15, and an inverter circuit 1.
6, which has a filter circuit 17. The clock oscillator 13, the frequency divider 14, the selector 15, and the inverter 16 will be described later.

The detection signals Q and Q 'are actually binarized binarized signals as shown in FIGS. 6 and 7.
Q 'is input to the filter circuit 17. This detection signal Q,
The envelope of Q 'is detected by the filter circuit 17 and becomes analog detection signals A and A'. The analog detection signals A and A 'are input to comparators 18 and 19. The comparator 18 has a first reference level B by a reference level generator 21.
Is applied to the comparator 19 by the reference level generator 22. The first reference level B is set higher than the second reference level B ', and the first reference level B is set lower than the peak of the detection signal Q at the time of focusing.

The comparator 18 compares the analog detection signals A and A 'with the first reference level B, and outputs the outputs C and
C ′ becomes high when the levels of the analog detection signals A and A ′ are higher than the first reference level B, and the first reference level B
When the level of the analog detection signals A and A 'is lower than the first reference level B,
During this period, the high level signal is output to one terminal of the AND circuit 23. Comparator 19
Compares the analog detection signals A, A 'with the second reference level B', and the output of the comparator 19 becomes high when the level of the analog detection signals A, A 'is higher than the second reference level B'. , When the level is lower than the second reference level B ', the comparator 19 outputs the high level during the period when the levels of the analog detection signals A and A' are higher than the second reference level B '. The signal is output to the other terminal of the AND circuit 23 and the falling detection circuit 24.

The AND circuit 23 functions as a part of the first transition detector and the second transition detector, and outputs the output F when the outputs of the comparators 18 and 19 are both high. An output F of the AND circuit 23 is a flip-flop circuit as a first transition detecting section.
25, which is input to a D terminal of a flip-flop circuit 26 as a second transition detection unit. A selection clock pulse G from the selection circuit 15 is input to a clock terminal CLK of the flip-flop 25, and an inverted selection clock pulse G ′ inverted by the inverter circuit 16 is input to a clock terminal CLK of the flip-flop 26. Has been entered. Note that the selection circuit 15 receives the clock pulse of the clock oscillator 13 via the frequency division circuit 14, and the selection circuit 15 is selected and designated from the clock pulses of each cycle divided by the frequency division circuit 14. It has a function of transmitting clock pulses of a period, and by appropriately selecting the periods of the selected clock pulse G and the inverted clock pulse G ', the focus position accuracy can be appropriately changed as described later.

When the selected clock pulse G falls while the output F of the AND circuit 23 is high, the flip-flop 25 changes the output H of the Q terminal from low to high in synchronization with the selected clock pulse G, and outputs the output of the AND circuit 23. When F changes from high to low, the output F of the Q terminal changes from high to low in synchronization with the fall of the selected clock pulse G. During the period when the output H is at the high level, the selected clock pulse G immediately after the output F of the AND circuit 23 becomes low from the falling of the selected clock pulse G immediately after the output F of the AND circuit 23 becomes high. Is determined by the pulse width until the falling edge of.

When the inverted selection clock pulse G 'falls while the output F of the AND circuit 23 is high, the flip-flop 26 changes the output H' of the Q terminal from low to high in synchronization with the inverted selection clock pulse G ', Output F of AND circuit 23
Changes from high to low, the output H 'of the Q terminal changes from high to low in synchronization with the fall of the inverted selection clock pulse G'. During the period when the output H 'is at the high level, the inversion immediately after the output F of the AND circuit 23 becomes low from the falling of the inverted selection clock pulse G' immediately after the output F of the AND circuit 23 becomes high. It is determined by the pulse width until the falling of the selected clock pulse G '.

The outputs H and H 'are input to an OR circuit 27, and the OR circuit 27 outputs an OR output I to one terminal of an AND circuit 28. The output J of the fall detection circuit 24 is input to the other terminal of the AND circuit 28. This output J is
The AND circuit 28 outputs an output K to the rising detection circuit 29 when both the output H and the output J are high. A control timing signal ▼ is input to the rise detection circuit 29 via the microcomputer 30. The rising detection circuit 29 outputs a judgment signal L to the microcomputer 30 and the sample and hold circuit 31 when a condition described later is satisfied.

The microcomputer 30 controls the piezo element 5 from the most contracted state to the most extended state by controlling signals Z,
It has a function of outputting a control signal Z ′ for extending the piezo element 5 to the piezo element driver circuit 32 so that the image signal generation optical system 2 is positioned in a focused state. Piezo element 5
Is gradually expanded from the most contracted state to the most extended state, the image signal generating optical system 2 approaches the sample 1 in a stepwise manner, and the image signal generating optical system 2 shifts from the unfocused state to the focused state. Then, the state again shifts to the out-of-focus state.

When the image signal generation optical system 2 approaches the in-focus state from the out-of-focus state, the shape of the analog detection signal A 'at the time of out-of-focus approaches the shape of the analog detection signal A at the time of focusing, and the analog detection signal A' Since the change near the peak is large, the output C 'of the comparator 18 at the time of out-of-focus approaches the output C at the time of in-focus, but the output D' of the comparator 19 at the time of out-of-focus The output D hardly changes because the change in the analog detection signal A 'is relatively small in a portion near the tail thereof. Therefore, the outputs C and C 'of the comparator 18 are
Output D, D '. The width of the output F of the AND circuit 23 during the high period is short due to the output C 'of the comparator 18 when out of focus, but becomes longer as the focus approaches. Accordingly, the width of the period during which the output H 'of the flip-flops 25 and 26 is at the high level also becomes longer as the focusing time approaches. Therefore, as the output I 'of the OR circuit 27 at the time of out-of-focus becomes closer to the output I at the time of focusing, the width of the high-level period of the output I' becomes longer and the falling of the output I 'becomes the selected clock pulse. G
Is delayed based on However, since the output J of the fall detection circuit 29 hardly changes between in-focus and out-of-focus, it is output at almost the same time between in-focus and out-of-focus, and therefore approaches the in-focus state. Accordingly, the period in which the output I 'of the OR circuit 27 and the output J of the falling detection circuit 24 are both high overlaps, the output K of the AND circuit 28 becomes high level, and the output of the rising detection circuit 29 becomes high. Changes from low to high, and the focus position determination signal L is output. The rise detection circuit 29 outputs the control timing signal ▲
The operation is performed in synchronization with the stepwise extension of the piezo element 5 at ▼.

When the determination signal L changes from low to high, the sample-and-hold circuit 31 samples the piezo position signal M input via the microcomputer 30, and uses the piezo position signal M as a focus position signal M '. The microcomputer 30 temporarily stores the control signal Z 'toward the piezo element driver circuit 32 based on the focus position signal M' stored in the memory. As a result, the piezo element 5 is extended so that the image signal generating optical system 2 is in a focused state. When the focusing is completed and the measurement of the gap width of the sample 1 is completed, the microcomputer 30 returns all the focused position detecting circuits 12, the piezo element driving circuits 32, and the line sensor driving circuits 11 to the initial state.

When the period of the selected clock pulse G is changed, the width of the period during which the output I 'of the OR circuit 27 is high becomes longer, and the focusing accuracy is changed.

Although the embodiment has been described above, the present invention is not limited to this, but includes the following.

In the embodiment, the in-focus position is detected based on the falling edge of the analog detection signal A '. However, the in-focus position is detected based on the rising edge of the analog detection signal A. The focus position may be detected based on the rising edge and the falling edge of the analog detection signal A '.

In the embodiment, the image signal is obtained by using the line sensor 3. However, the image signal may be obtained by using one line or several lines of the area sensor.

Instead of using the scanning line sensor 3, a single light receiving element may be used to mechanically scan an optical image and detect a focus position by using the light receiving output as an image signal.

Effect of the Invention The focus position detecting device according to the present invention is configured as described above, and thus has an effect that it can respond to the demand for real-time processing while simplifying the electrical processing circuit.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a schematic configuration of a focus position detection device according to the present invention. FIG. 2 is a schematic diagram showing an example of a focus target of the focus position detection device according to the present invention. FIG. 4 is a schematic diagram of an image signal obtained by the image generation optical system of the focus position detection device according to the present invention, FIG. 5 is a detailed circuit diagram of the focus position detection circuit shown in FIG. 1, FIG. FIG. 7 is a signal timing chart for explaining the operation of the focus position detecting device according to the present invention, and FIG. 6 is a timing chart for explaining output waveforms of the respective circuits at the time of focusing. The figure is a timing chart for explaining the output waveform of each circuit when out of focus. DESCRIPTION OF SYMBOLS 1 ... Sample (test object), 2 ... Image generation optical system 3 ... Line sensor, 5 ... Piezo element 12 ... Focusing position detection circuit, 13 ... Clock oscillator 18 ... First comparator, 19 ... Second comparator 24... Fall detection circuit 25... Flip-flop (first transition detection unit) 26... Flip-flop (second transition detection unit) 27. means)

Claims (2)

(57) [Claims] 1. An image signal generating optical system for obtaining an image of a test object and generating an image signal, and whether or not the image signal is input and the image signal generating optical system is at a focus position And a focus position detection circuit that outputs a focus position determination signal. The focus position detection circuit converts the image signal into a first reference level and a second reference level lower than the first reference level. A comparator that compares at a reference level, a clock oscillator that generates a clock pulse of a predetermined cycle, a transition detection unit that detects a transition of two outputs of the comparator in synchronization with the clock pulse of the clock oscillator, and A fall detector for detecting a fall of the output of the transition detector of the signal compared at the second reference level; a logical sum of two outputs of the transition detector; Fall detection A focus position detection device comprising a logic circuit that performs a logical product of the sections, and a focus position determination signal is formed based on an output of the logic circuit. 2. The method according to claim 1, wherein the comparator is configured to output the image signal to a first signal.
A first comparator for comparing with a reference level; and a second comparator for comparing with a second reference level, wherein the transition detection unit performs transition between a low level and a high level of the output of the first comparator. A first transition detection unit that detects the clock pulse in synchronization with the clock pulse, and the clock pulse while shifting the transition between the low level and the high level of the output of the second comparator from the transition of the first transition detection unit. An OR circuit configured to output based on a logical sum of an output of the first transition detection unit and an output of the second transition detection unit; 2. The focus position detecting device according to claim 1, further comprising an AND circuit that outputs an output based on a logical product of an output of the OR circuit and an output of the falling detector.