JP2632300B2 - Receiving machine - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an on-vehicle FM receiver capable of muting the output in response to the presence or absence of a received signal.

[0002]

2. Description of the Related Art An FM receiver has a circuit for muting the output when no signal is received because a large noise is generated when there is no signal. Generally, a communication apparatus is provided with a circuit called a squelch circuit. This squelch circuit is required to promptly control the output depending on the presence or absence of a received signal, but in the case of a vehicle, multipath fading occurs at a period inversely proportional to the vehicle speed and the frequency of the received radio wave, and the received frequency is reduced. The reception output is intermittent at the fading period that occurs due to a large change, and the quality of the received signal may be significantly reduced, making it difficult to hear.

FIG. 3 shows a state of multipath fading. The position of the car is taken in the X direction, and the received electric field strength is shown in the Y direction. In this phenomenon, a direct wave from the transmitting station and a ground reflected wave and the like are mixed to cause radio wave interference, and a place where the wave is multiplied and increased and a place where the electric field strength is canceled out appear alternately. Therefore, multipath fading occurs due to the traveling of the vehicle.

A squelch operation is performed to cope with multipath fading, but when a received signal is lost to compensate for a decrease in sound quality due to intermittent output sound, muting is performed after a fixed delay time longer than the multipath fading period. A method of controlling a circuit is generally performed. In this case, a phenomenon called a squelch tail occurs in which a large noise is output until a delay time until the mute circuit operates after the signal disappears. It is desirable that the squelch tail noise has a short duration.

However, when the vehicle speed is constant, the multipath fading period is inversely proportional to the reception frequency. Therefore, the delay time effective for reducing the output discontinuity is inversely proportional to the reception frequency, and is long when the reception frequency is low. Due to the need for a delay time, the duration of the squelch tail also increases.

[0006]

According to the prior art in which the delay time is set independently of the reception frequency as described above,
The squelch tail is too long when the frequency is high in the delay time corresponding to the multi-path fading of the low frequency due to the height of the frequency, and the reception output is frequently intermittent at the low frequency in the delay time corresponding to the high frequency multi-path fading. It becomes hard to hear. An object of the present invention is to provide a receiver which solves the problems of the prior art and minimizes the squelch tail time in a wide reception range and can prevent intermittent output due to multipath fading.

[0007]

According to the present invention, a receiver having a mute circuit includes a receiving frequency setting means for setting a predetermined receiving frequency and a delay for setting a delay time corresponding to the set receiving frequency. An arithmetic processing unit configured to control and set by providing time setting means is provided, and the presence or absence of a reception signal of a frequency set by the arithmetic processing unit is detected,
The configuration is such that the mute circuit is controlled based on a set delay time when no signal is detected.

[0008]

According to the present invention, there is provided an arithmetic processing section, in which the receiving frequency setting means for setting the receiver to a predetermined frequency and a delay time corresponding to the set receiving frequency are set. Since the receiver is provided with a circuit configured to control and set by providing delay time setting means, the presence or absence of the set received signal is detected, and if there is no signal, the receiver is set in accordance with the received frequency. Since the mute circuit is controlled with a delay of the delay time, intermittent output due to a multipath fading cycle set within a wide frequency range can be prevented with a minimum squelch tail time.

[0009]

FIG. 1 is a block diagram showing the configuration of a receiver according to an embodiment of the present invention. In the figure, 1 is a high-frequency amplifier 1
a, mixer 1b, intermediate frequency amplifier 1c, and demodulator 1d
2 is a mute circuit, 3 is a local oscillator, 4 is a received signal detection circuit, 5 is an arithmetic processing unit, 6 is a reception frequency setting unit, 7 is a delay time setting unit, 8 is an operation unit,
9 is an antenna, 10 is a low frequency amplifier, and 11 is a speaker.

The reception frequency is input from a dial encoder or an up / down switch from the operation unit 8 and frequency data is set by the reception frequency setting means 6. This data is input to the local oscillator 3, and the reception frequency is determined.
This local oscillator 3 usually has a PLL (phase locked
Loop) circuit is used. On the other hand, reception frequency setting means 6
Is processed by the delay time setting means 7 to set a delay time for that frequency. When the setting of these two means is completed, the reception operation state is set, and the reception signal detection circuit 4 detects the presence or absence of the reception signal output from the reception unit 1. The signal output indicating the presence or absence of the detection of the received signal is input to the arithmetic processing unit 5. When the reception signal is no longer detected, the delay operation set by the delay time setting means 7 starts. When the delay time has elapsed, the mute circuit 2 is controlled to turn off the output of the speaker 11. Conversely, when a received signal is detected, the mute circuit 2 immediately stops operating, and the audible signal from the receiving unit 1 is output to the speaker 11.

The arithmetic processing unit 5 includes a reception frequency setting means 6
And delay time setting means 7. Here, assuming that the IF frequency is 21.6 MHz and the reception frequency is 150 MHz, a reception frequency of 150 MHz is set by the reception frequency setting means 6 and the local oscillator 3 receives the reception frequency of 150 MHz.
The frequency 171.6 of the sum of z and the IF frequency of 21.6 MHz
The data is output from the arithmetic processing unit 5 and controlled so as to oscillate the frequency of 128.4 MHz.

The received signal of 150 MHz captured by the antenna 9 is input to the receiving unit 1 and the high-frequency amplifier 1 in the receiving unit 1
After being amplified by a, it is input to the mixer 1b. Mixer 1b
, A local signal of 171.6 MHz or 128.4 MHz oscillated by the local oscillator 3 is added to an IF signal having a difference frequency of 21.6 MHz by a frequency conversion operation.
This IF signal passes through the intermediate frequency amplifier 1c in the receiving unit 1, and is converted into an audible signal by the demodulator 1d in the receiving unit 1. At this time, the reception signal detection circuit 4 detects the presence of the reception signal and inputs it to the arithmetic processing unit 5, and the arithmetic processing unit 5 deactivates the mute circuit 2, so that the audible signal obtained by the reception unit 1 is 11 is driven.

When the received signal of 150 MHz disappears from the antenna 9, the input to the mixer 1 b of the receiving unit 1 becomes only the signal of 171.6 MHz or 128.4 MHz from the local oscillator 3, no IF signal is generated, and the demodulated output is FM-specific. Output loud noise. At this time, the reception signal detection circuit 4 detects no signal. By detecting the absence of a signal, the mute circuit 2 is controlled after the elapse of the delay time set by the delay time setting means 7 corresponding to the reception frequency set by the reception frequency setting means 6 of the arithmetic processing unit 5, in this case, 150 MHz. The noise output to the speaker 11 is turned off. Until this delay time elapses, a squelch tail phenomenon in which a large noise is output to the speaker 11 occurs.

Here, a receiving frequency of 150 MHz and a vehicle speed of 6
At 0 km / h, the multipath fading frequency is about 8 Hz and the period is about 120 ms. Therefore, if a shorter delay time is set, the output is intermittent due to multipath fading, making it difficult to hear. However, if a delay time longer than 120 ms is set, intermittent output due to multipath fading can be prevented.
In, the delay time setting of 120 ms is effective. However, a squelch tail phenomenon occurs in which a large noise is output from the speaker 11 for about 120 ms until the delay time elapses.

The above operation will be described with reference to the flowchart of FIG. First sets the reception frequency in the processing S _1. Set by calculation delay time in the process S ₂ on the basis of the frequency setting. When the reception state is entered and the signal detected and received from the reception signal detection circuit 4 is input to the arithmetic processing unit 5, the mute circuit 2 is turned off and the speaker 11 outputs sound. Determining determines whether the received signal at box H _2, and then re-execute the decision box H ₂ If there received signal, no received signal to start the delay time measured in the process S ₄ is detected. The delay time set in box H ₃ determines whether the measured ended, during measurement of the decision box H ₃ determines whether the received signal is re-entered in box H _4, decision box if the received signal is input run back to H _2, again executes the decision box H ₃ if the received signal is continued input. A muting circuit 2 to turn on the determined at decision box H ₃ of the delay time measurement end and as the reception state has been completed to cross the audio output.

Next, when the receiver receives 450 MHz, the receiving frequency setting means 6 of the arithmetic processing unit 5 sets the receiving frequency of 450 MHz and the local oscillator 3 sets the receiving frequency in the same manner as when receiving 150 MHz. 450MHz
And the IF frequency 21.6MHz, the sum frequency 471.6M
It is controlled by the data output from the arithmetic processing unit 5 so as to oscillate at a frequency of 428.4 MHz or Hz. The received signal of 450 MHz captured by the antenna 9 is input to the receiving unit 1, amplified by the high-frequency amplifier 1a in the receiving unit 1, and then input to the mixer 1b. To the mixer 1b, a local signal of 471.6 MHz or 428.4 MHz from the local oscillator 3 is added, and the frequency of the difference 2
It becomes a 1.6 MHz IF signal. This IF signal passes through the intermediate frequency amplifier 1c in the receiving unit 1 and becomes an audible signal by the demodulator 1d in the receiving unit 1. At this time, the received signal detection circuit 4 detects the presence of the received signal and inputs it to the arithmetic processing unit 5, and the arithmetic processing unit 5 puts the mute circuit 2 in a non-operating state. The speaker 11 is driven.

When the reception signal of 450 MHz is lost from the antenna 9, the input to the mixer 1 b is
Only a local signal of 71.6 MHz or 428.4 MHZ is generated, no IF signal is generated, and a demodulated output outputs a large noise peculiar to FM. At this time, the reception signal detection circuit 4 detects the absence of a signal. By detecting no signal, the arithmetic processing unit 5
In this case, the reception frequency set by the reception frequency setting means 6 is such that the delay time corresponding to 450 MHz in this case, after the delay time set by the delay time setting means 7 elapses, the mute circuit 2 is controlled to generate noise to the speaker 11. Turn off the output.
Until this delay time elapses, a squelch tail phenomenon in which a large noise is output to the speaker 11 occurs.

A receiving frequency of 450 MHz and a vehicle speed of 60 km /
Since the multipath fading frequency at h is about 25 Hz and the cycle is about 40 ms, the intermittent output due to multipath fading can be prevented by providing a delay time of 40 ms corresponding to the reception frequency of 450 MHz. The squelch tail time when the noise at the time is output from the speaker 11 is also 40 ms, and the reception frequency is
The squelch tail time is one third of the set delay time of 120 ms in Hz. Therefore, the delay time is set to M
It is not necessary to set for each fine frequency such as Hz unit. For example, setting the delay time in units of 10 MHz,
50MHz band, 144MHz band, 430M for each frequency band
The delay time may be set by classifying into a Hz band, a 1200 MHz band, or the like. Further, when the multi-path fading is changed due to the running terrain or the like, the setting of the delay time may be temporarily changed from the keyboard of the operation unit 8.

In the conventional example, since the delay time cannot be set in accordance with the reception frequency, when the delay time is set to 120 ms, the intermittent output due to multipath fading can be prevented when the reception frequency is 450 MHz, but the squelch is more than necessary. When a tail phenomenon occurs and a delay time of 40 ms is set, the squelch tail phenomenon at a reception frequency of 150 MHz can be shortened, but output discontinuity due to multipath fading cannot be prevented.

[0020]

According to the present invention, an arithmetic processing unit is provided, and the arithmetic processing unit sets a receiving frequency setting function for setting a receiver to a predetermined receiving frequency and a delay time corresponding to the set frequency. It is a receiver that controls and sets the delay time setting function, and controls the mute circuit with the delay time set according to the reception frequency in response to the presence or absence of the reception signal, so that it can be set within a wide frequency range. The intermittent output due to the multipath fading cycle of the received frequency can be prevented with a minimum squelch tail time. Also,
Recent receivers generally include an arithmetic processing unit,
The cost of implementing the present invention is minimal, and the field of industrial application is large.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of a receiver according to an embodiment of the present invention.

FIG. 2 is a flowchart showing the operation of the receiver of the present invention.

FIG. 3 is a diagram for explaining multipath fading.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Receiving part 1a High frequency amplifier 1b Mixer 1c Intermediate frequency amplifier 1d Demodulator 2 Mute circuit 3 Local oscillator 4 Received signal detection circuit 5 Arithmetic processing part 6 Receiving frequency setting means 7 Delay time setting means 8 Operation part 9 Antenna 10 Low frequency amplifier 11 Speaker

Claims (1)

(57) [Claims] 1. A receiver having a mute circuit controlled in accordance with the presence or absence of a received signal, comprising: a reception frequency setting means for setting the receiver to a predetermined reception frequency; A delay time setting means for setting a corresponding delay time is provided, and an arithmetic processing unit configured to perform control setting is provided, and the presence or absence of a received signal set by the arithmetic processing unit is detected, and when no signal is detected, A receiver for controlling the mute circuit based on a set delay time.