JP2620067B2 - Power supply - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a power supply device, particularly to a control method in a flyback power supply device.

(Prior art)

Conventionally, in this type of high-voltage generation circuit using a flyback method, it is well known that a flyback voltage is generated at a resonance cycle determined by a flyback transformer (horizontal deflection output transformer) and its peripheral components. . Therefore, in order to operate the circuit efficiently, it is necessary to determine the resonance period T, determine the off-time T OFF of the semiconductor switching element based on the resonance period T based on the following relationship, and design the circuit.

T / 2 ≦ T OFF <T However, even if the above-described design is performed, the resonance period T fluctuates due to, for example, variations in ambient temperature and load, and variations in characteristics such as the inductance of the flyback transformer. Then, during the ON period of T OFF <T / 2, as shown in FIG. 1 (collector voltage waveform diagram a and collector current waveform diagram b of the switching (device) transistor), the switching device is turned on at the wave width portion of the resonance waveform. When the timing is given (dotted line) or during the OFF period of T OFF> T, the waveform width of the second waveform diagram occurs as shown in FIG. 2 (collector voltage waveform diagram and collector current waveform diagram b of the switching transistor). (Dotted line).

In such a case, if the waveform is passed as it is (turned on), the generated voltage is an extremely low impedance source, which results in serious damage to the switching transistor.

〔Purpose〕

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems of the conventional example, and eliminates disadvantages such as damage to semiconductor switching elements, and allows designers to be restricted by variations and types of characteristics of flyback transformers. It is an object of the present invention to provide a power supply circuit which can be designed without any circuit and can standardize this kind of circuit which has been extremely difficult in the past.

More specifically, detection means (for detecting the low potential point of the flyback voltage waveform in the off period of the semiconductor switching element (corresponding to the transistor 2 in the embodiment) connected to the primary winding side of the flyback transformer) Control means for turning on the semiconductor switching element according to a detection signal of the detection means (corresponding to the flip-flop 20 and the timer A7 in the embodiment);
And if the detection means could not detect at the low potential point,
Means for forcibly turning on the semiconductor switching element in synchronization with the previous switching of the semiconductor switching element (corresponding to the timer B11 and the OR gate 12 in the embodiment). The purpose is.

〔Example〕

Hereinafter, the present invention will be described based on examples. FIG. 3 is a block diagram of a circuit according to an embodiment of the present invention. 1
Is a flyback transformer, 2 is a switching transistor connected to the primary winding side of the flyback transformer 1, and 3 is a resonance capacitor connected to the primary winding side of the flyback transformer 1 and determines a resonance frequency. 4 is a damper diode connected to the collector side of the switching transistor, 5 is an output current set value, and 6 is an error amplifier that compares and amplifies the set value input with the output detected value by the output current detection resistor 8. , 7 are timer circuits A, 9 for generating an on-time corresponding to the error output signal level.
Is a low-potential (zero-level) detection circuit connected to the switching transistor 2 for detecting zero-cross timing of the flyback voltage waveform, and 10 is set in response to the low-potential detection signal (S), and a timer circuit is set. This is an (R) flip-flop circuit set by the output of A7. Reference numeral 12 denotes an OR gate circuit, reference numeral 13 denotes an amplifier circuit, reference numeral 14 denotes a drive power supply, and reference numeral 15 denotes an output terminal of the power supply circuit.

Next, the operation of the circuit of this embodiment will be described. FIG. 4 shows an operation waveform diagram of each part. When a voltage is supplied from the drive power supply 14,
Since the initial output current detection value is zero (FIG. 4g),
The error output level from the set value 5 becomes the maximum. Therefore, the maximum on-time width of the timer A7 is transmitted (FIG. 4b), the switching transistor 2 is turned on via the amplifier circuit 13, and is turned off after a certain time. At this time, respective waveform diagrams of the collector voltage / current of the switching transistor 2 are shown in FIGS.

The collector voltage waveform e after the switching transistor 2 is turned off starts oscillating at a natural period determined by the primary-side equivalent inductance of the flyback transformer 1 and the resonance capacitor 3, and passes the point A in FIG. Then, the zero level is detected (FIG. 4c), and the flip-flop circuit 10 is set. Here, the output d of the flip-flop circuit 10 and the output a of the timer B11 are the trigger input of the timer A7 via the OR gate 12, but the timer B11
Is configured such that when the power supply voltage rises, or when the zero level of the waveform is not detected due to a load abnormality or the like, the timer is out and the timer A7 is triggered.

Therefore, the input d of the flip-flop circuit 10
Triggers the timer A7 and sends an on-time pulse corresponding to the error signal. The output of timer A7 is
1 trigger and flip-flop 10 reset signal (R)
Therefore, the flip-flop circuit 10 is initialized immediately after the activation of the timer A7.

By the above series of repetitive operations, the output current follows quickly to reach the set value 5. Further, since the switching transistor 2 is turned on at the node of the flyback waveform, the optimum point is automatically reached by the flyback transformer 1 and the resonance capacitor 3.

In the above embodiment, the converter output current is controlled. However, the same effect can be obtained by detecting the voltage instead of the current and controlling the output voltage.

〔effect〕

As described above, according to the present invention, the low potential point of the flyback voltage waveform during the off period of the semiconductor switching element in the flyback power supply device is detected,
Since the switching element is turned on by the detection signal, the circuit can be standardized without being restricted by ambient temperature, load fluctuation, variation in characteristics of the flyback transformer, and the switching element can be damaged. This makes it possible to supply a highly reliable power supply that is not likely to be generated.

Further, when the low-potential detecting means cannot detect the low-potential, means for forcibly turning on the semiconductor switching element in synchronization with the previous switching of the semiconductor switching element is provided. Even when the potential does not drop to a low potential, the stable output operation of the transformer is accurately compensated, which is extremely effective.

[Brief description of the drawings]

1 and 2 are each a waveform diagram of the collector voltage / current of the switching element of the conventional circuit, FIG. 3 is a block diagram of a circuit according to an embodiment of the present invention, and FIG. It is an operation waveform diagram. DESCRIPTION OF SYMBOLS 1 ... Flyback transformer 2 ... Semiconductor switching element (transistor) 3 ... Resonant capacitor 5 ... Output current setting value 9 ... Low potential (zero level) detection circuit 15 ... Output terminal

Claims (1)

(57) [Claims] In a voltage resonance type power supply, low potential detecting means for detecting a low potential point of a flyback voltage waveform in an off period of a semiconductor switching element connected to a primary winding of a flyback transformer; An output detecting means for detecting an output level on the secondary side of the flyback transformer, and a time based on a difference between a detection value of the output detecting means and a target value in synchronization with a detection output of the low potential detecting means. Control means for turning on the semiconductor switching element, and when the low potential detecting means fails to detect the low potential point, forcibly after a predetermined time in synchronization with the previous switching of the semiconductor switching element, the semiconductor switching element is forcibly set based on the difference. Means for turning on for an extended period of time.