JP2618062B2 - LED drive circuit device and LED print head - Google Patents

Description

The present invention relates to an LED driving circuit device, particularly an LED driving circuit device effective for gradation processing, and an LED driving circuit device equipped with the LED driving circuit device.
Related to LED print heads.

(B) Conventional technology Generally, an LED print head is configured such that a plurality of LEDs are linearly arranged on a substrate. This kind of LED
In printheads, the amount of light emitted varies from LED chip to LED chip.Conventionally, variations between these chips have been reduced by selecting LEDs and ICs with relatively similar characteristics, or by using resistors for adjusting the output current. The LED print head is controlled so that the light output is uniform.

(C) Problems to be Solved by the Invention In the above-described conventional LED print head, when performing gradation processing (selecting and printing one of a plurality of levels of density in one dot), the gradation is determined according to the gradation. In order to change the ON time, the same print data is input to the shift register several times. For this reason, there is a problem that the variation between bits is large and the print quality is not good.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to provide an LED drive circuit device and an LED print head that can perform high-quality gradation processing with little variation between bits. I have.

(D) Means and Actions for Solving the Problems The LED drive circuit device of the present invention receives a plurality of bits of digital data for individual drive amount correction for each LED printing element in a bit serial manner, and receives the digital data. A serial shift register for storing driving amount correction data to be stored;
A drive current source circuit for individually supplying a current corresponding to the drive amount correction data to each LED printing element, and a serial shift register having a storage stage number corresponding to each LED printing element are used to print a bit of density gradation data. The serial shift registers receive each bit of the print density gradation data individually and in parallel,
A shift register for storing print density gradation data which serially shifts and stores the print density gradation data for each serial shift register, and corresponds to each LED printing element of each serial shift register of this shift register. A latch circuit that receives and stores print density gradation data in parallel for each storage stage, and a strobe signal that is time-divisional and has a different ON time from outside, and receives a time-divisional ON time in a bit output of the latch circuit. And a weighting circuit for assigning different weights and inputting the weights to the drive current source circuit.

Further, the LED print head of the present invention includes a plurality of LEDs.
LED drive element array in which print elements are arranged, and multiple bits of digital data for individual drive amount correction for each LED print element are received in a bit-serial input, and drive amount correction data storage for storing this digital data A serial shift register, and a drive current source circuit for individually flowing a current corresponding to the drive amount correction data to each LED printing element,
The serial shift registers having the number of storage stages corresponding to each LED printing element are arranged in a number corresponding to the number of bits of the print density gradation data. A shift register for storing print density gradation data which receives bits individually in parallel and serially shifts and stores the print density gradation data for each serial shift register; and each serial shift register of the shift register A latch circuit that receives and stores the gradation data of the storage stage corresponding to each of the LED printing elements in parallel, and a strobe signal having a different ON time in a time division manner from the outside, and outputs the bit output of the latch circuit in a time division manner.
And a weighting circuit for assigning different weights for the ON times and inputting the weight to the drive current source circuit.

In this LED drive circuit device and LED print head, first, a plurality of bits of drive amount correction digital data for each LED print element are input in a bit serial manner to a serial shift register for driving amount correction data storage, and stored. Is done. After that, grayscale data of a plurality of bits of print density indicating the degree of driving of the LED printing element is input in parallel to each serial shift register of the shift register for storing grayscale data in time sequence, and is shifted to each storage stage. It is memorized. These print density gradation data are stored in the latch circuit corresponding to each LED print element. The output of each latch circuit is weighted by a weighting circuit by a strobe signal having a different ON time in an external time division manner. That is, it is converted into an ON time signal corresponding to the gradation. The correction data of a plurality of bits of the serial shift register for storing the drive amount correction data and the ON time signal are input to a drive current source, and a current corresponding to the correction data is applied to each printing element in accordance with the ON time signal. Flowing for hours. The first drive amount correction data corrects the variation between the printing elements, then reads the print density gradation data, and provides high-speed, high-quality gradation printing by using the ON time signal corresponding to the print density gradation data. Characters are performed.

(E) Examples Hereinafter, the present invention will be described in more detail with reference to examples.

FIG. 1 is an LED driver I showing an embodiment of the present invention.
It is a block diagram of C (LED drive circuit device). In the figure, D ₀₁ ,..., D ₀₆₃ , D ₀₆₄ are terminals for externally connecting the respective LEDs (see FIG. 2). This driver IC is a drive circuit for 64 LEDs.

5-bit shift register 1 _-1, ..., 1 _-63, 1 _-64 and 4-bit shift register 2 are connected in series, the correction data CDIN is adapted to be inputted by the correction clock CCLK. Shift register 1 _-1, ..., 1 _-63, 1 _-64 each L
The shift register 2 is provided for storing the correction data for each ED and the correction data for correcting the entire level. Each shift register 1 _-1, ..., 1 _-63, 1 each bit output of _-64, the gate circuit 3 _-1, ..., 3 _-63, via a 3 _-64, DA conversion and current sources of the respective 5-bit 4 _-1 ,…,
_4-63 and _4-64 are entered. Each gate circuit is composed of an AND gate G ₁ ,..., G ₄ , G ₅ . The bit output of the shift register 2 is input to a 4-bit D / A converter 5, and the output of the D / A converter 5
Commonly input to the current sources 4 _-1 ,..., _4-63 , _4-64 . Each of the DA conversion / current sources 4 ₋₁ ,..., 4 ₋₆₃ , and 4 ₋₆₄ includes five drive transistors, and these transistors are connected in parallel.
_3-1, ..., 3 _-63, each bit output of 3 _-64, Tsumata AND gate G _1, ..., adapted to be turned ON by the output of the G _5. In addition, these DA conversion / current sources 4 ₋₁ ,…, 4 ₋₆₃ , 4 _−64
Are connected to dot terminals D ₀₁ ,..., D ₀₆₃ and D ₀₆₄ , respectively. Therefore, each DA conversion / current source, each dot terminal,
The drive current flowing through each LED is configured to have a larger value as the number of transistors that are turned on increases according to the output of each gate circuit. Also, depending on the output of the DA converter 5,
The overall level of the DA conversion / current sources 4 _-1 ,..., _4-63 , _4-64 is adjusted collectively.

The shift register 6 for inputting gradation data is composed of 64 storage stages 6 _-1 ,..., 6 _-63 , 6 _-64 corresponding to dots, and each stage has three D flip-flops D _0. , D ₁ ,
D ₂ is connected in parallel. Memory stage 6 _-64 D
The flip-flops D ₀ , D ₁ , and D ₂ store gradation data STR ₀ DIN, S
TR ₁ DIN and STR ₂ DIN are input in parallel. Each storage units 6 _-64, 6 _-63, ..., data for _6-1 by the clock signal CLK, and is sequentially shifted from left to right.

The outputs of the flip-flops D ₀ , D ₁ , D ₂ of the storage stages 6 _-1 ,..., 6 _-63 , 6 _-64 of the shift register 6 are latched.
7 _-1 , ..., 7 _-63 , 7 _-64 are input. Latch circuit
The latch operation to 7 _-1 ,..., 7 _-63 , 7 _-64
Done by

Latch circuit _7-1, ..., 7 _-63, 7 each output of _-64, the gate circuit 8 _-1, ..., 8 _-63, the gate circuit _3-1 through 8 _-64, ...,
3 _-63 and 3 _-64 are entered. Each gate circuit _8-1 , ..., 8
_-63, 8 _-64 is the AND gate G _11, G _12, G ₁₃ and the OR gate
Consists G _14, each bit output of the gradation data of the latch circuit is applied to one end of the input of the AND gate _{G 11, G 12, G 13} , the inputs of these AND gates G _11, G _12, G ₁₃ Strobe signals STR ₀ , STR ₁ , and STR ₂ are individually applied to the other end. Further, the input of the OR gate G _14, the output is applied to the AND gate _{G 11, G 12, G 13} , the output of the OR gate G ₁₄ is, the gate circuit 3 _-1, ..., 3 _-63, 3 _-64 The AND gates G ₁ ,..., G ₅ are added in common. Note that the strobe signals STR ₀ , STR ₁ , and STR ₂ are respectively
The ON times (pulse widths) are different, and the gradation signals are weighted. That gate circuit _28-1, ..., 8 _-63 constitute a weighting circuit 8 _-64 and the strobe signal _{STR 0, STR 1, STR 2} .

FIG. 2 shows an overall circuit block diagram of an LED print head using the driver IC 10 described above. Here, 10
24 LEDL _1, ..., the L _1024, 16 pieces of the driver IC10 _-1,
.., _10-16 . Note that input A
The correction data CDIN and gradation data STR ₀ DIN, STR ₁ DIN,
STR ₂ DIN and input B generally represent a correction clock signal CCLK, strobe signals STR ₀ , STR ₁ , STR ₂ , a latch signal LA and a clock signal CLK.

Next, the operation of the circuit of the embodiment will be described. When the operation starts, each driver IC has its own LED.
Data for individual correction and level correction (5 × 64 + 4)
Bits, further IC16 pieces, the clock CCLK for correcting the 16-fold of the correction data as the data CDIN, shift registers 2,1 _-64 sequentially each driver IC, 1 _-63, ..., are shifted 1 _-1 , FIG. 3 (a), respectively the correction data each driver IC 10 _-1 at the timing shown in, ..., 10 _-16 of the shift register 2, 1 _-64, ..., stored in 1 _-1.

The individual correction data is predetermined so as to correct the variation according to each LED and the like and to make the output of each LED uniform, and once stored, the shift register _1-64 , 1 _-63, ..., it is fixedly stored in the 1 _-1. Similarly, once the correction data for the overall level adjustment is stored in the shift register 2, it is fixedly stored thereafter.

When the input of correction data is completed, the tone data STR to be printed ₀ DIN, STR ₁ DIN, inputs the STR ₂ DIN. As these data, for example, image data of an image sensor of a digital copying machine or the like is input. These input data are stored in the respective storage stages _6-64 , _6-63 ,..., 6 of the shift register 6 in synchronization with the clock signal CLK, as shown in FIG.
_-1 shifted, 1024 clock signals, each driver
Data for each dot is stored in each storage stage of the shift register 6 of the IC. At this timing, the latch signal LA is input, and the latch circuits 7 _-64 , 7
_-63, ..., 7 to _-1, the print data and the gradation data for each dot is stored.

After latching, the latch circuit 7 _-64, 7 _-63, ..., 7 each bit output of _-1, the gate circuit 8 _-64, 8 _-63, ..., are input to _28-1, respectively strobe signal STR _0, obtaining the ON time signal a logical product of the STR _1, STR _2, the gate circuit 3 _-64, 3 _-63, ...,
3 Enter _-1 .

Now, for example, focusing on the dot D ₀₆₄ of a certain driver IC, if the gradation data of this dot is “1, 1, 1”, each bit output of the latch circuit _7-64 is “1”. , therefore the strobe signal STR ₀ from the OR gate G _14, ST
When R ₁ and STR ₂ are ON, all output high signals, and the signal with the longest ON time as a total is input to the gate circuit _3-64 .
Here, if the correction data stored in the shift register _1-64 happens to be “00111”, the AND gates G ₁ , G ₂ ,
Only G ₃ is over the ON time, outputs a high signal, thereby, the LED dot D ₀₆₄ is an AND gate G _1, G _2, G
_The transistors according to ₃ are turned on, and current flows from these transistors.

Next, for example, focusing on the dot D ₀₆₃ of a certain driver IC,
If the gradation data of this dot is "001", the latch circuit
7 each bit output of _-63 is "001", the strobe signal STR ₀ outputs only high signal when the ON from the OR gate G _14, this signal is input to the gate circuit 3 _-63. If the correction when the data was 00111, ON DA converter, the current source 4 _-63
Although three transistors are used, since the ON time is short, printing with light gradation is performed. Similarly, the correction data determines the current of the DA conversion / current source for each of the other dots, performs individual correction, and determines the ON time based on the strobe signal and the gradation data.

(F) Effect of the Invention According to the present invention, the correction of the variation for each LED is performed by storing the correction data for each dot in a storage circuit in advance.
On the other hand, since the grayscale data is input to the current source by changing the ON time, if correction data is input at the time of rising, the grayscale processing based on the ON time difference will be performed after each data input. High-speed, high-quality gradation printing.

In addition, a serial shift register having a storage stage corresponding to each LED printing element includes a plurality of shift registers arranged in parallel corresponding to the number of bits of gradation data, and each serial shift register is provided for each printing element. The corresponding gradation data is individually received in parallel, each storage stage is serially shifted and stored, and each LE of each serial shift register is stored.
Latch the storage stage output corresponding to the D printing element to the latch circuit,
Further, since the signal is converted into an ON time signal corresponding to the gradation by the weighting circuit, the gradation data can be combined with the drive correction data with a simple circuit configuration.

[Brief description of the drawings]

FIG. 1 is a block diagram of a driver IC of an LED print head showing one embodiment of the present invention, and FIG.
3 (A) and 3 (B) are signal time charts for explaining the operation of the circuit according to the embodiment. 1 _-1, ..., 1 _-63, 1 _-64: correction data shift register, 4 _-1, ..., 4 _-63 - 4 _-64: DA converter and a current source, 6: data shift register, 7: latch Circuit, 8: gate circuit, CDIN: correction data, STR ₀ DIN / STR ₁ DIN / STR ₂ DIN: gradation data, STR ₀ / STR ₁ / STR ₂ : strobe signal.

 ──────────────────────────────────────────────────続 き Continuation of the front page (56) References JP-A-63-270167 (JP, A) JP-A-62-256575 (JP, A) JP-A 1-141039 (JP, U) JP-A 63-270167 11837 (JP, U) JP-B 52-31178 (JP, B2) JP-B 56-8537 (JP, B2)

Claims (2)

(57) [Claims] 1. A drive amount correction data storage serial shift register for receiving a plurality of bits of digital data for drive amount correction for each LED printing element in a bit serial manner and storing the digital data. A drive current source circuit for individually supplying a current corresponding to the amount correction data to each LED printing element, and a serial shift register having the number of storage stages corresponding to each LED printing element to the number of bits of the printing density gradation data. The serial shift registers receive the bits of the print density gradation data individually and in parallel, and shift the print density gradation data serially for each serial shift register. Shift register for storing print density gradation data, and each LE of each serial shift register of this shift register
A latch circuit that receives and stores print density gradation data for each storage stage corresponding to the D printing element in parallel, and a strobe signal that is time-divisional and has a different ON time from the outside, and receives a bit output of the latch circuit. A weighting circuit for assigning different weights of the ON time in a time-sharing manner, and a weighting circuit for inputting to the drive current source circuit.
Drive circuit device. 2. An LED printing element array in which a plurality of LED printing elements are arranged, and a plurality of bits of digital data for individual drive amount correction for each LED printing element are received in a bit-serial input manner. A serial shift register for storing driving amount correction data, a driving current source circuit for individually supplying a current corresponding to the driving amount correction data to each LED printing element, and a storage corresponding to each LED printing element. Serial shift registers having the number of stages are arranged in a number corresponding to the number of bits of the print density gradation data, and each serial shift register receives each bit of the print density gradation data individually and in parallel, A shift register for storing print density gradation data which serially shifts and stores the print density gradation data for each serial shift register; Each LE of each serial shift register of the register
A latch circuit that receives and stores the gradation data of the storage stage corresponding to the D printing element in parallel, and a strobe signal having a different ON time in a time-sharing manner from the outside, and receives a time-sharing ON time in a bit output of the latch circuit. And a weighting circuit for giving different weights to the driving current source circuit and inputting the same to the driving current source circuit.