JP2613295B2 - Pickup speed detecting device for optical information recording / reproducing device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to an optical information recording / reproducing apparatus for optically recording information, and in particular, is provided in advance on a disk-shaped optical information recording medium (such as an optical disk). The present invention relates to a pickup speed detecting device that detects a moving speed and a moving amount of an optical pickup based on pit information.

[Conventional technology]

A sampled format (sampled format) is one of the so-called optical disk system formats for optically recording and reproducing information on a disk-shaped optical information recording medium.
format) is known. This method is described in Proceeding of SPIE, vol. 695, Optical Mass Data Storage II, published in 1986, pp. 112-115 and 239-242.
695, Optical Mass Data Storage II, 1986, p112-p11
5, p239-p242).

In this format, as shown in FIG. 4, a tracking error signal and a timing signal are obtained by using a sample mark provided in advance on an optical disk. In FIG. 4, (7.1) to (7.18), (8.1) to (8.18), (9.1)
(9.18) are sample marks. (6.1)-(6.1
8) shows the center of the virtual track (actually, there is no track groove). The first sample mark (7.
In 1) to (7.18), the position changes in the track direction every 16 tracks (in FIG. 4, the positions change at (7.16) and (7.17)). This is for obtaining a track crossing signal during a seek. In this method, the detection of the track movement amount at the time of access has a resolution of 16 tracks.

However, this method has the following problems. (1) Since the track movement amount detection signal has only two types of patterns, the movement direction of the pickup at the time of access cannot be detected.

(2) The resolution of the track movement amount detection is insufficient at 16 tracks. However, if the pattern repetition period is set to 16 tracks or less in order to increase the resolution of the track movement amount detection signal, the detection limit speed becomes insufficient.

In order to solve the above two problems, three or more types of patterns are periodically repeated according to the change of the track. Thereby, the above-mentioned problem can be solved. That is, (1) the moving direction of the optical pickup at the time of access can be detected.

(2) Even if the resolution is increased (even if the pattern change period is shortened), the repetition period can be lengthened by increasing the number of patterns, so that the detection limit speed and the resolution can be secured simultaneously. Become.

Such a code for detecting the track movement amount is hereinafter referred to as an access mark.

2. Description of the Related Art Conventionally, as an apparatus for detecting the moving speed of an optical pickup, for example, those described in JP-A-63-213173 and those described in JP-A-63-213174 are exemplified. The above invention detects the moving speed of the optical pickup from the period of the tracking error signal.

[Problems to be solved by the invention]

The above prior art has the following problems. That is, (1) No consideration has been given to speed detection using an access mark.

(2) When the tracking error signal is obtained by sampling, no consideration has been given to the fact that the speed detection based on the tracking error signal cannot detect the speed at high speed.

(3) No consideration has been given to the means for detecting the relative movement direction and movement amount between the optical pickup and the optical disk.

An object of the present invention is to provide a speed detecting device that detects a relative moving direction, a moving amount, and a moving speed between an optical pickup and an optical disk by using an access mark.

[Means for solving the problem]

In order to solve the above problems, the present invention employs the following technical means. That is, (1) a numerical value is assigned to each pattern of the access mark in advance, and an access mark detection circuit for converting the access mark into a numerical value every time the access mark is demodulated is provided.

(2) Each time an access mark is demodulated, a subtraction circuit is provided for calculating the difference between the access mark converted into a numerical value and the access mark previously converted into a numerical value.

(3) The value calculated by the subtraction circuit is proportional to the amount of movement of the optical pickup per unit time. A moving direction calculating circuit for calculating a moving direction from the numerical value, a moving amount calculating circuit for calculating a moving amount, and a moving speed calculating circuit for calculating a moving speed are provided.

[Action]

A numerical value is assigned to each pattern of the access mark in advance, and each time the access mark is demodulated, it is converted into a numerical value by the access mark detection circuit. The subtraction circuit calculates a difference between the access mark converted into a numerical value and the access mark previously converted into a numerical value, and outputs the calculated difference to the moving direction calculating circuit, the moving amount calculating circuit, and the moving speed calculating circuit.
The values input by these circuits are proportional to the amount of movement of the optical pickup per unit time. Therefore, speed information is obtained by multiplying the numerical value by a constant. Further, the numerical values input one after another are integrated and multiplied by a constant to obtain information on the number of moving tracks. Further, since the access mark is formed by repeating three or more types of patterns, when the speed is low, the moving direction can be detected.

〔Example〕

Hereinafter, an embodiment of a pickup speed detecting device of the optical information recording / reproducing device of the present invention will be described in detail with reference to the drawings.

First, a first embodiment of the present invention will be described with reference to FIGS.
FIG. 5, FIG. 6, FIG. 6, FIG. 7, FIG. 8, FIG.
This will be described with reference to FIG. 11, FIG. 11, FIG. 12, FIG. 13, and FIG.

The optical disk used in this embodiment will be described with reference to FIGS. In FIG. 2, reference numeral 1 denotes an optical disk. A spiral or concentric virtual track 2 is formed thereon, and sample marks 3 are periodically provided on the track 2. As shown in FIG. 3A, the sample mark 3 includes two pits (first wobbling pit 7 and second wobbling pit 8) wobbled in opposite directions with respect to the virtual track center 2. It is composed of a timing pit 9 placed at the virtual track center 2 and an access mark 11 composed of a plurality of pits. Access mark 11
In, the arrangement of the pits changes periodically according to the change of the track. In the present embodiment, a pattern that forms one cycle with 16 tracks is used. The number of pattern types is 8, and the same pattern continues for two tracks. Since the detection of the movement amount of the track is performed by the access mark, the number of tracks in which the same pattern continues is the resolution of the pattern. The resolution of this pattern example is two tracks.

FIG. 5 shows a block diagram of an optical information recording / reproducing apparatus (optical disc recording / reproducing apparatus) using the optical disk of FIG. Reference numeral 1 denotes an optical disk, on which sample marks 3 are provided on one surface of the disk in advance. Reference numeral 20 denotes a spindle motor for rotating the optical disk 1. Reference numeral 21 denotes an optical pickup which converts the laser light emitted from the semiconductor laser element 22 into a collimating lens 23, a deflecting beam splitter 24, and a quarter.
Recording surface 2 of optical disk 1 through wave plate 25 and objective lens 26
Focus on 7. The light reflected from the recording surface 27 of the optical disk 1 travels in the direction of reflection when it enters and is reflected by the polarization beam splitter 24 and is detected by the detection lens 28 by the photodetector.
Focused on 29. The photodetector 29 is configured to be divided into two regions so that a focus error signal can be detected based on a light amount difference between the respective regions. 30 is a differential amplifier circuit,
The difference signal between the detection signals of the photodetectors 29 is amplified. Reference numeral 32 denotes a sample hold (S / H) circuit which detects and holds the detected focus error signal (a value detected by the astigmatism method from the mirror surface at the center of the sample mark). Reference numeral 33 denotes a servo circuit for performing focus servo, which moves an actuator 34 that drives the objective lens 26 in the focus direction,
Perform focus servo. An amplification circuit 31 detects the total amount of light incident on the photodetector 29. 35 is a peak detection circuit composed of a differentiation circuit and a zero-cross detection circuit,
From the reproduced signal detected by the amplifier circuit 31, the peak position of the reproduced signal corresponding to the timing pit 9 is detected. The first wobbling pit 7, 7
The positions of the second wobbling pits 8 and the timing pits 9 do not change over one surface of the optical disc 1, and always appear in a fixed pattern when tracking servo is not applied. Further, these pit groups can be specified because they appear at a constant period, and the clock recovery circuit 36 uses the peak signal corresponding to the timing pit 9 to incorporate the built-in PL.
An L (phase locked loop) circuit multiplies the frequency by 110 to extract a clock for recording and reproducing data. The cycle of the sample mark 3 is 50.1 kHz (at 1800 rpm), and the clock frequency is 5.5 MHz. The output signal of the clock recovery circuit 36 is used as a clock of the digital processing circuit 37. The period of sample mark 3 (50.1kHz / 1800rpm
The segment clock 501 generated at (time) is used for controlling the speed detection circuit 40. Note that one cycle of the sample mark 3 is called one segment. Numeral 38 denotes a detection / decoding circuit for detecting the position of the transmission bit having the fourth amplitude from the maximum value of the reproduction signal amplitude in each symbol and decoding the data. The detection decoding circuit 38 is provided with the servo mark shown in FIG.
Detects access marks from 11 positions and performs error detection and protection of access marks. Access mark signal detected
500 is output to the pickup speed detection circuit 40. 43
Is a D / A (digital / analog) converter, and 41 is a track servo circuit. Tracking error signal is D / A
The signal is output through the converter 43 and drives the actuator 42 in the tracking direction to finely move the objective lens 26 in the track direction to perform tracking. Reference numeral 40 denotes a pickup speed detection circuit, which detects the track movement amount, the track movement speed and the direction from the data code value of the access mark output from the detection decoding circuit 38. Reference numeral 44 denotes a control circuit composed of a microcomputer, which controls not only the entire drive device but also the track access. Reference numeral 60 denotes a drive circuit for the semiconductor laser element 22, and 49 denotes a data modulation circuit. The input / output data is 4 / 11-modulated and converted into serial data. 1
A thermal change is generated on the recording surface to form pits and record data.

Next, access control will be described. When the optical pickup 21 is moved, the control circuit 44 controls the control voltage D / A.
Output to the converter 48. Reference numeral 46 denotes a servo circuit of a linear motor for track access, which drives the linear motor 47 according to the output voltage of the D / A converter 48 to drive the optical pickup 21.
The whole is moved in the radial direction of the optical disc 1. At this time,
The control voltage output from the control circuit 44 is equal to the track movement amount (movement amount signal 50) output from the pickup speed detection circuit 40.
3), the moving speed (speed signal 503), and the moving direction (moving direction signal 503). Therefore, the access control requires accurate detection of the track moving amount, moving speed, moving direction, and the like. In addition, the moving speed in the access control,
The moving direction is the optical disc 1 of the optical pickup 21
Moving speed and moving direction in the radial direction.

Next, FIG. 1 shows a block diagram of the pickup speed detection circuit 40 shown in FIG.

The pickup speed detection circuit 40 is controlled by a segment clock 501, and calculates and outputs the values of the speed signal 502 and the movement amount signal 503 each time an access mark is detected. 201 is an access mark detection circuit. Access mark signal output from detection / decoding circuit 38
The access mark 500 is read by the access mark detection circuit 201 and replaces each of the eight types of access marks with numerical values from 0 to 7 from the outer periphery side as shown in the conversion table of FIG. 202 is an access mark register A, from 0 to 7
Store the access mark replaced with the numerical value up to. Reference numeral 203 denotes an access mark register B, and when new data is taken into the access mark register A202, the value stored in the access mark register A202 is moved.

Reference numeral 204 denotes a subtraction circuit, which is an access mark register A202.
The difference between the value stored in the access mark register B203 and the value stored in the access mark register B203 is determined, and the change in the relative movement amount between the optical disc 1 and the optical pickup 21 during one segment is calculated. Also, the optical disk 1 for one segment
Relative moving speed between the optical pickup 21 and
Based on the calculation result of n, it is determined whether “high speed” or “low speed” (speed determination signal 509). Here, ph is the track pitch (1.5 micrometer in this embodiment), n is the resolution of the access mark (2 in this embodiment), f is the frequency of the segment clock (about 50.1 kHz in this embodiment), ,
f and n are determined as described above. Further, the moving direction is calculated at a low speed (moving direction signal 508 at a low speed). 205 is a movement direction detection changeover switch. This is optical disk 1
It outputs a relative moving direction (moving direction signal 505) between the optical pickup 21 and the optical pickup 21. Reference numeral 206 denotes a high-speed speed calculation circuit which calculates a relative moving speed between the optical disc 1 and the optical pickup 21 at high speed. Reference numeral 208 denotes a low-speed speed calculation circuit which detects a relative moving speed between the optical disc 1 and the optical pickup 21 at low speed. 207 is a speed output circuit,
When the speed determination signal 509 is “low speed”, the output signal of the low speed speed calculation circuit 208 is output to the control circuit 44 as the speed signal 502.

On the other hand, when the speed determination signal 509 is “low speed”, the output of the speed calculation circuit 206 at low speed is output to the control circuit 44 as the speed 502. 506 is a moving direction signal at the time of high speed.
Indicates in which direction the optical pickup 21 is being controlled (inward or outward). A stop detection circuit 299 sets the stop signal 599 to "stop" when the optical pickup 21 stops, and sets the stop signal 599 to "not stopped" when the optical pickup 21 is moving. A movement amount calculation circuit 209 calculates the total movement amount of the optical pickup 21 and outputs the calculated movement amount to the control circuit 44 as a movement amount signal 503. This circuit 209
Outputs the total movement amount as "positive" for the outer circumference direction and "negative" for the inner circumference direction after the movement amount clear signal 504 is "cleared".

FIG. 6 is a flowchart showing the operation algorithm of the subtraction circuit 204. Hereinafter, each control step will be described.

Step 700: The values of the access mark register A202 and the access mark register B203 are read and stored (stored) in the memories M1 and M2, respectively.

Step 701: If the moving direction signal 506 at the time of high-speed output from the control circuit 44 indicates “outward direction”, the process proceeds to step 702. Step 703 when “inward” is indicated
Transition to.

Step 702: Store the value of M2M1 in the memory M3. However, "" means subtraction in the remainder system of the number of access mark patterns (8 in this embodiment), and "" will be determined as such hereinafter.

Step 703: The value of-(M1M2) is stored in the memory M3.

Step 704: When the absolute value of the value of the memory M3 is larger than 1, the process proceeds to Step 705. If less than 1, step 7
Transitions to 06.

 Step 705: The speed determination signal 509 is set to “high speed”.

 Step 706: The speed determination signal 509 is set to “low speed”.

Step 707: The value of the memory M3 is output to the high speed speed calculation circuit 206, the low speed speed calculation circuit 208, the speed output circuit 207, and the movement amount calculation circuit 29.

FIG. 7 is a flowchart showing the operation algorithm of the movement direction detection changeover switch 205. A description will be given for each control step.

Step 710: When the speed determination signal 509 is “low”, the process proceeds to step 711. When the speed determination signal 509 is “high”, the process proceeds to step 712.

Step 711: The moving direction signal 508 at the time of low speed is output as it is as the moving direction signal 505.

Step 712: The moving direction signal 506 at the time of high speed is output as the moving direction 505 as it is.

FIG. 8 is a flowchart showing the operation algorithm of the speed detection circuit 206 at high speed. A description will be given for each control step.

Step 720: Store the value read from the subtraction circuit 204 in the memory M
Store in 4.

Step 721: Calculate the speed V and store it in the memory M5.
The speed V is obtained by V = M4 × n × p × f.

Step 722: Output the value of the memory M5 to the speed output circuit 207.

FIG. 9 is a flowchart showing the operation algorithm of the speed output circuit 207. Hereinafter, each control step will be described.

Step 730: Transit to step 731 when the speed determination signal 509 is “high speed”, and transit to step 732 when it is “low speed”.

Step 731: The output of the speed detection circuit 206 at the time of high speed is directly output as the speed signal 502.

Step 732: Output the output signal of the speed detection circuit 208 at low speed as the speed signal 502 as it is.

FIGS. 10, 11 and 12 show the speed detection circuit 20 at low speed.
8 is shown in a flowchart of the operation algorithm. First,
FIG. 10 is described for each control step.

Step 740: Store the output signal of the subtraction circuit 204 in the memory M6.

Step 741: When the absolute value of the value of the memory M6 is 1, the flow goes to Step 742. The operation flow of step 742 (subroutine M61) will be described later with reference to FIG. When the value of the memory M6 is zero, the flow goes to Step 743. The operation flow of step 743 (subroutine M6
0) will be described later with reference to FIG. Memory M
Step 744 when the value of 6 is not less than +2 or not more than -2
Transition to.

 Step 742: shown in FIG.

 Step 743: shown in FIG.

Step 744: Store the value of p × f × n / M8 in the memory M9.

Step 745: Output the value of the memory M9 to the speed output circuit 207.

Next, the operation flow of FIG. 10 will be described for each control step with reference to FIG.

Step 750: If the sign of the value of the memory M6 is different from the sign of the value of the memory M7, the flow goes to Step 751. When the sign of the value of the memory M6 is equal to the sign of the value of the memory M7, the process proceeds to Step 752.

Step 751: The value obtained by inverting the sign of the value of the memory M8 is stored in the memory M8.

 Step 752: Store the value of the memory M7 in the memory M8.

 Step 753: The value of the memory M6 is stored in the memory M7.

Next, the operation flow of FIG. 744 will be described for each control step with reference to FIG.

Step 760: If the value of the memory M7 is positive, the flow goes to Step 761. If the value of the memory M7 is negative, the process transits to Step 752.

 Step 761: One is added to the value of the memory M7.

 Step 762: 1 is subtracted from the value in the memory M7.

Step 763: When the absolute value of the value in the memory M7 is larger than the absolute value of the value in the memory M8, the flow goes to Step 764. Memory M
The process ends when the absolute value of the value of 7 is equal to or smaller than the absolute value of the value of the memory M8.

 Step 764: Store the value of the memory M7 in the memory M8.

Next, FIG. 13 shows a flowchart of an operation algorithm of the movement amount calculation circuit 209. Hereinafter, each control step will be described.

Step 770: Store the output signal of the subtraction circuit 204 in the memory M10.

Step 771: When the movement amount clear signal 504 is in the state of “clear”, the flow goes to step 772. When the movement amount clear signal 504 is in the “not cleared” state, the flow goes to step 773.

 Step 772: Clear the value of the memory M11 to zero.

 Step 773: Store the value of M10 × n in the memory M11.

Step 774: Output the value of the memory M11 as the movement amount signal 503.

Next, FIG. 14 is a flowchart showing an operation algorithm of the stop detection circuit 229. Hereinafter, each control step will be described.

Step 780: Store the value of the moving direction signal 508 at low speed in the memory M
Store in 12.

 Step 781: The value of the memory M12 is stored in the memory M13.

Step 782: When the value of the memory M12 is equal to the value of the memory M13, the flow goes to Step 783. Memory M12 value and memory M1
When the values of 3 are not equal, the process transits to Step 784.

 Step 783: Set the stop signal to “not stopped”.

 Step 784: Set the stop signal to “stopped”.

The control circuit 44 is a speed detection circuit configured as described above.
40 is the moving speed of the optical pickup 21 (speed signal 502),
Movement amount (movement amount signal 503), movement direction (movement direction signal 50)
5) The stop timing (stop signal 599) can be obtained. Each signal is as follows. That is, (1) the speed signal 502 indicates the moving speed of the optical pickup 21 as m
It is shown in units of m / sec, with the outer direction being positive and the inner direction being negative. However, the control circuit 44 indicates in which direction the optical pickup 21 is being moved by a moving direction signal 505 at high speed.

(2) The movement amount signal 503 indicates the accumulated number of moving tracks after the movement amount clear signal 505 is "cleared". However, the outer circumferential direction is indicated by positive, and the inner circumferential direction is indicated by negative.

(3) As the moving direction signal 505, the high speed moving direction signal 506 output from the control circuit 44 at high speed is output as it is.
At a low speed where it is difficult to detect the moving direction, the moving direction detected from the access mark is output.

(4) The stop signal 599 sets the stop signal to “stopped” when the optical pickup 21 is stopped. When moving, the stop signal is set to "not stopped".

According to the embodiment of the present invention described above, the moving amount and moving speed of the optical pickup 21 can be calculated from the optical disk 1 having the access mark shown in FIG. (When smaller than p × n × f) The moving direction can be detected.

〔The invention's effect〕

As described above, the relative speed of movement between the optical pickup and the optical disk, the number of tracks moved, the direction of movement at low speed can be detected from the signal obtained by reproducing the access mark, and the stop of the optical pickup can be detected. Especially,
Since the movement direction and the stop of the optical pickup can be detected for each segment at a low speed, the stop of the optical pickup can be detected without delay in access control, and tracking control thereafter becomes easy, and If the control of the optical pickup fails due to a missing access mark or the like, the moving direction can be detected quickly, and the speed of the recovery process can be increased.

Therefore, according to the present invention, it is possible to provide a speed detecting device that detects a relative moving direction, a moving amount, and a moving speed of a pickup and an optical disk by using an access mark.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a speed detecting circuit of an optical pickup according to an embodiment of the present invention, and FIG. 2 is an access mark of an optical information recording medium according to an embodiment of the present invention and assignment of numerical values to each mark. FIG. 3A is a diagram showing an access mark of an optical information recording medium used in an embodiment of the present invention, and FIG. 3B is a diagram showing a numerical value of each mark of the access mark. FIG. 4 is a diagram for explaining allocation, FIG. 4 is a diagram showing a preformat section of a sampled servo system used in the prior art, FIG. 5 is a block diagram showing a configuration of an optical information recording / reproducing apparatus according to the present invention, and FIG. 6 is a flowchart showing the operation of the subtraction circuit, FIG. 7 is a flowchart showing the operation of the movement direction detection changeover switch, FIG. 8 is a flowchart showing the operation of the speed calculation circuit at high speed, FIG. Flow chart showing the operation of the speed output circuit, FIGS. 10, 11, and 12 are flow charts showing the operation of the speed calculation circuit at low speed, FIG. 13 is a flow chart showing the operation of the movement amount calculation circuit, FIG. 5 is a flowchart showing the operation of the stop detection circuit. 40: Pickup speed detection circuit, 201: Access mark detection circuit, 202: Access mark register (A), 203: Access mark register (B), 204: Subtraction circuit, 205: Moving direction detection changeover switch , 206: Speed calculation circuit (at high speed), 207: Speed output circuit, 208: Speed calculation circuit (at low speed), 209: Movement amount calculation circuit, 299: Stop detection circuit.

Claims (5)

(57) [Claims] 1. A mark comprising one or a plurality of pits, wherein the content of the mark changes for each track or a plurality of tracks, and the change of the content of the mark repeats periodically at a fixed track cycle. In a pickup speed detection device of an optical information recording / reproducing apparatus that performs recording and reproduction on an optical information recording medium having an access mark formed as a mark group on a track, when the pickup moves at a high speed, A first speed for calculating a moving speed of the pickup from a difference between an access mark signal obtained in the track cycle by reproducing the access mark and a mark content of an access mark signal obtained during scanning in the immediately preceding track period; A calculating circuit for reproducing the access mark when the pickup moves at a low speed; A second speed calculation circuit for calculating a moving speed of the pickup from a change period of the content of the access mark changing within a track period; a first speed calculating circuit based on the moving speed of the pickup; Means for switching the output of the speed calculation circuit. 2. The first speed calculation circuit and the second speed calculation circuit, wherein: a conversion circuit for sequentially converting the access mark signal into a numerical value according to the signal pattern; A first memory circuit for storing a numerical value of an access mark signal, and a subtraction circuit for calculating a difference between a numerical value obtained by converting the access mark signal by the conversion circuit and a numerical value stored in the first memory circuit. 2. A pickup speed detecting device for an optical information recording / reproducing device according to claim 1, wherein a moving speed of said pickup is calculated by inputting a signal. 3. The optical information according to claim 2, wherein the detection switching circuit switches between the first speed calculation circuit and the second speed calculation circuit based on an output of the subtraction circuit. Pickup speed detector for recording and playback devices. 4. The moving direction at the time of low-speed movement of the pickup by calculating the difference between the numerical value obtained by converting the access mark signal by the converting circuit and the numerical value stored in the first memory circuit. 3. The pickup speed detecting device for an optical information recording / reproducing device according to claim 2, wherein: 5. A stop detection circuit for detecting whether or not the pickup has stopped by comparing a movement direction signal generated by the subtraction circuit at the time of low-speed movement of the pickup with a previous movement direction signal. 5. A pickup speed detecting device for an optical information recording / reproducing device according to claim 4, wherein: