JP2601186B2 - ATM relay node - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an ATM (Asynchronous Transfer Mode).
mode) The present invention relates to a relay node, and particularly to a bypass control method in an ATM relay node.

[0002]

2. Description of the Related Art A schematic configuration of a conventional ATM relay node will be described with reference to FIG. This ATM relay node has a plurality of input ports A1 to An and output ports B1 to Bn
Each of these input ports A1 to An
The M line received signals are input to the receiving side physical layer terminating units 11 to 1n, respectively.

The receiving side physical layer terminating units 11 to 1n
Each transmits an optical or electrical signal on a receiving line to an ATM.
To the level of the electrical signal used in node 100,
The bit timing information is extracted from the level-converted received signal to establish bit synchronization. If necessary, the signal after the bit synchronization is established is decoded. If necessary, a frame is extracted from the decoded received signal. Identification to establish frame synchronization, identify the boundary of the ATM cell to establish cell synchronization, and send the AT to the receiving side header converters 21 to 2n.
A series of processes required for termination of the physical layer until the transmission of the M cell flow is performed.

[0004] Each of the receiving-side header converters 21 to 2n
Upon receiving the ATM cell flow from each of the physical layer terminating units 11 to 1n, the ATM cell generates internal switching information in accordance with VPI (virtual path identifier) / VCI (virtual container identifier) which is the routing information in the header of each ATM cell. Output with

The self-routing switch unit 3 performs a switching process between the input / output ports of each of the ATM cells of the reception side header conversion units 21 to 2n in ATM cell units according to internal switching information attached thereto.

Each of the transmission-side header conversion units 41 to 4n rewrites the VPI / VCI of the ATM cell switched by the self-routing switch unit 3 to a new VPI / VCI and outputs the rewritten VPI / VCI.

[0007] Each of the transmission-side physical layer terminators 51 to 5n generates an error detection code for the ATM cell stream from the transmission-side header converters 41 to 4n.
A transmission frame for transmitting the ATM cell is generated. If necessary, transmission information composed of the ATM cell is coded, and bit timing for transmitting the transmission information is generated. After converting the electric signal level into an optical signal or an electric signal used on the transmission line, a series of processes necessary for termination of the physical layer until transmitting this transmission information on the transmission line is performed.

[0008] The ATM cell received from a certain input port, when the ATM node 100 is a relay node,
The physical layer terminating unit on the receiving side performs an object layer terminating process, and inputs the result to the header converting unit on the receiving side. Based on the internal switching information generated for each ATM cell in the receiving-side header conversion unit, the self-routing switch unit 3 switches to a different output port for each ATM cell.

In general, the VPI / VCI of the ATM cell is rewritten and transmitted by the transmission side header conversion units 41 to 4n. This rewriting enables switching between input / output ports and conversion of VPI / VCI values, thereby increasing the flexibility of the system.

When rewriting the VPI / VCI of an ATM cell in the transmission-side header converters 41 to 4n, there is generally no guarantee that the VPI / VCI of the input ATM cell matches the VPI / VCI. Cells may be output.

[0011]

Conventionally, in this type of ATM node, there is no mechanism for directly connecting an input port signal to an output port signal between different ports, and the signal on the input port is transferred to the ATM cell level by the ATM layer function. , And then output as a signal on a desired output port.

[0012] For this reason, ATM layer function of the ATM node for the ATM door Rahikku, such as the ATM node is a relay node, in particular VPI / VC in the cell header
Header conversion units 21 to 2n and 41 to 4n for performing I replacement
In the case where a failure occurs in the self-routing switch unit 3 of the cell extending between the ports, it is dealt with by setting and selecting a bypass route via a third node in place of the failed relay node.

Therefore, complicated processing such as rewriting the header conversion table of the header conversion unit managed by each node involved in the detour and securing the bandwidth required for the detour route is required. Further, when there is no third node for detour, that is, when the nodes are arranged in a bus or loop topology using the existing LAN wiring system, the detour itself described above is difficult. There is a problem that there is.

An object of the present invention is to provide an ATM relay node which does not require rewriting of a header conversion table or processing for securing a band by using bypass control in a physical layer instead of detour when a node fails. .

[0015]

The ATM relay nodes according to the present invention are fixedly provided in advance in a one-to-one correspondence with each other.
A plurality of pairs output ports of which the inputs the respective ATM line receiver signal from the input port to the receiving side physical layer terminating unit for outputting performing physical layer termination processing on each reception ATM cell, the receiving side physical layer Output by the termination means
With the received ATM cells as inputs, the header of each cell
One-to-one routing information
The transmission routing information that is fixedly set in advance is controlled.
ATM layer processing means for performing an ATM layer process for deriving an ATM cell to a corresponding output port in accordance with the transmission routing information , an output of the ATM layer processing means and an output of the receiving side physical layer terminating means. Selecting means for selectively deriving an ATM cell; transmitting-side physical layer terminating means for performing a physical layer terminating process on the output ATM cell of the selecting means and outputting the ATM cell to the output port; Of the ATM layer processing means, and monitors the output AT
Control means for selecting the M cell and controlling the selection means to select an output ATM cell from the receiving side physical layer terminating means in the event of a failure.

[0016] The ATM layer processing means controls the routing information so that the routing information of the output ATM cell matches that of the input ATM cell.

[0017]

When a failure occurs in the ATM layer processing unit in the ATM relay node, the failed ATM layer processing unit is bypass-controlled inside the node so that the ATM cell received from the input port is bypassed to the corresponding output port. Output. At this time, by preliminarily to match the VPC / VCI that are respectively used in the relay line between the relay line and the relay node and the destination node between the source node and the relay node, the header converting unit at any node departure It is not necessary to rewrite the header conversion table managed by the above.

[0018]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention. In FIG. 1, the same parts as those in FIG.

Each ATM line reception input from the input ports A1 to An is supplied to the receiving side physical layer terminating units 11 to 1n to perform a physical layer terminating process on each received ATM cell.

The output ATM cell stream of each of the receiving side physical layer terminating units 11 to 1n is input to each of the receiving side header conversion units 21 to 2n and also to one input of each of the selectors 71 to 7n.

Each of the receiving-side header converters 21 to 2n is provided with a management table for generating internal switching information (internal routing information) corresponding to the VPI / VCI of each header information of the input ATM cell. FIG.
(A) shows an example of the table.

As shown in FIG. 2A, the internal routing information is generated from the input port number of the ATM cell and the VPI / VCI value. Used to define the output port.

In the case of the present embodiment, in switching between the ports for the relay traffic, the input port A
Internal routing information of the receiving side header conversion table is set such that 1 is fixedly assigned to the output port B1, A2 is fixedly assigned to B2, and An is fixedly assigned to Bn. The generated internal routing information is supplied to the self-routing switch unit 3 together with the corresponding ATM cell.

The self-routing switch unit 3 performs switching based on the internal routing information so as to derive an input ATM cell to a desired output port, and outputs it to the transmission-side header conversion units 41 to 4n.

The transmitting side header converters 41 to 4n convert the VPI / VCI of the input ATM cell into a new VPI / VCI.
2 is provided with a management table for rewriting
(B) shows an example of the table.

As shown in FIG. 2B, the VPI / VCI value of the input ATM cell and the VPI / VCI value of the output ATM cell are determined on a one-to-one basis. Although the VCI value may be different (as described in the section of the prior art), in the present invention, the VPI / VPI /
The VCI value is made to match that of the input cell.

Outputs A of the transmission header converters 41 to 4n
The TM cells serve as the other inputs of the corresponding selectors 71 to 7n, and the selected outputs of the selectors 71 to 7n are input to the corresponding transmission-side physical layer terminating units 51 to 5n. On the other hand, physical layer termination processing is performed, and the data is transmitted to the ATM line via the corresponding output ports B1 to Bn.

The fault monitoring control unit 6 includes the receiving side header converting unit 2
1 to 2n, a self-routing switch unit 3, and transmission side header conversion units 41 to 4n, which monitor failures of ATM layer processing blocks and perform selection control of selectors 71 to 7n.

Next, the operation including the setting of the ATM nodes in the ATM network constituted by the ATM nodes shown in FIG. 1 will be described. FIG. 3 shows an ATM network in which the ATM nodes 100, 101 and 102 of FIG. 1 are cascaded in a bus topology. The ATM nodes 100 to 102 are connected in cascade, and terminals 200 to 202 are accommodated under the respective nodes.

Now, the terminal 201 sends an AT to the terminal 202.
When performing communication by transmitting an M cell, the ATM node 101
It is assumed that the ATM cell destined for the terminal 202 on the line 301 via the terminal is provided with VPI = ai and VCI = bi.

The ATM cell is switched to the ATM line 302 by the ATM relay node 100.
The TM line 301 and the ATM line 302 are connected to the receiving side header converters 21 to 2n in such a manner that ATM cells are switched so as to have a line relationship between the input port Ai and the output port Bi in the ATM node configuration of FIG. The inside management table is set in advance.

Also, A from terminal 201 to terminal 202
When the VPI / VCI is rewritten by the transmission side header conversion units 41 to 4n of the ATM node 100, the TM cell is
The node 1 is set so that the VPI / VCI of the ATM cell on the output line 302 is the same as the VPI / VCI on the input line 301, that is, VPI = ai and VCI = bi.
The management table of the transmission side header conversion units 41 to 4n of 00 is set in advance as shown in FIG.

As a result, as shown in FIG.
From the terminal 202 to the terminal 202 are transferred as ATM cells having VPI = ai and VCI = bi on the trunk line 301 and the trunk line 302, respectively.

When the relay node 100 is operating normally, the selector 7 is controlled by the fault monitoring unit 6.
1 to 7n, the ATs from the transmission side header conversion units 41 to 4n
The M cell flow is selected and is output to the trunk line 302 as a result. ATM layer processing block of the relay node 100, that is, the reception side header conversion units 21 to 2n, the self-routing switch unit 3, or the transmission side header conversion unit 41
When a failure occurs in any one of .about.4n, the failure monitoring control unit 6 detects the failure and outputs a switching instruction to the selectors 71 to 7n.

The selectors 71 to 7n perform switching so as to selectively output the ATM cell stream from the receiving-side physical layer terminating units 11 to 1n in accordance with an instruction from the monitoring control unit 6, and perform transmission-side physical layer terminating units 51 to 5n. The ATM cell stream is sent to As a result, the cell flow on the trunk line 301 is output to the trunk line 302 at the physical layer level without being subjected to the ATM layer processing in the ATM node 100.

[0037]

As described above, according to the present invention, when an ATM function failure occurs in a relay node, the failure monitoring and control unit in the relay node bypasses the ATM layer function and controls only the physical layer. After the termination, it is possible to transmit to the destination node. At this time, the VPI / VCI used in the relay line between the source node and the relay node and in the relay line between the relay node and the destination node is previously matched. There is an effect that it is not necessary to rewrite the header conversion table managed by the header conversion unit at any of the sending and receiving nodes.

Further, since the bypass route is formed in the physical layer, the band at the time of bypass is always secured, and there is an effect that complicated processing for securing the band is not required.

Further, according to the present invention, when nodes are arranged in a bus-type or loop-type topology using a wiring system of an existing LAN, the complexity of the control required for the detour is reduced by an easy means called a bypass. There is also an effect that can be relieved.

[Brief description of the drawings]

FIG. 1 is a block diagram of an embodiment of the present invention.

FIG. 2A is a diagram illustrating an example of a reception-side header conversion table, and FIG. 2B is a diagram illustrating an example of a transmission-side header conversion table;

FIG. 3 is an ATM network configuration diagram in which the ATM nodes of FIG. 1 are cascade-connected to a bus topology.

FIG. 4 is a block diagram of a conventional ATM relay node.

[Explanation of symbols]

 11 to 1n Receiving-side physical layer terminating unit 21 to 2n Receiving-side header converting unit 3 Self-routing switch unit 41 to 4n Transmitting-side header converting unit 51 to 5n Transmitting-side physical layer terminating unit 6 Fault monitoring control unit 71 to 7n Selector 100 to 102 ATM node A1 to An input port B1 to Bn output port

Claims (3)

(57) [Claims] (1) A fixed one-to-one correspondence is established in advance in correspondence with each other.
A plurality of pairs output ports of which eclipse, the receiving side physical layer terminating unit as input the ATM line receiver signal output by performing a physical layer termination processing on each reception ATM cell from said input port, the receiving side physical Output by layer termination means
With the received ATM cells input as the input, the header part of each cell
Paired with the routing information in
Transmission routing information fixedly set in advance
ATM layer processing means for performing an ATM layer process for deriving an ATM cell to a corresponding output port in accordance with the transmission routing information, and an output ATM cell of the ATM layer processing means and a receiving physical layer terminating means. Selecting means for selectively deriving an output ATM cell;
A transmission-side physical layer termination unit that performs a physical layer termination process on an output ATM cell of the selection unit and outputs the output ATM cell to the output port; and a failure monitoring unit that monitors a failure of the ATM layer processing unit. And control means for controlling the selection means so as to select the output ATM cell from the receiving side physical layer termination means in the event of a failure.
Relay node. 2. The ATM layer processing means according to claim 1, wherein
Switching means for deriving the ATM cell to a corresponding output port which is fixedly associated with the input port to which the M cell is input in a one-to-one correspondence, wherein the selecting means is fixedly associated one-to-one with the input port An output ATM cell of said ATM layer processing means and an output ATM cell of said receiving side physical layer terminating means are alternately derived between the assigned corresponding output port. Item 2. The ATM relay node according to Item 1. 3. The ATM layer processing means according to claim 1, further comprising:
3. The ATM relay node according to claim 1, wherein the routing information is controlled such that the routing information of the M cell matches that of the input ATM cell.