JP2591901Y2 - Voltage monitoring circuit of power supply circuit - Google Patents

Voltage monitoring circuit of power supply circuit

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Publication number
JP2591901Y2
JP2591901Y2 JP1991040786U JP4078691U JP2591901Y2 JP 2591901 Y2 JP2591901 Y2 JP 2591901Y2 JP 1991040786 U JP1991040786 U JP 1991040786U JP 4078691 U JP4078691 U JP 4078691U JP 2591901 Y2 JP2591901 Y2 JP 2591901Y2
Authority
JP
Japan
Prior art keywords
voltage
comparator
input
power supply
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1991040786U
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Japanese (ja)
Other versions
JPH04126178U (en
Inventor
睦生 嶽山
Original Assignee
安藤電気株式会社
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Application filed by 安藤電気株式会社 filed Critical 安藤電気株式会社
Priority to JP1991040786U priority Critical patent/JP2591901Y2/en
Publication of JPH04126178U publication Critical patent/JPH04126178U/en
Application granted granted Critical
Publication of JP2591901Y2 publication Critical patent/JP2591901Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Measurement Of Current Or Voltage (AREA)
  • Emergency Protection Circuit Devices (AREA)

Description

【考案の詳細な説明】[Detailed description of the invention]

【0001】[0001]

【産業上の利用分野】この考案は、ICなどの被測定試
料(以下、DUTという。)に電源を供給する電源供給
回路の電圧異常を検出する電圧監視回路についてのもの
である。
BACKGROUND OF THE INVENTION The present invention relates to a voltage monitoring circuit for detecting a voltage abnormality in a power supply circuit for supplying power to a device under test (hereinafter, referred to as a DUT) such as an IC.

【0002】[0002]

【従来の技術】次に、従来技術による電圧監視回路の構
成を図2により説明する。図2の1はD/A変換器、2
は増幅器、3は電流増幅回路、4はDUT、9と10は
電源、13と14は加算器、15は減衰器、16と17
は比較器、18と19はANDゲートである。信号11
は外部制御信号の電源オン信号であり、信号12は外部
制御信号の電源オフ信号である。信号11・12はD/
A変換器1に入力され、D/A変換器1の出力Vaは増
幅器2でA倍され、電流増幅回路3で電流増幅され、D
UT4に電圧Voとして加えられる。減衰器15は電流
増幅回路3の出力電圧Voを1/Aにする。電源9は電
圧△Vを出力し、電源10は電圧−△Vを出力する。
2. Description of the Related Art Next, the configuration of a conventional voltage monitoring circuit will be described with reference to FIG. 2 is a D / A converter, 2
Is an amplifier, 3 is a current amplifier circuit, 4 is a DUT, 9 and 10 are power supplies, 13 and 14 are adders, 15 is an attenuator, 16 and 17
Is a comparator, and 18 and 19 are AND gates. Signal 11
Is a power on signal of the external control signal, and signal 12 is a power off signal of the external control signal. Signals 11 and 12 are D /
The output Va of the D / A converter 1 is input to the A converter 1 and the output Va of the D / A converter 1 is multiplied by A.
It is applied to UT4 as voltage Vo. The attenuator 15 reduces the output voltage Vo of the current amplification circuit 3 to 1 / A. The power supply 9 outputs a voltage ΔV, and the power supply 10 outputs a voltage −ΔV.

【0003】加算器13はD/A変換器1の出力Vaと
電源9の電圧△Vを入力とし、Va+△Vを出力する。
加算器14はD/A変換器1の出力Vaと電源10の電
圧−△Vを入力とし、Va−△Vを出力する。比較器1
6は加算器13の出力(Va+△V)を基準入力とし、
減衰器15の出力Vo/Aを比較入力とする。(Vo/
A)>(Va+△V)になると、比較器16は+入力に
比べて−入力のほうが大となるため、出力に「L」を出
す。ここで、VoはVaを増幅器2によってA倍し、電
流増幅回路3を通った電圧であり、通常Vo/AはVa
とほぼ同電圧となっている。比較器17は加算器14の
出力(Va−△V)を基準入力とし、減衰器15の出力
Vo/Aを比較入力とする。(Vo/A)<(Va−△
V)になると、比較器17は+入力に比べて−入力のほ
うが大となるため、出力に「L」を出す。
The adder 13 receives the output Va of the D / A converter 1 and the voltage ΔV of the power supply 9 and outputs Va + ΔV.
The adder 14 receives the output Va of the D / A converter 1 and the voltage −ΔV of the power supply 10 and outputs Va−ΔV. Comparator 1
6 uses the output (Va + 13V) of the adder 13 as a reference input,
The output Vo / A of the attenuator 15 is used as a comparison input. (Vo /
A)> (Va + △ V), the comparator 16 sets the + input
Compared with-input is larger, so output "L".
You. Here, Vo is multiplied by A by amplifier 2 to obtain a voltage Vo.
Is the voltage that has passed through the current amplifier 3, and Vo / A is usually Va
And almost the same voltage. The comparator 17 is
The output (Va−ΔV) is used as a reference input, and the output of the attenuator 15 is used.
Vo / A is set as a comparison input. (Vo / A) <(Va- △)
V), the comparator 17 has a negative input compared to a positive input.
The output becomes "L" because the size becomes large.

【0004】比較器16・17の出力はそれぞれAND
ゲート18・19に入力され、ANDゲート18・19
は信号11が「H」レベルの時動作状態となり、比較器
16・17の出力が「H」レベルの時に信号を出力す
る。したがって、図2の電源供給回路が電源オンになっ
ている間に、出力電圧VoがVo>A(Va+△V)ま
たはVo<A(Va−△V)の関係になると、電源供給
回路の異常を知らせる。
The outputs of the comparators 16 and 17 are respectively AND
Input to the gates 18 and 19, AND gates 18 and 19
Is activated when the signal 11 is at "H" level, and the comparator
A signal is output when the outputs 16 and 17 are at "H" level . Therefore, if the output voltage Vo becomes Vo> A (Va + ΔV) or Vo <A (Va−ΔV) while the power supply circuit of FIG. To inform.

【0005】[0005]

【考案が解決しようとする課題】図2によれば、D/A
変換器1の出力と電源供給回路の出力とを比較し、設定
値であるD/A変換器1の電圧に比べて電源供給回路の
出力が離れたときに異常検出をする。この電源供給回路
をパワ−オンさせるときには、設定値をD/A変換器1
に送り、信号11を送ることによりD/A変換器1がオ
ンし、増幅器2にアナログ値が送られて増幅され、DU
T4に設定電圧が供給される。しかし、信号11が送ら
れてから、D/A変換器1が設定値に達するまでの時間
と、電源供給回路の出力が設定値に達するまでの時間に
は差があり、この時間差による両者の電圧差を比較器1
6・17がとらえ、異常と検出する場合があるため、こ
の回路は出力電圧が設定値まで達しているときのみ有効
である。また、この電源供給回路がICテスタに実装さ
れ、電源が投入されている場合、信号11が論理「1」
になっているパワ−オン状態に比べて信号12が論理
「1」になっているパワ−オフ状態のほうが時間的に長
く、こちらの状態のときに電圧監視を行ったほうが有効
である。
[Problems to be solved by the invention] According to FIG.
Compare the output of the converter 1 with the output of the power supply circuit and set
Value of the power supply circuit compared to the voltage of the D / A converter 1
Detects abnormality when the output is separated. This power supply circuit
When the power is turned on, the set value is set to the D / A converter 1
And the D / A converter 1 is turned off by sending the signal 11.
The analog value is sent to the amplifier 2 and amplified.
The set voltage is supplied to T4. But signal 11 is sent
Time from when the D / A converter 1 reaches the set value
And the time until the output of the power supply circuit reaches the set value.
There is a difference, and the voltage difference between the two due to this time difference is
6.17 may be detected and detected as abnormal.
Is effective only when the output voltage reaches the set value
It is. This power supply circuit is mounted on an IC tester.
When the power is turned on, the signal 11 becomes a logical "1".
Signal 12 is more logical than the power-on state
The power-off state of "1" is longer in time
It is better to monitor the voltage in this state
It is.

【0006】この考案は、電源供給回路の出力電圧と電
源電圧の間を分圧して上限電圧と下限電圧を作り、この
上限電圧と下限電圧を比較器の入力とし、比較器の入力
にはスレッショルドレベルを決定し、過大入力を保護す
る定電圧ダイオードを接続し、信号12をイネーブル信
号としてANDゲートに入力することにより、信号12
が「H」レベルの時すなわち電源供給回路がオフの時の
電源供給回路の異常を検出する電圧監視回路の提供を目
的とする。
This invention divides the voltage between the output voltage of the power supply circuit and the power supply voltage to form an upper limit voltage and a lower limit voltage, and uses the upper limit voltage and the lower limit voltage as inputs of a comparator, and a threshold value is provided to the input of the comparator. Determine the level, connect a constant voltage diode to protect against excessive input, and enable signal 12
Input to the AND gate as the signal
It is an object of the present invention to provide a voltage monitoring circuit for detecting an abnormality of the power supply circuit when the power supply circuit is at the "H" level, that is, when the power supply circuit is off .

【0007】[0007]

【課題を解決するための手段】この目的を達成するた
め、この考案では、電源オンの第1の信号11と電源オ
フの第2の信号12を入力とするD/A変換器1と、D
/A変換器1の出力を増幅する増幅器2と、増幅器2の
出力を入力とする電流増幅回路3とで構成され、電流増
幅回路3の出力電圧Voを被測定試料4に供給する電源
供給回路に対し、出力電圧Voと第1の電源電圧Vcの
間を第1の抵抗5Aと第2の抵抗5Bで分圧し、分圧点
を比較器7の+入力端子に接続し、出力電圧Voと第2
の電源電圧−Vdの間を第3の抵抗5Cと第4の抵抗5
Dで分圧してその分圧点を比較器7の−入力端子に接続
し、第1の定電圧ダイオード6Aのアノードを比較器7
の+入力に接続するとともにカソードを接地し、第2の
定電圧ダイオード6Bのカソードを比較器7の−入力に
接続するとともにアノードを接地し、ANDゲート8は
比較器7の出力と第2の信号12を入力とし、第2の信
号12が「H」レベルの時動作状態となり、電源供給回
路の出力電圧Voを第1の抵抗5Aと第2の抵抗5Bお
よび第1の電源電圧Vcにより分圧した電圧である比較
器7の+入力電圧が、下限電圧として定電圧ダイオ−ド
6Bによって決定される比較器7の−入力クランプ電圧
よりも低くなったとき、または電源供給回路の出力電圧
Voを第3の抵抗5C第4の抵抗5Dおよび第2の電源
電圧−Vdにより分圧した比較器7の−入力電圧が、上
限電圧として定電圧ダイオ−ド6Aによって決定される
比較器7の+入力のクランプ電圧よりも高くなったとき
に比較器7の出力が「L」となり、ANDゲ−ト8を介
して、電源供給回路に出力電圧が設定されていないパワ
ーオフ状態のときの出力電圧異常を検出する
In order to achieve this object, the present invention provides a D / A converter 1 having a power-on first signal 11 and a power-off second signal 12 as inputs.
A power supply circuit that includes an amplifier 2 that amplifies the output of the A / A converter 1 and a current amplifier circuit 3 that receives the output of the amplifier 2 as an input, and supplies an output voltage Vo of the current amplifier circuit 3 to the sample 4 to be measured. In contrast, the first resistor 5A and the second resistor 5B divide the voltage between the output voltage Vo and the first power supply voltage Vc, connect the voltage dividing point to the + input terminal of the comparator 7, and Second
Between the third resistor 5C and the fourth resistor 5C.
D, the voltage dividing point is connected to the negative input terminal of the comparator 7, and the anode of the first constant voltage diode 6A is connected to the comparator 7
And the cathode of the second constant voltage diode 6B is connected to the-input of the comparator 7 and the anode is grounded. The AND gate 8 is connected to the output of the comparator 7 and the second When the signal 12 is input and the second signal 12 is at the “H” level, the operation state is set and the power supply
The output voltage Vo of the path is reduced by the first resistor 5A, the second resistor 5B and
And a voltage divided by the first power supply voltage Vc.
+ Input voltage of the unit 7 is a constant voltage diode as the lower limit voltage.
-Input clamp voltage of comparator 7 determined by 6B
Or lower than the output voltage of the power supply circuit
Vo is supplied to a third resistor 5C, a fourth resistor 5D, and a second power source.
The negative input voltage of the comparator 7 divided by the voltage −Vd is
The limit voltage is determined by the constant voltage diode 6A.
When it becomes higher than the clamp voltage of the + input of the comparator 7
Then, the output of the comparator 7 becomes "L", and the output voltage abnormality is detected via the AND gate 8 in the power-off state where the output voltage is not set in the power supply circuit.

【0008】[0008]

【作用】次に、この考案による電圧監視回路の構成を図
1により説明する。図1の5A〜5Dは抵抗、6Aと6
Bは定電圧ダイオード、7は比較器、8はANDゲート
であり、1〜4は図2と同じものである。電流増幅回路
3の出力電圧Voと電源電圧Vcの間を抵抗5A・5B
で分圧する。また、電流増幅回路3の出力電圧Voと電
源電圧Vdの間を抵抗5C・5Dで分圧する。抵抗5A
〜5Dの抵抗値をそれぞれRa・Rb・Rc・Rdとす
れば、比較器7の+端子の入力電圧Veと−端子の入力
電圧Vfは、次式で与えられる。電源電圧Vc・Vdは
比較器7の電源電圧として供給される。 Ve={Ra×Vc/(Ra+Rb)}+{Rb×Vo/(Ra+Rb)} …………(1) Vf={Rc×Vd/(Rc+Rd)}+{Rd×Vo/(Rc+Rd)} …………(2)
Next, the configuration of the voltage monitoring circuit according to the present invention will be described with reference to FIG. 5A to 5D are resistors, 6A and 6
B is a constant voltage diode, 7 is a comparator, 8 is an AND gate, and 1-4 are the same as those in FIG. Resistors 5A and 5B connect between the output voltage Vo of the current amplification circuit 3 and the power supply voltage Vc.
Partial pressure. Further, the voltage between the output voltage Vo of the current amplification circuit 3 and the power supply voltage Vd is divided by the resistors 5C and 5D. Resistance 5A
Assuming that the resistance values of .about.5D are Ra, Rb, Rc, and Rd, respectively, the input voltage Ve at the + terminal and the input voltage Vf at the-terminal of the comparator 7 are given by the following equations. The power supply voltages Vc and Vd are supplied as the power supply voltage of the comparator 7. Ve = {Ra × Vc / (Ra + Rb)} + {Rb × Vo / (Ra + Rb)} (1) Vf = {Rc × Vd / (Rc + Rd)} + {Rd × Vo / (Rc + Rd)} ............ (2)

【0009】比較器7の+入力には定電圧ダイオード6
Aのアノードが接続され、定電圧ダイオード6Aのカソ
ードは接地に接続される。比較器7の−入力には定電圧
ダイオード6Bのカソードが接続され、定電圧ダイオー
ド6Bのアノードは接地に接続される。また、定電圧ダ
イオード6Aのツェナー電圧をVg、順方向電圧をV
j、定電圧ダイオード6Bのツェナー電圧をVh、順方
向電圧をVkとすると、比較器7の+入力と−入力は定
電圧ダイオード6A・6Bにより次のようにクランプさ
れる。 −Vg<+入力電圧<Vj………………(3)−Vk<−入力電圧<Vh ………………(4)
The constant voltage diode 6 is connected to the + input of the comparator 7.
The anode of A is connected, and the cathode of constant voltage diode 6A is connected to ground. The negative input of the comparator 7 is connected to the cathode of the constant voltage diode 6B, and the anode of the constant voltage diode 6B is connected to the ground. The zener voltage of the constant voltage diode 6A is Vg, and the forward voltage is Vg.
Assuming that j is the zener voltage of the constant voltage diode 6B and Vk is the forward voltage, the + and-inputs of the comparator 7 are clamped by the constant voltage diodes 6A and 6B as follows. -Vg <+ input voltage <Vj ... (3) -Vk <-input voltage <Vh ... (4)

【0010】これから、電圧Vg・Vhによって出力電
圧Voによる比較器7の過大入力を保護し、電圧Vj・
Vkによって比較器7のスレッショルドレベルを決定す
る。このVg、Vj、Vh、Vkと各入力クランプ電圧
範囲の関係を図3に示す。図3において−Vg、−V
k、Vj、Vhの順に電圧が高くなる。比較器7から
「L」レベルが出力されるのは、比較器7の+入力電圧
が−入力クランプ電圧よりも低くなったとき、または比
較器7の−入力電圧が+入力クランプ電圧よりも高くな
ったときであるから、図3の斜線部の領域となる。つま
り、+入力電圧<−Vkのときと、−入力電圧>Vjの
ときである。この条件を式(1) 、式(2) に代入すると、
図1の上限電圧と下限電圧を決定する式が導かれる。 上限電圧={(Rc+Rd)/Rd}*{Vj−Rc*Vd/(Rc +Rd)}……………(5) 下限電圧=−(Ra+Rb)/Rb*{Vk+(Ra*Vc)/(Ra +Rb)}……………(6) 抵抗5A〜5Dと電圧Vc・Vdで決められる上限電
圧、下限電圧に対して、出力電圧VoをANDゲート8
により信号12が出ている間、監視する。
From this, the excessive input of the comparator 7 due to the output voltage Vo is protected by the voltages Vg · Vh,
The threshold level of the comparator 7 is determined by Vk. The Vg, Vj, Vh, Vk and each input clamp voltage
FIG. 3 shows the relationship between the ranges. In FIG. 3, -Vg, -V
The voltage increases in the order of k, Vj, and Vh. From comparator 7
The output of the “L” level is caused by the + input voltage of the comparator 7.
Is lower than the input clamp voltage, or
Comparator 7 is higher than the + input clamp voltage.
This is the area indicated by the hatched portion in FIG. Toes
When the input voltage is less than -Vk and when the input voltage is less than Vj,
It is time. Substituting this condition into equations (1) and (2) gives
An equation for determining the upper limit voltage and the lower limit voltage in FIG. 1 is derived. Upper limit voltage = {(Rc + Rd) / Rd} * {Vj-Rc * Vd / (Rc + Rd)} (5) Lower limit voltage =-(Ra + Rb) / Rb * @ Vk + (Ra * Vc) / ( Ra + Rb)} (6) The output voltage Vo is output to the AND gate 8 with respect to the upper limit voltage and the lower limit voltage determined by the resistors 5A to 5D and the voltages Vc and Vd.
Monitor while the signal 12 is output.

【0011】次に、図1の数値例を説明する。電源電圧
Vc=+15V、電源電圧Vd=−15V、ツェナー電圧V
g=Vh=12V、順方向電圧Vj=Vk=1Vとすれ
ば、式(3) 、(4) から比較器7の+入力と−入力は、 −12V<+入力電圧<1V −1V<−入力電圧<12V の範囲にクランプされ、比較器7の電源電圧を越えない
ように保護される。
Next, a numerical example of FIG. 1 will be described. Power supply voltage Vc = + 15V, power supply voltage Vd = -15V, Zener voltage V
Assuming that g = Vh = 12 V and forward voltage Vj = Vk = 1 V, from Equations (3) and (4), the + input and the − input of the comparator 7 are −12 V <+ input voltage <1 V−1 V <− The input voltage is clamped in the range of <12 V and is protected from exceeding the power supply voltage of the comparator 7.

【0012】例えば、信号12がオンのときの出力電圧
Voを±2Vの範囲で監視するときの条件を求める。抵
抗Rb=Rd=1kΩとし、式(5) 、(5) に数値を代入
して抵抗Ra、Rcを求めると、Ra=Rc=62.5Ωと
なる。これから、信号12がオンのとき、出力電圧Vo
<−2V、または出力電圧Vo>+2の場合にANDゲ
ート8から出力が出てくる。
For example, a condition for monitoring the output voltage Vo when the signal 12 is on in a range of ± 2 V is obtained. When the resistances Rb and Rc are obtained by substituting the numerical values into the equations (5) and (5) and setting the resistances Rb = Rd = 1 kΩ, Ra = Rc = 62.5Ω. From this, when the signal 12 is on, the output voltage Vo
An output is output from the AND gate 8 when <−2 V or the output voltage Vo> +2.

【0013】[0013]

【考案の効果】この考案によれば、電源供給回路の出力
電圧と電源電圧の間を分圧して上限電圧と下限電圧を作
り、この上限電圧と下限電圧を比較器の入力とし、比較
器の入力にはスレッショルドレベルを決定し、過大入力
を保護する定電圧ダイオードを接続し、信号12をイネ
ーブル信号としてANDゲートに入力することにより、
信号12が「H」レベルの時すなわち電源供給回路がオ
フの時の電源供給回路の異常を検出することができる。
According to the present invention, an upper limit voltage and a lower limit voltage are created by dividing the output voltage of the power supply circuit and the power supply voltage, and the upper limit voltage and the lower limit voltage are input to the comparator. determining the threshold level on the input, connect a constant voltage diode to protect excessive input, a signal 12 rice
Input to the AND gate as a cable signal ,
When the signal 12 is at "H" level, that is, when the power supply circuit is off.
The abnormality of the power supply circuit at the time of the power failure can be detected.

【図面の簡単な説明】[Brief description of the drawings]

【図1】この考案による電圧監視回路の構成図である。FIG. 1 is a configuration diagram of a voltage monitoring circuit according to the present invention.

【図2】従来技術による電圧監視回路の構成図である。FIG. 2 is a configuration diagram of a conventional voltage monitoring circuit.

【図3】この考案による電圧監視回路の監視範囲を表し
た図である。
FIG. 3 is a diagram showing a monitoring range of the voltage monitoring circuit according to the present invention.

【符号の説明】[Explanation of symbols]

1 D/A変換器 2 増幅器 3 電流増幅回路 4 DUT(被測定試料) 5A〜5D 抵抗器 6A・6B 定電圧ダイオード 7 比較器 8 ANDゲート Reference Signs List 1 D / A converter 2 Amplifier 3 Current amplifier circuit 4 DUT (sample to be measured) 5A to 5D Resistor 6A / 6B Constant voltage diode 7 Comparator 8 AND gate

Claims (1)

(57)【実用新案登録請求の範囲】(57) [Scope of request for utility model registration] 【請求項1】 電源オンの第1の信号(11)と電源オフの
第2の信号(12)を入力とするD/A変換器(1) と、D/
A変換器(1) の出力を増幅する増幅器(2) と、増幅器
(2) の出力を入力とする電流増幅回路(3) とで構成さ
れ、電流増幅回路(3) の出力電圧Voを被測定試料(4)
に供給する電源供給回路に対し、 出力電圧Voと第1の電源電圧Vcの間を第1の抵抗(5
A)と第2の抵抗(5B)で分圧し、分圧点を比較器(7) の+
入力端子に接続し、出力電圧Voと第2の電源電圧−V
dの間を第3の抵抗(5C)と第4の抵抗(5D)で分圧してそ
の分圧点を比較器(7) の−入力端子に接続し、第1の定
電圧ダイオード(6A)のアノードを比較器(7) の+入力に
接続するとともにカソードを接地し、第2の定電圧ダイ
オード(6B)のカソードを比較器(7) の−入力に接続する
とともにアノードを接地し、ANDゲート(8) は比較器
(7) の出力と第2の信号(12)を入力とし、第2の信号(1
2)が「H」レベルの時動作状態となり、電源供給回路の
出力電圧Voを第1の抵抗(5A)と第2の抵抗(5B)およ
び第1の電源電圧Vcにより分圧した電圧である比較器
(7) の+入力電圧が、下限電圧として定電圧ダイオ−ド
(6B)によって決定される比較器(7) の−入力クランプ電
圧よりも低くなったとき、または電源供給回路の出力電
圧Voを第3の抵抗(5C)第4の抵抗(5D)および第2の電
源電圧−Vdにより分圧した比較器(7) の−入力電圧
が、上限電圧として定電圧ダイオ−ド(6A)によって決定
される比較器(7) の+入力のクランプ電圧よりも高くな
ったときに比較器(7) の出力が「L」となり、ANDゲ
−ト(8) を介して、電源供給回路に出力電圧が設定され
ていないパワーオフ状態のときの出力電圧異常を検出す
ることを特徴とする電源供給回路の電圧監視回路。
1. A D / A converter (1) having a power-on first signal (11) and a power-off second signal (12) as inputs,
An amplifier (2) for amplifying the output of the A converter (1), and an amplifier
And a current amplifier circuit (3) that receives the output of (2) as an input, and outputs the output voltage Vo of the current amplifier circuit (3) to the sample under test (4).
The first resistor (5) is connected between the output voltage Vo and the first power supply voltage Vc.
A) and the second resistor (5B) to divide the voltage, and determine the voltage dividing point by the + of the comparator (7).
Connected to the input terminal, the output voltage Vo and the second power supply voltage -V
d is divided by a third resistor (5C) and a fourth resistor (5D), and the voltage dividing point is connected to the negative input terminal of the comparator (7), and the first constant voltage diode (6A) Is connected to the + input of the comparator (7) and the cathode is grounded. The cathode of the second constant voltage diode (6B) is connected to the-input of the comparator (7) and the anode is grounded. Gate (8) is a comparator
The output of (7) and the second signal (12) are input and the second signal (1
2) is at the “H” level, it is in the operating state and the power supply circuit
The output voltage Vo is divided into a first resistor (5A), a second resistor (5B) and
And a comparator divided by the first power supply voltage Vc.
The (+) input voltage of (7) is a constant voltage diode as the lower limit voltage.
-Input clamp voltage of comparator (7) determined by (6B)
Voltage or the output power of the power supply circuit.
The voltage Vo is supplied to the third resistor (5C), the fourth resistor (5D) and the second voltage.
-Input voltage of comparator (7) divided by source voltage -Vd
Is determined by the constant voltage diode (6A) as the upper limit voltage.
Higher than the clamp voltage of the + input of the comparator (7)
The output of the comparator (7) becomes "L" when the power supply circuit is not powered and no output voltage is set in the power supply circuit via the AND gate (8). A voltage monitoring circuit for a power supply circuit.
JP1991040786U 1991-05-07 1991-05-07 Voltage monitoring circuit of power supply circuit Expired - Lifetime JP2591901Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1991040786U JP2591901Y2 (en) 1991-05-07 1991-05-07 Voltage monitoring circuit of power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1991040786U JP2591901Y2 (en) 1991-05-07 1991-05-07 Voltage monitoring circuit of power supply circuit

Publications (2)

Publication Number Publication Date
JPH04126178U JPH04126178U (en) 1992-11-17
JP2591901Y2 true JP2591901Y2 (en) 1999-03-10

Family

ID=31921750

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1991040786U Expired - Lifetime JP2591901Y2 (en) 1991-05-07 1991-05-07 Voltage monitoring circuit of power supply circuit

Country Status (1)

Country Link
JP (1) JP2591901Y2 (en)

Also Published As

Publication number Publication date
JPH04126178U (en) 1992-11-17

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