JP2580734B2 - Virtual memory address space access control method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Purpose] Outline Field of Industrial Application Conventional Techniques and Problems to be Solved by the Invention Means for Solving the Problems Action Embodiment Effects of the Invention [Summary] Multiple virtual address spaces The existing data is determined by the number of the base register (BR) of the main memory operand of the instruction, and the virtual address space is determined and referred to. Regarding the detection method, a virtual address space that specifies a virtual address space where the storage area change event record should be detected is intended to speed up data processing by detecting the storage area change event record and operand overlap at high speed. A first register for holding an address space identification number (STPER-ASID) and a base register for storing an effective address of a main memory operand of an instruction; (BR), the index register (XR), the number of the base register (BR) used for obtaining from the displacement (D), or the contents of the register guided by the number of the base register (BR) Means for determining a virtual address space number (A-ARN) to be provided, and a register (AR) for controlling access to the plurality of virtual address spaces
A second register (ASID) holding a virtual address space identification number designating the virtual address space to be accessed for each
R) and the base register (B) from the means for determining the virtual address space number (A-ARN) to be accessed.
R), the second register (ASIDR) is searched for a virtual address space identification number (A-ASID) accessed by the instruction, and compared with the contents of the first register. A third register for holding a virtual address space identification number (A-ASID) searched at the time of detecting the storage area change event record or accessing the second operand of the instruction for accessing the plurality of virtual address spaces. Provided,
The contents of the third register and the first accessed
Means is provided for comparing the virtual address space identification number (A-ASID) retrieved at the time of accessing the operand, and when a mismatch is obtained by the comparing means, a check for operand overlap is suppressed.

[Industrial applications]

According to the present invention, data existing in a plurality of virtual address spaces is stored in a base register (BR) of a main storage operand of an instruction.
And a method of detecting a storage area change event and detecting an operand overlap condition in an information processing apparatus of a virtual storage system which determines and refers to the virtual address space according to the number.

A recent demand for information processing apparatuses is an increase in the amount of data to be processed. In particular, in a database system, the data amount has been remarkably increased.

With this demand, it has become necessary to directly access data in a plurality of virtual address spaces from a user program beyond the limit of the address space in the conventional virtual storage device, and an architecture that makes this possible. Has been suggested.

On the other hand, conventionally, there is a function called storage area change event recording (store PER) for the purpose of monitoring the virtual storage space. However, the function only monitors a single virtual storage space (detects store access). .

Conventionally, in an instruction for operating two operands on the main memory, for example, in a transfer instruction, if there is an overlap between the two operands, this is detected, and
It is specified so that it looks as if it has been processed for one byte.

However, in an information processing apparatus having an architecture for directly accessing data in a plurality of virtual address spaces from a user program, due to the access mechanism, the storage change event record ( There is a problem that it takes a long time to detect the “store PER” or that the “overlap of the operands” cannot be detected. Even in such an environment, the storage area change event record (the store PER) or “the operand It has become necessary to be able to detect "overlap" quickly and reliably.

[Problems to be solved by conventional technology and invention]

3A and 3B are diagrams illustrating a conventional method of detecting a storage area change event record, in which FIGS. 3A and 3B are diagrams illustrating an access method to a main storage, and FIG. FIG. 4 is a diagram showing a recording detection method, and FIG. 4 is a diagram for explaining a conventional operand overlap detection method.

In an information processing apparatus using a conventional virtual storage method,
(A) As shown in the figure, the operating system (O
Only access to data in a single address space specified by a control register (CRO) 10 under the control of S) was allowed.

Therefore, in order to refer to data in a plurality of virtual address spaces, it is necessary to replace the contents of the control register (CRO) 10, which is under the control of the operating system (OS).

In such a situation, the user program is not allowed to directly process data in a plurality of virtual address spaces.

However, as described above, in recent data processing, especially in the field of database systems, there is a strong demand for expansion of the virtual address space, and the address space determined directly from the user program, for example, by the number of the base register (BR) 20 Access is now allowed,
This has been required to be processed at a high speed as in the case of the single virtual address space.

FIG. 1B shows an example of the configuration of a control circuit for allowing a user program to directly access a plurality of virtual address spaces.

That is, for each of the plurality of address spaces used by the user program, the segment table (STO
~) 30 and prepare the segmet table (STO ~) 30
A plurality of segment table origins (STOs) 25b, which are pointers to the user program, and which of them is used is determined by the number of the base register (BR) 20 used by the corresponding instruction of the user program.

Specifically, as shown in (b), the address space control register (ARO-) 25 is selected according to the number of the base register (BR) 20, and the selected address space control register (ARO-) 25 is selected. According to the segment table origin (STO) 25b set in the segment table (ST) for accessing a specific virtual address space,
O ~) 30 can be selected.

Alternatively, according to the number of the base register (BR) 20,
Search for another register with information indicating which segment table origin (STO) 25b to use, and check that the contents of that register are which segment table origin (STO) 25b
An indirect way of indicating whether to use is also possible.

(C) Figure shows conventional storage change event record (store PER)
FIG. 3 is a diagram showing an example of a circuit for detecting a signal.

The control registers (CR10, CR1
1) For example, the storage area change event record (store PE
R), the address of the boundary of the main storage area to be set is set.

Then, in the operand address register (OAR) 17,
The operand address of a store instruction to be subjected to the storage area change event record (hereinafter, sometimes referred to as store PER) is set, and the comparator 18 stores the operand address in the control register (CR10, CR11) 15,16. Is checked to see if it is within the boundary address of the store PER, and if it is detected that it is within the boundary address of the store PER, an enable signal for the store PER (ST-PER) is detected.
−ENB) is output.

Therefore, for the plurality of virtual address spaces described above,
In order to detect the store PER when an access is made from the user program, the store instruction detected by the detection circuit shown in FIG. ST-PER-ENB), interpreted in a specific “interrupt hydra” of the operating system (OS), recognizes the virtual address space of the store address, compares it with the virtual address space to be monitored, I was doing PER.

For this reason, if the store PER is performed in an architecture information processing apparatus in which a user program can directly access a plurality of virtual address spaces, it takes time to detect the store PER, and overhead in the operating system (OS) is required. There was a problem that it became large.

FIG. 4 shows that when an instruction for operating two operands on the main memory (for example, a data transfer instruction for the second operand and the first operand) has an operand overlap, this is detected and one byte is detected. This shows a conventional overlap detection method when it is necessary to make it appear as if it were addressed (for example, in the case of data transfer to the second operand and the first operand, where the second operand address <the first operand address). FIG.

In the conventional method, as shown, the logical address of the first operand set in the first operand address register (OPAR1) 50 and the second address set in the second operand address register (OPAR2) 51 as shown in FIG. The comparator 53 compares the logical addresses of the two operands with each other to detect the overlap.

Therefore, in an information processing apparatus having an architecture in which a user program can directly access a plurality of virtual address spaces, even if a store access to a different virtual address space has the same logical address, for example, the operands are originally Although the overlap processing is prohibited and normal store access can be performed, the above-described conventional overlap detection method has a problem that a coincidence signal is output and operand overlap processing is performed.

SUMMARY OF THE INVENTION In view of the above-mentioned conventional disadvantages, the present invention provides an information processing apparatus of a virtual memory system that determines and refers to data existing in a plurality of virtual address spaces according to a base register number of a main memory operand of an instruction. In the method of detecting the storage area change event record and the operand overlap condition, the user program directly
Focusing on the fact that there is an access mechanism for a virtual address space that can access the plurality of virtual address spaces,
The storage area change event record (store
PER) and an operand overlap detection method.

[Means for solving the problem]

The above problem is solved by a virtual memory address space access control system configured as follows.

(1) Data existing in a plurality of virtual address spaces is
A virtual address designating a virtual address space for detecting a storage area change event record in an information processing apparatus of a virtual storage system which determines and refers to the virtual address space based on the number of a base register (BR) of a main memory operand of an instruction. A first register for holding a space identification number (STPER-ASID), and the above-mentioned register used for obtaining an effective address of a main storage operand of an instruction from a base register (BR), an index register (XR), and a displacement (D). Number of base register (BR) or base register (BR)
Means for determining a virtual address space number (A-ARN) to be accessed in accordance with the contents of a register led by the number of the virtual address space; and a register (AR) for controlling access to the plurality of virtual address spaces. The second holding the virtual address space identification number specifying the virtual address space to be
And a virtual address space number (A-AR) to be accessed.
Using the number of the base register (BR) from the means for determining N), searching the second register (ASIDR),
The virtual address space identification number (A
-ASID) (), and is compared with the first register by a comparator to detect a storage area change event record.

(2) a third register for holding a virtual address space identification number (A-ASID) () searched at the time of accessing the second operand of the instruction for accessing the plurality of virtual address spaces; And a means for comparing the virtual address space identification number (A-ASID) () searched at the time of accessing the first operand to be subsequently accessed, and when the comparison means finds a mismatch, the operand overflow is detected. It is configured to suppress the lap check.

[Action]

That is, according to the present invention, information of a virtual memory system in which data existing in a plurality of virtual address spaces is determined by referring to the number of a base register (BR) of a main memory operand of an instruction and the virtual address space is referred to. In a method of detecting a storage area change event record and an operand overlap condition in a processing device, the information processing device originally uses a base register (BR) to access the virtual address space by the operand of a store instruction. Focusing on the virtual address space identification number accessed by the instruction and the mechanism (access control register to virtual address space) (AR) that can recognize the segment table origin (STO), holds the virtual address space identification number The register (ASIDR) that performs the access is changed to the base register (BR) number (A- ARN) and the identification number (A-ASI) of the virtual address space accessed by the instruction.
D), and the identification number (A-ASID) of the recognized virtual address space and the identification number (STPER-ASTD) of the virtual address space to be monitored in the information processing device.
And if they match, the matching signal (STPER-E
By extracting the NB) at a specific pipeline stage of the information processing apparatus, the store access of the instruction can be recorded (store PER).

Also, the identification number (A) of the virtual address space of the second operand accessed by a certain instruction (for example, a data transfer instruction)
-ASID), for example, when it is detected in the A stage of the pipeline, the identification number (A-ASID) of the virtual address space of the second operand is recorded, and then the virtual address of the first operand input Space identification number (A-
Compared with ASID), when a mismatch signal is obtained, the virtual address space of the store access will be different, so that the above-described function of suppressing the operand overlap detection is performed.

Because of this operation, the storage change event record (store PER) and the detection of operand overlap can be performed at high speed.
And there is an effect that it can be performed reliably.

〔Example〕

 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a diagram showing an embodiment of the present invention, and FIG. 2 is a time chart of an operation of detecting an operand overlap according to the present invention, in which a second register (a virtual address space identification number) is held. ASIDR) 25a is a virtual address identification number (A-ASID) of an address to be stored, which is retrieved by a base instruction (BR) number (A-ARN) of a store instruction.
A first register (SIPER-ASID) 3 for holding a virtual address space identification number to be monitored, and a virtual address identification number (A- ASID) third
And a means 6 for comparing the register 5 with the virtual address identification number (A-ASID) of the first operand address is a means necessary to carry out the present invention. Note that the same reference numerals indicate the same object throughout the drawings.

Hereinafter, the virtual memory address space access control method of the present invention will be described with reference to FIGS.

In the present embodiment, for example, an information processing apparatus that operates in a pipeline processed in the D (decode) stage to the W (write operation result) stage as shown in FIG. 2 is taken as an example. Needless to say, the present invention is not limited to this.

First, the base used when obtaining the effective address of the main storage operand of the store instruction to be subjected to the storage area change event record (store PER) from the base register (BR), index register (XR), and displacement (D). A virtual address space identification number (A-AR) to be accessed according to the register (BR) number or the contents of the register led by the base register (BR) number
From the means for determining N) {see FIG. 3 (b)}, the virtual address space identification number register (ASID) is obtained by the base register number (A-ARN) 2 of the store access output at the A stage of the pipeline. Search the contents of 25a,
The virtual address space identification number (A-ASID) to be accessed by the store instruction is identified, and the virtual address space identification number to be monitored (STPER-ASID) set in advance by the operating system (OS) is held. The first register 3 is compared with the first register 3 by a comparator 4, and when a coincidence signal (A-STPER-ENB) is obtained, each stage of the pipeline flows as shown in FIG.
At the B stage, it becomes a coincidence signal (B-STPER-ENB) and is sent to a store PER detector (not shown).

Next, an operand overlap detection method in the case where the instruction executed by the information processing device is an instruction for transferring data from the second operand to the first operand will be described.

The virtual address space identification number (A-ASID) output by the main memory access by the second operand of the data transfer instruction is held in the third register 5 and subsequently input to the pipeline. The virtual address space identification number (A-ASID) output by the main memory access by the first operand is compared by a comparator 6 for detecting an operand overlap. INH-OVLP-CHK "is output, and even if a coincidence signal is output by the conventional operand overlap detection circuit described with reference to FIG. 3C, the two operands are processed as if they did not overlap. To work. << Refer to the operation time chart of FIG. 2 >> As described above, according to the present invention, data present in a plurality of virtual address spaces is stored in the virtual address space by the number of the base register (BR) of the main memory operand of the instruction. In a method of detecting a storage area change event and detecting an operand overlap condition in a virtual storage type information processing device to be determined and referred to, when a virtual address space is originally accessed by a store instruction operand, a base register (BR) is used. Paying attention to the fact that there is a virtual address space identification number to be accessed by the instruction and a mechanism (access control register to virtual address space) (AR) that can recognize the segment table origin (STO). Register holding the number (ASID
R) with the base register (BR) number of the access instruction to recognize the identification number (A-ASID) of the virtual address space accessed by the instruction, and to identify the identified virtual address space identification number (A-ASID). A-ASID) is compared with the identification number (STPER-ASTD) of the virtual address space to be monitored in the information processing device, and if they match, the match signal (STPER-ENB) is compared with the store PER detection signal. When the identification number (A-ASID) of the virtual address space of the second operand accessed by the data transfer instruction is detected, for example, at the stage A of the pipeline, the identification number (A-ASID) of the virtual address space is detected. -ASID) is compared with the identification number (A-ASID) of the virtual address space of the subsequently input first operand, and when a mismatch signal is obtained, the virtual address of the store access is obtained. Since the spaces are different, the feature is that the operands are processed as if they did not overlap.

〔The invention's effect〕

As described above in detail, in the virtual memory address space access control method of the present invention, data existing in a plurality of virtual address spaces is assigned to the virtual memory by the number of the base register (BR) of the main memory operand of the instruction. A virtual address specifying a virtual address space in which a storage area change event record is to be detected in order to detect a storage area change event record and an operand overlap condition in an information processing apparatus of a virtual storage system which determines and refers to an address space. A first register for holding a space identification number (STPER-ASID) and a base register (B
R), the index register (XR), the number of the base register (BR) used for obtaining from the displacement (D), or the contents of the register guided by the number of the base register (BR) A means for determining a virtual address space number (A-ARN) and, for each register (AR) controlling access to the plurality of virtual address spaces, holding an address space identification number designating the virtual address space to be accessed. A second register (ASIDR) to be accessed, and using the number of the base register (BR) from the means for determining the virtual address space number (A-ARN) to be accessed, the second register (ASIDR) To retrieve the virtual address space identification number (A-ASID) accessed by the instruction, compare it with the contents of the first register, and store The virtual address space identification number (A) searched at the time of detecting the area change event record or accessing the second operand of an instruction (for example, a data transfer instruction) for accessing the plurality of virtual address spaces.
Means for comparing the contents of the third register with a virtual address space identification number (A-ASID) retrieved at the time of accessing the first operand subsequently accessed. Is provided, and when a mismatch is obtained by the comparing means, the check of the operand overlap is suppressed, so that the storage area change event record (store PER) and the detection of the operand overlap can be performed at high speed. In addition, there is an effect that data processing can be performed at high speed.

[Brief description of the drawings]

FIG. 1 is a diagram showing an embodiment of the present invention, FIG. 2 is a time chart of an operation of detecting an operand overlap of the present invention, FIG. 3 is a diagram for explaining a conventional method of detecting a storage area change event record, FIG. 4 is a diagram for explaining a conventional operand overlap detection method. In the drawing, 25a is a virtual address space identification number register or a second address.
Is a virtual address space number to be accessed, 2 is a base register (BR) number, or the contents of a register (A-ARN) guided by the base register (BR) number, and 3 is a monitor. Virtual address space identification number (STPER-A
SID) or the first register, 4 and 6 are comparators, 5 is the third register or a register holding the virtual address space identification number of the second operand, 10 is the control register (CRO), 15, 16 Is the control register (CR10, 11), 17 is the operand address register (OAR), 20 is the base register (BR), 25 is the register that controls access to the virtual address space (AR), and 25b is the segment table origin (STO) , 30 is a segment table (STO ~), 50 is a first operand address register (OPAR1), 51 is a second operand address register (OPAR2), 53 is a comparator, is a virtual access space identification number (A) to which the instruction accesses. −ASID) and.

Claims (2)

(57) [Claims] A base register (BR) of a main storage operand of an instruction stores data existing in a plurality of virtual address spaces.
The virtual address space identification number (STPER-ASID) that specifies the virtual address space in which the storage area change event record is to be detected is stored in the information processing device of the virtual storage system that determines and refers to the virtual address space by the number of the virtual address space. The first register (3) to be executed, and the number of the base register (BR) used to determine the effective address of the main storage operand of the instruction from the base register (BR), index register (XR), and displacement (D) Or means for determining a virtual address space number (A-ARN) (2) to be accessed based on the contents of a register indexed by the number of the base register (BR); A virtual address space identification number that specifies the virtual address space to be accessed is stored for each register (AR) 25 that controls access. The second to
(ASIDR) (25a), and the virtual address space number to be accessed (A-ARN)
The second register (ASIDR) (25a) is searched using the number of the base register (BR) from the means for determining (2), and the virtual address space identification number (A-ASID) accessed by the instruction is searched. (3) A virtual memory address space access control method wherein (1) is searched and compared with the first register (3) and the comparator (4) to detect a storage area change event record. 2. A third register (5) for holding a virtual address space identification number (A-ASID) () retrieved at the time of accessing a second operand of an instruction for accessing the plurality of virtual address spaces, Means (6) for comparing the contents of the third register (5) with the virtual address space identification number (A-ASID) () searched at the time of accessing the subsequently accessed first operand; 2. The virtual memory address space access control method according to claim 1, wherein when a mismatch is obtained by the means (6), the check of the operand overlap is suppressed.