JP2570804B2 - Deblocking circuit - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a deblocking circuit, and in particular, to a TACAN
(Tactical Air Navigation System) / DME (Distannce
The present invention relates to a deblocking circuit that suppresses blocking that occurs based on the operation of an AGC circuit in a linear amplifier (AGC amplifier) of an airborne receiver (hereinafter simply referred to as a receiver) as a transceiver.

[Prior Art] FIG. 2 is a block diagram showing a main part of a receiving circuit of a conventional TACAN / DME receiver.

In the figure, reference numerals 1 and 2 denote received signal 101 as a two-stage amplifier circuit.
3 is a detection circuit that performs envelope detection on the amplified reception signal output from the linear amplifier 2, and 4 is a decoder circuit that extracts a transmission signal based on a pair pulse from the detection output of the detection circuit 3 and outputs it as a decode signal 401. , 5
Receives the decode signal 401, calculates the azimuth and distance, outputs an azimuth distance output signal 501, and outputs an azimuth distance lock signal 502 indicating that the azimuth distance output signal 501 is locked to the reception signal. Circuit.

Reference numeral 6 denotes a peak hold circuit that receives the decode signal 401 and retains its peak value. Reference numeral 7 denotes an AGC circuit. The AGC circuit 7 performs linear amplifiers 1 and 2 based on the peak value retained by the peak hold circuit 6. AGC voltage for properly controlling the gain of the AGC is generated.

As described above, conventionally, the AGC is used in the TACAN / DME receiver.
To perform the operation, a peak hold circuit 6 and an AGC circuit 7
Formed a closed loop.

By the way, in such a configuration, when the received signal is at a very high level and the two linear amplifiers are in a saturated amplification state, the output of the detection circuit is continuously at a high level, and the decoder circuit does not output the decoded signal. Then
The peak hold circuit outputs the lowest level signal because the input of the decode signal is interrupted. Then, AGC
The circuit is AGC such that the linear amplifier is in the maximum gain state.
Since the voltage is output, the linear amplifier deviates from a normal reception state, and thereafter, since the tendency continues unilaterally, it is impossible to automatically return to the normal state.

That is, there is a case where the terminal is put in the reception blocking state.

[Problems to be Solved] The conventional TACAN / DME receiver described above does not include a deblocking circuit, and thus cannot return to a normal state once it has fallen into the reception blocking state. Was.

The present invention has been made in view of the above problems,
An object of the present invention is to provide a deblocking circuit capable of automatically releasing a deblocking state.

Means for Solving the Problems In order to achieve the above object, a deblocking circuit according to the present invention is an AGC that amplifies a received signal in a deblocking circuit in an airborne receiver of a TACAN / DME transceiver.
An amplifier, an amplified reception signal output from the AGC amplifier is envelope-detected and output, and in a blocking state, a detection circuit whose detection output is continuously at a high level, and an input signal from the detection circuit. A decoder circuit that detects and passes only pulse pairs at regular time intervals from the pulse group and outputs the decoded signal, and an azimuth and distance calculation circuit that calculates azimuth and distance information based on the decoded signal from the decoder circuit. A lock monitor circuit that monitors an azimuth distance lock signal output from the azimuth distance calculation circuit and determines whether the azimuth distance lock signal has been locked for a predetermined time or more; If it is determined that the lock signal has not been locked for a certain period of time, select the detection circuit output signal for a certain period A switch circuit for selecting the decode signal when it is determined to be in the locked state, and a signal from the switch circuit. The switch circuit receives the decode signal when the switch circuit receives the decode signal. In order to create a voltage corresponding to the level of the pulse pair at regular time intervals, the peak value is output, and when the switch circuit selects the detection circuit output signal, the peak value of the detection circuit output signal is output. , And a peak hold circuit for setting an AGC voltage for the AGC amplifier.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a deblocking circuit according to one embodiment of the present invention. Note that portions common or corresponding to the conventional example are denoted by the same reference numerals.

In the figure, reference numeral 8 denotes lock monitor circuits 8 and 9 for monitoring the azimuth distance signal output from the azimuth distance calculation circuit 5, and switches 9 controlled by the lock monitor circuit 8.

In the above configuration, the lock monitor circuit 8 constantly monitors the azimuth distance lock signal 502. Then, a switch control signal 801 for controlling the switch 9 is output.

Specifically, a normal state, that is, an azimuth distance lock signal
When 502 is in the locked state, the decoding signal 401 is selected as an input.

However, an abnormal condition, that is, the azimuth distance lock signal 502
Is not locked for a certain period of time, the switch 9 is caused to select the detection signal 301 for a certain period of time, and then
Again, the code signal 401 is selected.

The deblocking circuit having such a configuration operates as follows.

The received signal 101 in TACAN / DME is a burst pulse of less than 1% dirty, and one signal is transmitted from the ground TACAN station as a pair of pulses at a predetermined time interval.
The onboard TACAN device searches for a pair of pulses at regular intervals from the received signal. Only when this pair is found, the decoder circuit 4 determines that there is a received signal and outputs it to the azimuth distance calculation circuit 5. That is, the decoder circuit 4 detects and passes only pulse pairs (paired pulses) at regular time intervals from the group of pulses in the input signal from the detection circuit 3, but does not pass other pulses because it is determined to be noise. .

The peak hold circuit 6 inputs the decode signal 401 and outputs its peak value in order to generate an AGC voltage corresponding to the level of a desired wave (pulse pair at regular time intervals) in the received signal 101. This is because the decode signal 401 is a pulse group having a low dirty level, but the AGC voltage needs a continuous level.

Here, consider the case where blocking occurs. When blocking occurs, the received signal is a group of pulses, but the AGC
Since the gain of the amplifier is abnormally high, the output signal of the AGC amplifier is not a pulse group but a continuous wave due to the saturation of the amplifier.

For this reason, the output of the detection circuit 3 also has no pulse and is in a state of a high DC level. When such a signal is input to the decoder circuit 4, the decoder circuit 4 determines that there are no pulses at regular intervals, and no decode signal is output. Since this state is the same as the no-input state, the AGC circuit 7 outputs the AGC voltage so that the AGC amplifier has the maximum gain, so that the AGC amplifier becomes more and more saturated, and the output becomes a continuous wave, and the normal operation is performed. Will not return.

As described above, the decode signal 401 input to the peak hold circuit 6 has a pulse in a normal state, but has a GND level in a blocking state. That is, since the state becomes the same as the non-input state, the information that the linear amplifier 2 is saturated is not included. However, the detected signal 30
1 is high level when blocking (G
ND level), and information on saturation of the linear amplifier 2 is included. Therefore, if this information is monitored by any means, it is possible to escape from the blocking state.

Therefore, when blocking has occurred, AGC is performed by the detection signal 301 indicating the power value of the received signal. That is, in the blocking state, the detection signal 301 is at a high level as described above.
The AGC circuit 7 to which the detection signal 301 is input via the peak hold circuit 6 tries to reduce the gain of the linear amplifiers 1 and 2 and lowers the AGC voltage so as to lower the level of the detection signal 301.
Output 701.

As a result, the level of the detection signal 301 decreases, the decoder circuit 4 operates normally, and the azimuth distance calculation circuit 5 can lock to the reception signal.

 Therefore, the blocking state is also eliminated.

Then, after a lapse of a predetermined time (time sufficient for the AGC circuit 7 to eliminate the blocking state due to the input of the detection signal 301), the signal is returned to the AGC system of the regular TACAN / DME receiver. That is, the input of the peak hold circuit 6 is changed to the decoder signal 401 by the switch 9.

As described above, it is possible to automatically release from the blocking state.

Here, the azimuth distance calculation circuit 5 receives the decode signal 401 and calculates the TACAN azimuth and the DACAN distance. That is, the azimuth and distance information included in the decode signal 401 is extracted, and the azimuth and distance value are obtained by a certain algorithm. Then, a state in which the value is obtained and the determined azimuth distance signal output 501 can be output is referred to as an azimuth distance lock state. if,
If the level of the received signal 101 is extremely low and the S / N is poor, azimuth distance information cannot be extracted. That is, it is unlocked. Also, during the blocking, the decoded signal 401 is unlocked because it has no signal.

The lock monitor circuit 8 monitors the azimuth distance lock signal 502, and if the lock is not performed for a certain period of time (eg, 10 seconds), it is determined that the level of the received signal 101 is extremely low or a blocking state. The switch 9 is turned on by the switch control signal 801 for a predetermined time (eg, 5 seconds).
01 is input to the peak hold circuit 6. If the signal is in the blocking state, the detection signal 301 is at a high level, so that the AGC voltage lowers the gain of the linear amplifier and can escape from the blocking state.

Although it is not in the blocking state, the azimuth distance signal 50
When 2 is not in the locked state, that is, when there is no received signal (including a low level), the above-described operation is performed.

However, the input of the peak hold circuit 6 is returned to the decode signal 401 after the detection signal 301 for a certain period of time, so that the function of the TACAN / DME receiver is not impaired at all.

As described above, in the present embodiment, the AGC circuit of the TACAN / DME receiver includes a lock monitor circuit that monitors an azimuth distance lock signal indicating a lock state for a reception signal of the azimuth distance calculation circuit, and a decode signal output from the decoder circuit. And a detection signal output from the detection circuit, and a switch that outputs only one of the two input signals to the peak hold circuit according to a switch control signal output from the lock monitor circuit.

[Effects of the Invention] As described above, the present invention detects the occurrence of a blocking state and detects the blocking state,
By controlling the gain so as to match the detection signal of the received signal, it is possible to provide a deblocking circuit capable of automatically stopping the blocking.

[Brief description of the drawings]

FIG. 1 is a block diagram of a main part of a TACAN / DME receiver using a deblocking circuit according to one embodiment of the present invention.
The figure shows a conventional TACA that does not use a deblocking circuit.
FIG. 2 is a block diagram of a main part of an N / DME receiver. 1,2: Linear amplifier 3: Detection circuit 4: Decoder circuit 5: Azimuth distance calculation circuit 6: Peak hold circuit 7: AGC circuit 8: Lock monitor circuit 9: Switch

Claims (1)

(57) [Claims] In a deblocking circuit in an aircraft receiver of a TACAN / DME transceiver, an AGC amplifier for amplifying a received signal, an envelope detection of the amplified received signal output from the AGC amplifier, and a blocking state. In the case of, a detection circuit whose detection output is continuously at a high level, and only a pair of pulses at regular time intervals from the group of pulses in the input signal from the detection circuit are detected and passed, and output as a decode signal. An azimuth distance calculation circuit for calculating azimuth and distance information based on a decode signal from the decoder circuit; and monitoring an azimuth distance lock signal output by the azimuth distance calculation circuit. A lock monitor circuit that determines whether or not the lock state has been maintained for a certain period of time or more. A switch for selecting a detection circuit output signal for a fixed time when it is determined that the distance lock signal has not been locked for a fixed time or more, and for selecting the decode signal when it is determined that the lock signal has been locked. A signal from the switch circuit is input, and when the switch circuit receives the decode signal, the peak value of the signal is generated in order to generate a voltage corresponding to the level of the pulse pair at regular time intervals in the received signal. And a peak hold circuit that outputs a peak value of the detection circuit output signal when the switch circuit selects the detection circuit output signal, and sets the peak value as an AGC voltage for the AGC amplifier. Deblocking circuit.