JP2560086B2 - Noise shaping quantizer - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a noise shaping quantizer capable of increasing the speed and accuracy of a multistage quantizer.

[Conventional technology]

The Δ-Σ quantizer which can be multistaged is described in JP-A-62-171321 (first example) and JP-A-61-192127 (second example). Of these, the first example relates to the A / D converter and the second example relates to the D / A converter.
Since the example is technically included in the first example, the first example will be described here.

FIG. 5 is a diagram showing a circuit configuration of the first example, in which 1 is an input and 2 is
Is a quantizer output, 3 is a quantization error output, 4 is a subtractor, 5
Is 1 timing delay, 6 is a local quantizer, and 7 is feedback
The D / A converter and 8 are integrators. Further, FIG. 6 is a signal flowchart of FIG. 5, where X is an input, Y is a quantized output, A is a quantized error output, Q is a local quantizer quantized error, and P is an integrator output.

Here, if one timing delay is represented by Z ^-1 , P, Y, and A are represented by the following equations.

P = Z ⁻¹ · P + X−Z ⁻¹ · Y (1) Y = P + Q (2) A = P−Y (3) From equations (1), (2), and (3), Y and A are represented by Y = X + (1-Z ^-1 ) · Q (4) A = -Q (5), and from this result, the input signal X and the quantization error Q are obtained for Y. It can be seen that the sum of the result obtained by applying noise shaping to is output, and -Q is output to A.

Here, separately, a second quantizer having the same configuration is prepared,
The above A output is used as input, quantization is performed, and the Y output is (1-
Z ^-1 ) is output through a circuit having a differential characteristic and added. That is, when the value of the first quantizer is represented by the subscript 1 and the value of the second quantizer is represented by the subscript 2 in order to avoid confusion of symbols, each quantized output is indicated respectively _{Y 1 = X 1 + (1} -Z -1) · Q 1 ...... (6) Y 2 = X 2 + (1-Z -1) · Q 2 ...... (7), wherein, Y ₁ and Y ₂ are added according to the following equation to obtain Y ₀ .

Y ₀ = Y ₁ + (1-Z ⁻¹ ) · Y ₂ (8) Here, if X ₂ is the A output of the first quantizer, X ₂ = A ₁
= -Q ₁ , and the above Y ₀ is expressed by the following equation.

Y ₁ = X ₁ + (1-Z ^-1 ) ・ Q ₁ + (1-Z ^-1 ) {-Q ₁ + (1-Z ^-1 ) ・
Q ₂ } = X ₁ + (1-Z ^-1 ) ² · Q ₂ (9) From the above results, two quantizers of the first example are prepared,
By adding the outputs in the relation of the equation (8),
It can be seen from the equation that the capacitance can obtain the secondary noise shaping characteristic. Similarly, by preparing n quantizers, an nth-order noise shaping characteristic can be obtained.

[Problems to be Solved by the Invention]

However, the above conventional technique has the following problems. That is, FIG. 7 shows a timing chart of the above operation. In this case, the local quantizer operates at the time when the integrating operation by the integrator (the operation of the equation (1)) is completed, and the local quantizer is operated. Since the operation of the equation (3) is performed using the quantization result by the quantizer, the arithmetic operation of the equations (1) and (3) must be divided into branches of the operation of the local quantizer. Therefore, it has the following drawbacks.

(I) The arithmetic operations of equations (1) and (3) must be performed separately, which increases the operation time and reduces the quantization speed.

(Ii) It is necessary to hold the value of the integrator output so that it does not change during the operation of the equation (3). Therefore, the integrator has a switched capacitor integration using a MOS transistor with a small leakage current. Only vessels can be used.

In the prior art, it is difficult to increase the speed because the quantization speed is reduced operationally and the slow MOS transistor cannot be used as described above.
MOS devices have large element noise such as 1 / f noise, and it is difficult to achieve high precision and low noise, such as noise generated by charge injection in analog switches when a switched capacitor is configured. was there.

An object of the present invention is to solve the problems of the above-mentioned conventional techniques, and to achieve high speed and high accuracy by using a configuration that does not use a switched capacitor integrator and does not use an analog switch. To provide a possible noise shaping quantizer.

[Means for solving the problem]

The purpose is to integrate an analog or digital input signal, quantize the result of the integration with a low resolution comparator or local quantizer, and then use the quantization result for feedback D if the input signal is analog. ΔA for the A / D converter, or for the A / D converter or the D / A converter that obtains the noise shaping characteristics by integrating the A / A converter and the latch when the input signal is digital and applying negative feedback to the integrator. In a Σ-type quantizer, a circuit having a function of subtracting or adding an integrator output and an input signal, and a terminal for outputting a result of the subtraction or addition are provided, and a comparator or a local quantizer is provided at the terminal. Can be achieved by allowing to output the quantization error of

[Action]

By using the quantizer with the above-described configuration,
The integration operation of the integrator and the operation of calculating the quantization error can be simultaneously executed, which allows the quantization speed to be increased as compared with the conventional technique, and the low operation which is difficult to use in the conventional technique. It is possible to use a bipolar transistor, which is a noise and high-speed element, and since the analog switch is eliminated, there is no influence of noise such as charge injection, so that highly accurate quantization can be realized.

〔Example〕

Hereinafter, the noise shaping quantizer of the present invention will be described more specifically by way of examples.

FIG. 1 is a diagram showing a circuit configuration of a noise shaping quantizer of the present invention. 1 is an input, 2 is a quantizer output, 3 is a quantization error output, 4 is a subtractor, 5 is 1 timing delay, 6 Is a local quantizer, 7 is a feedback D / A converter, and 8 is an integrator.

FIG. 2 is a signal flow chart of FIG.
X is an input, Y is a quantizer output, A is a quantization error output, Q
Is the quantization error of the local quantizer, and P is the integrator output.

2 is different from the signal flow chart in FIG. 6 in the prior art, whereas the latter produces the quantization error output A by subtraction of the integrator output P and the quantization output Y.
It is made by subtracting the integrator output P and the input X. Here, P, Y and A in the signal flow chart of FIG. 2 are represented by the following equations, respectively.

P = Z ⁻¹ · P + X−Z ⁻¹ · Y (10) Y = Q + P …… (11) A = P−X …… (12) From the equations (10) and (11), Y is Y = It is represented by X + (1-Z ^-1 ) · Q (13), and from equations (10), (11) and (12), A
Is represented by A = -Z ^-1 · Q (14).

The noise shaping circuit is based on the oversampling technique, and the sampling speed is sufficiently high for the signal Q, so that the delay due to Z ⁻¹ can be ignored. For this reason,
Equations (5) and (14) can be regarded as almost the same signal in the case of the noise shaping circuit.

What is important here is that A = P−Y in the prior art.
Since (Equation (3)), the quantization error output A cannot be determined unless the local quantizer output Y is determined. Therefore, A cannot be calculated before the local quantizer operation. Is determined by A = P−X, and therefore A can be calculated before the operation of the local quantizer. This eliminates the need for the function of holding the integrator output value in the quantizer configuration as in the case of the prior art, and enables the quantizer to be configured with RC integrators other than switched capacitors. It was

Further, the quantizer of the present invention can be multi-staged by adding two quantizer outputs so as to satisfy the following equation, as in the equation (8).

Y ₀ = Z ⁻¹ · Y ₁ + (1-Z ⁻¹ ) · Y ₂ (15) Further, FIG. 3 is a timing chart of the signal flow of FIG. When the quantizer is used as the quantizer, it can be seen that the calculation of the quantization error can be performed in parallel with the integration operation of the integrator, and one operation time can be shortened to speed up the quantizer.

FIG. 4 shows an embodiment of the quantizer of the present invention at the circuit diagram level. A resistor connected in series is used as the subtractor 4, an RC integrator is used as the integrator 8, and a local quantizer 6 is used. An example has been shown in which the comparator is configured using the inverter as the feedback D / A converter 7. From this figure, it can be seen that the quantizer can be configured without using an analog switch that causes deterioration in accuracy.

〔The invention's effect〕

As described above, by using the quantizer as the noise shaping quantizer having the configuration of the present invention, the problem that the prior art has, that is, (i) the integrator needs to have a function for holding the integration result. (Ii) The problem that the timing of the integrator operation and the calculation of the quantization error must be separated is solved, and integrators other than switched capacitors can be used, and analog switches must be used. It became possible to construct a quantizer using high-speed, low-noise bipolar transistors, etc., and realize a high-speed, high-precision quantizer. Moreover, since the integrator operation and the quantization error calculation operation can be performed in parallel, the timing can be speeded up.

[Brief description of drawings]

FIG. 1 is a diagram showing a circuit configuration of the noise shaping quantizer of the present invention, FIG. 2 is a signal flowchart of the noise shaping quantizer of the present invention, FIG. 3 is an operation timing chart of the noise shaping quantizer of the present invention, FIG. 4 is a circuit-level embodiment of the noise shaping quantizer of the present invention, FIG. 5 is a diagram showing a circuit configuration of a conventional quantizer, and FIG. 6 is a signal flow chart of the conventional quantizer. FIG. 7 is an operation timing chart of the prior art. 1 ... Input, 2 ... Quantizer output 3 ... Quantization error output, 4 ... Subtractor 5 ... 1 Timing delay 6 ... Local quantizer, 7 ... Feedback D / A converter 8 ... … Integrator, X …… input Y …… quantizer output, A …… quantization error output P …… integrator output Q …… local quantizer quantization error

Claims (1)

(57) [Claims] 1. An analog or digital input signal is integrated, the integrated result is quantized by a low resolution comparator or a local quantizer, and the quantized result is used for feedback when the input signal is analog. For the D / A converter, or for the A / D converter or the D / A converter, which obtains noise shaping characteristics by passing through a latch when the input signal is digital, and integrating by applying negative feedback to the integrator. In the Δ-Σ quantizer, a circuit having a function of subtracting or adding an integrator output and an input signal and a terminal for outputting the result of the addition or subtraction are provided, and a comparator or a local quantizer is provided at the terminal. Noise shaping quantizer characterized in that it is possible to output the quantization error of the signal generator.