JP2559471B2 - Chip resistor manufacturing method - Google Patents

Chip resistor manufacturing method

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Publication number
JP2559471B2
JP2559471B2 JP63224562A JP22456288A JP2559471B2 JP 2559471 B2 JP2559471 B2 JP 2559471B2 JP 63224562 A JP63224562 A JP 63224562A JP 22456288 A JP22456288 A JP 22456288A JP 2559471 B2 JP2559471 B2 JP 2559471B2
Authority
JP
Japan
Prior art keywords
hole
ceramic substrate
electrode
ceramic
surface electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP63224562A
Other languages
Japanese (ja)
Other versions
JPH0273608A (en
Inventor
充 伊藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
KOA SPINNING MACH
Original Assignee
KOA SPINNING MACH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KOA SPINNING MACH filed Critical KOA SPINNING MACH
Priority to JP63224562A priority Critical patent/JP2559471B2/en
Publication of JPH0273608A publication Critical patent/JPH0273608A/en
Application granted granted Critical
Publication of JP2559471B2 publication Critical patent/JP2559471B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はチツプ抵抗の製造方法に係り、特に、セラミ
ツク基板のスルーホールの内壁面に側面電極を形成する
チツプ抵抗の製造方法に関する。
The present invention relates to a method for manufacturing a chip resistor, and more particularly to a method for manufacturing a chip resistor in which a side surface electrode is formed on an inner wall surface of a through hole of a ceramic substrate.

〔従来の技術〕[Conventional technology]

この種のチツプ抵抗は、第3図に示す如く、分割形成
してなるセラミツク基板1と、このセラミツク基板1の
表面に形成された表面電極2および抵抗体3と、セラミ
ツク基板1の裏面に形成された裏面電極4と、表裏の電
極2,4に連続する側面電極5とから主に構成されてお
り、図示はしていないが、抵抗体3の表面にはガラス材
にてオーバーコートが施してあり、電極2,4,5の表面に
はニツケルメツキおよびはんだメツキが施してある。
As shown in FIG. 3, a chip resistor of this type is formed on the ceramic substrate 1, which is divided and formed, the surface electrode 2 and the resistor 3 formed on the surface of the ceramic substrate 1, and the rear surface of the ceramic substrate 1. Although not shown in the figure, the surface of the resistor 3 is overcoated with a glass material, although it is mainly composed of a back surface electrode 4 and a side surface electrode 5 continuous with the front and back electrodes 2 and 4. The surfaces of the electrodes 2, 4, 5 are plated with nickel and solder.

かかるチツプ抵抗Aは、従来、概略次のようにして製
造されている。
Conventionally, the chip resistor A is generally manufactured as follows.

まず、セラミツク粉、バインダ樹脂等を混合させてな
るスラリを薄板状に形成したグリーンシートを用意し、
第4図に示すように、このグリーンシートに多数のスル
ーホール6と縦横の分割溝7,8をプレスにより形成して
から焼成して硬質のセラミツク基板1を得る。ここで、
分割溝7,8は図に示すように所定の間隔にて配されたも
のであつて、後に個々のチツプ抵抗として分離するため
の溝であり、縦横の一方の分割溝7はスルーホール6と
重なり合つている。次に、セラミツク基板1の表面のス
ルーホール6の周囲に銀ペーストをスクリーン印刷し、
第5図に示すように、セラミツク基板1の裏面側からス
ルーホール6を介して銀ペーストBを吸引することによ
り、セラミツク基板1の表面にパターニングされた表面
電極2と、この表面電極2からスルーホール6内へ延出
する側面電極5とを形成する。同様にして、セラミツク
基板1の裏面にも裏面電極4をスクリーン印刷し、この
裏面電極4からスルーホール6内へ延出する側面電極5
を吸引印刷する。これにより、側面電極5はスルーホー
ル6の内壁面を覆い、表裏の電極2,4と連続する。次い
で、対をなす表面電極2,2間に抵抗体3を印刷形成し、
レーザトリミング等の公知の手法により付着面の一部を
削除して抵抗値を調整した後、抵抗体3の表面をガラス
材にてオーバーコートする。しかる後、セラミツク基板
1を分割溝7,8に沿つて分割し、電極2,4,5の表面にニツ
ケルメツキおよびはんだメツキを施して、第3図に示す
如き個々のチツプ抵抗Aを多数得る。
First, prepare a green sheet in which a slurry formed by mixing ceramic powder, binder resin, etc. is formed into a thin plate,
As shown in FIG. 4, a large number of through holes 6 and vertical and horizontal dividing grooves 7 and 8 are formed in this green sheet by pressing and then baked to obtain a hard ceramic substrate 1. here,
The dividing grooves 7 and 8 are arranged at a predetermined interval as shown in the figure, and are grooves for later separating into individual chip resistors. It overlaps. Next, silver paste is screen-printed around the through holes 6 on the surface of the ceramic substrate 1,
As shown in FIG. 5, by sucking the silver paste B from the back surface side of the ceramic substrate 1 through the through holes 6, the surface electrode 2 patterned on the surface of the ceramic substrate 1 and the through surface electrode 2 are passed through. The side surface electrode 5 extending into the hole 6 is formed. Similarly, the back surface electrode 4 is screen-printed on the back surface of the ceramic substrate 1, and the side surface electrode 5 extending from the back surface electrode 4 into the through hole 6 is formed.
Print by suction. As a result, the side surface electrode 5 covers the inner wall surface of the through hole 6 and is continuous with the front and back electrodes 2 and 4. Then, a resistor 3 is formed by printing between the pair of surface electrodes 2, 2.
After a part of the adhered surface is removed by a known method such as laser trimming to adjust the resistance value, the surface of the resistor 3 is overcoated with a glass material. Thereafter, the ceramic substrate 1 is divided along the dividing grooves 7 and 8, and nickel plating and solder plating are applied to the surfaces of the electrodes 2, 4 and 5 to obtain a large number of individual chip resistances A as shown in FIG.

〔発明が解決しようとする課題〕[Problems to be Solved by the Invention]

ところで、上述した従来技術にあつては、チツプ抵抗
の側面電極5を形成する方法として、スルーホール6を
介して銀ペーストを吸引するという吸引印刷を行つてい
るが、かかる吸引印刷でスルーホール6の内壁面に均一
な膜厚の銀ペーストを形成することは容易でなく、特に
膜厚が不所望に薄くなつてしまうと銀くわれを起こして
導通不良にまで至る危険性があつた。そして、このよう
な不良品が発生して市場に出回ると、同種のすべてのチ
ツプ抵抗を回収する等の重大な自体を招きかねず、その
一方、製造時に側面電極の膜厚に細心の注意をはらうと
量産性が損なわれてしまう。
By the way, in the above-mentioned conventional technique, as a method of forming the side electrode 5 of the chip resistance, the suction printing of sucking the silver paste through the through hole 6 is performed. It is not easy to form a silver paste having a uniform film thickness on the inner wall surface of the above, and especially if the film thickness becomes undesirably thin, there is a risk that silver blemishes may occur and conduction failure may occur. When such a defective product is generated and put on the market, it may cause serious problems such as recovering all the chip resistances of the same type, while paying close attention to the film thickness of the side electrode during manufacturing. Mass production will be impaired if it tries.

本発明はこのような事情に鑑みてなされたもので、そ
の目的は、均一な膜厚の側面電極が確実に形成できて量
産性も良好なチツプ抵抗の製造方法を提供することにあ
る。
The present invention has been made in view of such circumstances, and an object of the present invention is to provide a method for manufacturing a chip resistor in which a side electrode having a uniform film thickness can be reliably formed and mass productivity is good.

〔課題を解決するための手段〕[Means for solving the problem]

上記目的を達成するために、本発明は、セラミツク基
板をスルーホールを含む分割溝に沿つて分割した後、こ
れらのスルーホールと等ピツチに張設して導電ペースト
を塗布した複数本のワイヤを、各スルーホールの内壁面
に押し当てて上記導電ペーストを転写し、この転写によ
り側面電極を形成するようにした。
In order to achieve the above-mentioned object, the present invention divides a ceramic substrate along a dividing groove including through holes, and then applies a plurality of wires coated with a conductive paste by tensioning these through holes at equal pitches. The conductive paste was transferred by pressing against the inner wall surface of each through hole, and the side electrode was formed by this transfer.

〔作用〕[Action]

すなわち、本発明は、分割面に臨出させたスルーホー
ルの内壁面に側面電極としての導電ペーストを直接転写
するので、この導電ペーストは常にほぼ均一な膜厚に形
成され、また、複数本のワイヤを用いることで複数個所
に一括して導電ペーストを転写形成できるので、量産性
も損なわれない。
That is, according to the present invention, since the conductive paste as the side surface electrode is directly transferred to the inner wall surface of the through hole exposed on the divided surface, the conductive paste is always formed to have a substantially uniform film thickness, and a plurality of conductive pastes are formed. Since the conductive paste can be collectively transferred and formed at a plurality of locations by using the wire, mass productivity is not impaired.

〔実施例〕〔Example〕

以下、本発明の実施例を図に基づいて説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第1図および第2図は本発明の一実施例を説明するた
めのもので、第1図は側面電極形成時の銀ペースト転写
工程を示す説明図、第2図は銀ペースト転写後のセラミ
ツク分割板の斜視図であり、第3〜5図と対応する部分
には同一符号が付してある。
1 and 2 are for explaining one embodiment of the present invention. FIG. 1 is an explanatory view showing a silver paste transfer process at the time of forming a side electrode, and FIG. 2 is a ceramic after the silver paste transfer. It is a perspective view of a division plate, and the same code | symbol is attached | subjected to the part corresponding to FIGS.

この実施例の製造工程のうち、スルーホールおよび縦
横の分割溝を有するセラミツク基板の形成方法や、表裏
の電極および抵抗体の形成方法等は、既に述べた従来技
術と同様なので、その説明は省略する。
In the manufacturing process of this embodiment, the method of forming the ceramic substrate having the through holes and the vertical and horizontal dividing grooves, the method of forming the front and back electrodes and the resistor, etc. are the same as those of the conventional technique described above, and therefore the description thereof is omitted. To do.

さて、セラミツク基板の表裏両面に表面電極2、裏面
電極および抵抗体3のパターンを印刷形成し、抵抗体3
にオーバーコートを施したなら、スルーホール6と重な
り合う分割溝に沿つてセラミツク基板を1次分割し、分
割面7a,7bに各スルーホール6の内壁面が臨出する細長
いセラミツク分割板1aを複数本得る。次いで、第1図に
示すように、このセラミツク分割板1aを銀ペースト浴10
上の所定位置に配置し、セラミツク分割板1aの下方に
は、図の上下方向に移動可能な複数本のワイヤ11をスル
ーホール6と等ピツチに張設しておく。そして、これら
のワイヤ11を、まず銀ペースト浴10中に浸せきしてから
上昇させ、セラミツク分割板1aの片側の分割面7aに臨出
する各スルーホール6の内壁面にそれぞれ、外周面に銀
ペーストを塗布した各ワイヤ11を押し当てる。これによ
り、銀ペーストはスルーホール6の内壁面にほぼ均一な
膜厚で転写形成される。同様にして、セラミツク分割板
1aの他側の分割面7bに臨出する各スルーホール6の内壁
面にも銀ペーストを転写し、表裏の電極に連続する側面
電極5をセラミツク分割板1aの両側面に形成する。
Now, the patterns of the front surface electrode 2, the back surface electrode and the resistor 3 are formed by printing on both front and back surfaces of the ceramic substrate, and the resistor 3
If an overcoat is applied to the ceramic substrate, the ceramic substrate is first divided along the dividing groove that overlaps the through hole 6, and a plurality of elongated ceramic dividing plates 1a in which the inner wall surface of each through hole 6 is exposed on the dividing surfaces 7a and 7b. Get the book. Then, as shown in FIG. 1, the ceramic dividing plate 1a is placed in a silver paste bath 10
A plurality of wires 11 which can be moved in the vertical direction in the drawing are stretched in the same pitch as the through hole 6 below the ceramic division plate 1a. Then, these wires 11 are first dipped in a silver paste bath 10 and then raised, and the inner wall surface of each through hole 6 exposed to one of the divided surfaces 7a of the ceramic division plate 1a is provided with silver on the outer peripheral surface. Each wire 11 coated with the paste is pressed. As a result, the silver paste is transferred and formed on the inner wall surface of the through hole 6 with a substantially uniform film thickness. In the same way, ceramic dividing plate
The silver paste is also transferred to the inner wall surface of each through hole 6 exposed to the division surface 7b on the other side of 1a to form side electrodes 5 continuous to the front and back electrodes on both side surfaces of the ceramic division plate 1a.

しかる後、セラミツク分割板1aを分割溝8に沿つて細
分割(2次分割)し、表面電極2、裏面電極および側面
電極5の表面にニツケルメツキとはんだメツキを施し
て、個々のチツプ抵抗を多数得る。
After that, the ceramic division plate 1a is subdivided (secondary division) along the division groove 8 and the surfaces of the front surface electrode 2, the back surface electrode and the side surface electrode 5 are plated with solder and soldered to obtain a large number of individual chip resistances. obtain.

このように、上記実施例にあつては、側面電極5の形
成方法として、膜厚にばらつきを生じやすい吸引印刷を
行う代わりに、スルーホール6と等ピツチに張設した複
数本のワイヤ11を用いて銀ペーストを直接転写するとい
う手法を採用しているので、ほぼ均一な膜厚の側面電極
5を確実に形成することができてチツプ抵抗の信頼性が
著しく向上するとともに、セラミツク分割板1aの側面に
臨出する複数のスルーホール6の内壁面に一括して銀ペ
ーストを転写形成できることから量産性も良好である。
また、表面電極2および裏面電極の印刷時に若干量の銀
ペーストがスルーホール6の開口端部に流れ込むので、
これら表裏の電極と側面電極5との連結部分で膜厚が薄
くなる心配もない。
As described above, in the above-described embodiment, as a method of forming the side surface electrode 5, instead of performing the suction printing in which the film thickness tends to vary, a plurality of wires 11 stretched in the same pitch as the through hole 6 is used. Since the method of directly transferring the silver paste is used, the side electrode 5 having a substantially uniform film thickness can be reliably formed, the reliability of the chip resistance is significantly improved, and the ceramic division plate 1a is Since the silver paste can be collectively transferred and formed on the inner wall surfaces of the plurality of through holes 6 that are exposed to the side surface of, the mass productivity is also good.
In addition, since a small amount of silver paste flows into the opening end of the through hole 6 when the front surface electrode 2 and the back surface electrode are printed,
There is no concern that the film thickness will become thin at the connecting portion between the front and back electrodes and the side surface electrode 5.

なお、裏面電極を形成しないチツプ抵抗についても、
本発明が適用可能であることはいうまでもない。
Regarding the chip resistance without the back electrode,
It goes without saying that the present invention is applicable.

〔発明の効果〕〔The invention's effect〕

以上説明したように、本発明は、スルーホールと等ピ
ツチに張設した複数本のワイヤを用いて、分割面に臨出
させた各スルーホールの内壁面に側面電極としての導電
ペーストを転写形成するというものなので、膜厚にばら
つきを生じやすい従来の吸引印刷とは異なり、ほぼ均一
な膜厚の側面電極を確実に形成することができて不良品
の発生が回避できるとともに、複数個所に一括して導電
ペーストを転写形成できることから量産性を損なう心配
もない。
As described above, according to the present invention, the conductive paste as the side surface electrode is transferred and formed on the inner wall surface of each through hole exposed to the dividing surface by using a plurality of wires stretched in the same pitch as the through hole. Unlike conventional suction printing, which tends to cause variations in film thickness, it is possible to reliably form side electrodes with an almost uniform film thickness, avoid the occurrence of defective products, and collect them in multiple locations. Since the conductive paste can be transferred and formed, there is no fear of impairing mass productivity.

【図面の簡単な説明】[Brief description of drawings]

第1図および第2図は本発明の一実施例を説明するため
のもので、第1図は側面電極形成時の銀ペースト転写工
程を示す説明図、第2図は銀ペースト転写後のセラミツ
ク分割板の斜視図、第3図はチツプ抵抗の斜視図、第4
図および第5図は従来技術を説明するためのもので、第
4図は分割前のセラミツク基板の平面図、第5図は側面
電極形成時の吸引印刷工程を示す説明図である。 1……セラミツク基板、1a……セラミツク分割板、2…
…表面電極、3……抵抗体、5……側面電極、6……ス
ルーホール、7,8……分割溝、7a,7b……分割面、10……
銀ペースト浴、11……ワイヤ。
1 and 2 are for explaining one embodiment of the present invention. FIG. 1 is an explanatory view showing a silver paste transfer process at the time of forming a side electrode, and FIG. 2 is a ceramic after the silver paste transfer. FIG. 3 is a perspective view of the division plate, FIG. 3 is a perspective view of the chip resistor, and FIG.
FIG. 5 and FIG. 5 are for explaining the prior art, FIG. 4 is a plan view of the ceramic substrate before division, and FIG. 5 is an explanatory view showing a suction printing process at the time of forming the side electrodes. 1 ... Ceramic substrate, 1a ... Ceramic dividing plate, 2 ...
… Surface electrode, 3 …… resistor, 5 …… side electrode, 6 …… through hole, 7,8 …… dividing groove, 7a, 7b …… dividing surface, 10 ……
Silver paste bath, 11 ... wire.

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】多数のスルーホールを穿設したセラミツク
基板の表面に電極および抵抗体のパターンを印刷形成し
た後、そのセラミツク基板を分割溝に沿つて分割して分
割面に上記スルーホールを臨出させ、このスルーホール
の内壁面の側面電極を配したチツプ抵抗を多数個取りす
る製造方法において、上記セラミツク基板を上記スルー
ホールを含む分割溝に沿つて分割した後、これらのスル
ーホールと等ピツチに張設して導電ペーストを塗布した
複数本のワイヤを、各スルーホールの内壁面に押し当て
て上記導電ペーストを転写し、この転写により上記側面
電極を形成することを特徴とするチツプ抵抗の製造方
法。
1. A pattern of electrodes and resistors is formed by printing on the surface of a ceramic substrate having a large number of through holes formed therein, and the ceramic substrate is divided along division grooves to expose the through holes on the divided surfaces. In a manufacturing method in which a large number of chip resistors having side electrodes on the inner wall surface of the through hole are provided, the ceramic substrate is divided along the dividing groove including the through hole, and then these through holes are formed. A chip resistor characterized in that a plurality of wires stretched around a pitch and coated with a conductive paste are pressed against the inner wall surface of each through hole to transfer the conductive paste, and the side electrodes are formed by this transfer. Manufacturing method.
JP63224562A 1988-09-09 1988-09-09 Chip resistor manufacturing method Expired - Lifetime JP2559471B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63224562A JP2559471B2 (en) 1988-09-09 1988-09-09 Chip resistor manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63224562A JP2559471B2 (en) 1988-09-09 1988-09-09 Chip resistor manufacturing method

Publications (2)

Publication Number Publication Date
JPH0273608A JPH0273608A (en) 1990-03-13
JP2559471B2 true JP2559471B2 (en) 1996-12-04

Family

ID=16815722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63224562A Expired - Lifetime JP2559471B2 (en) 1988-09-09 1988-09-09 Chip resistor manufacturing method

Country Status (1)

Country Link
JP (1) JP2559471B2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3376942B2 (en) * 1999-03-08 2003-02-17 株式会社村田製作所 Method and apparatus for applying sealing material to parts
JP5110996B2 (en) * 2007-07-20 2012-12-26 新光電気工業株式会社 Manufacturing method of stacked semiconductor device

Also Published As

Publication number Publication date
JPH0273608A (en) 1990-03-13

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