JP2555359Y2 - Semiconductor device manufacturing equipment - Google Patents
Semiconductor device manufacturing equipmentInfo
- Publication number
- JP2555359Y2 JP2555359Y2 JP2700691U JP2700691U JP2555359Y2 JP 2555359 Y2 JP2555359 Y2 JP 2555359Y2 JP 2700691 U JP2700691 U JP 2700691U JP 2700691 U JP2700691 U JP 2700691U JP 2555359 Y2 JP2555359 Y2 JP 2555359Y2
- Authority
- JP
- Japan
- Prior art keywords
- ion
- semiconductor device
- device manufacturing
- manufacturing equipment
- ion beam
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Physical Vapour Deposition (AREA)
Description
【0001】[0001]
【産業上の利用分野】本考案は半導体装置の製造装置に
関し、特に不純物を半導体ウェーハに注入するイオン注
入装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing apparatus, and more particularly to an ion implantation apparatus for implanting impurities into a semiconductor wafer.
【0002】[0002]
【従来の技術】従来のイオン注入装置は図2の構成図に
示すように、イオンを発生させるイオンソース部1,発
生したイオンを引き出し加速する加速部2,不要なイオ
ンを取り除く質量分析部3,半導体ウェーハ5を固定
し、受けたイオン電流量によりイオンの注入量を計測す
るウェーハホルダー4、イオンビームを精度良く半導体
ウェーハに注入するための様々な操作を行うビームライ
ン8を有している。このイオンビーム7に直接さらされ
ているビームライン8内の部品である二次電子押さえ込
み用電極6は、鏡面加工されていない電極表面9aを有
しているため小さな凹凸が多数あった。2. Description of the Related Art A conventional ion implantation apparatus has an ion source section 1 for generating ions, an acceleration section for extracting and accelerating the generated ions, and a mass spectrometer section 3 for removing unnecessary ions as shown in FIG. The semiconductor wafer 5 is fixed, and has a wafer holder 4 for measuring an ion implantation amount based on a received ion current amount, and a beam line 8 for performing various operations for accurately implanting an ion beam into the semiconductor wafer. . The secondary electron pressing electrode 6, which is a component in the beam line 8 directly exposed to the ion beam 7, has an electrode surface 9a that has not been mirror-finished, and thus has many small irregularities.
【0003】[0003]
【考案が解決しようとする課題】この従来のイオン注入
装置では、イオンビームに直接さらされる部品の表面が
鏡面加工されていないため表面に凹凸が多く、部品表面
にイオンビームにより生成される反応物質が付着しやす
いという問題があった。またその付着物質にイオンビー
ムが衝突することにより付着物質がスパッタリングされ
やすく、さらに部品そのものも凹凸が多いためにイオン
ビームによってスパッタリングされやすく、スパッタさ
れた物質により半導体ウェーハ表面が汚染されてしまう
という問題があった。In this conventional ion implantation apparatus, since the surface of the component directly exposed to the ion beam is not mirror-finished, there are many irregularities on the surface, and the reactant generated by the ion beam on the surface of the component. However, there was a problem that the particles easily adhered. In addition, the ion beam collides with the adhering substance, so that the adhering substance is liable to be sputtered. Further, since the component itself has many irregularities, it is easily sputtered by the ion beam, and the surface of the semiconductor wafer is contaminated by the sputtered substance. was there.
【0004】[0004]
【課題を解決するための手段】本考案の半導体装置の製
造装置は、ウェーハのイオン注入時にイオンビームに直
接さらされるビームライン内の部品が鏡面加工されてい
る。In the apparatus for manufacturing a semiconductor device according to the present invention, parts in a beam line which are directly exposed to an ion beam during ion implantation of a wafer are mirror-finished.
【0005】[0005]
【実施例】次に本考案について図面を参照して説明す
る。図1は本考案の一実施例の構成図である。イオンソ
ース部1で発生したイオンは、加速部2で加速された
後、質量分析部3で必要なイオンだけが通過し、ビーム
ライン8で様々な操作を受け半導体ウェーハ5に注入さ
れる。ウェーハホルダー4はウェーハを固定するととも
に、イオンの注入量をイオン電流の積算値として計測す
る役目をしており、ビームライン内の二次電子押さえ込
み用電極6は半導体ウェーハ5及びウェーハホルダー4
にイオンビーム7が衝突する際に発生する二次電子の押
さえ込みを行い、二次電子飛び出しによる注入量計測値
の変動を抑制している。BRIEF DESCRIPTION OF THE DRAWINGS FIG. FIG. 1 is a configuration diagram of an embodiment of the present invention. After the ions generated in the ion source unit 1 are accelerated by the acceleration unit 2, only necessary ions pass through the mass analysis unit 3, undergo various operations by the beam line 8, and are implanted into the semiconductor wafer 5. The wafer holder 4 serves to fix the wafer and measure the amount of ion implantation as an integrated value of the ion current. The electrode 6 for holding down the secondary electrons in the beam line includes the semiconductor wafer 5 and the wafer holder 4.
The secondary electrons generated when the ion beam 7 collides with the target are suppressed to suppress the fluctuation of the measured injection amount due to the secondary electron jumping out.
【0006】この時、二次電子押さえ込み用電極6は直
接イオンビームにさらされるが、本考案の場合、鏡面加
工された電極表面9を有しているため、イオンビームに
よる反応物質が付着しにくく、また二次電子押さえ込み
用電極6そのものもイオンビームによってスパッタリン
グされにくく、半導体ウェーハのスパッタリングされた
物質による汚染は最小限に抑えられる。At this time, the secondary electron pressing electrode 6 is directly exposed to the ion beam. However, in the case of the present invention, since the electrode surface 9 is mirror-finished, the reactant by the ion beam hardly adheres. In addition, the secondary electron pressing electrode 6 itself is not easily sputtered by the ion beam, and contamination of the semiconductor wafer by the sputtered substance is minimized.
【0007】[0007]
【考案の効果】以上説明した様に本考案の半導体製造装
置は、イオンビームに直接さらされるビームライン内の
部品の表面が鏡面加工されているため、部品表面に付着
した反応物質や部品そのもののスパッタリングによる半
導体ウェーハ表面の汚染を1/2〜1/3に低減できる
という効果を有する。As described above, in the semiconductor manufacturing apparatus of the present invention, since the surface of the component in the beam line that is directly exposed to the ion beam is mirror-finished, the reactant adhering to the component surface and the component itself are removed. This has the effect that contamination of the semiconductor wafer surface due to sputtering can be reduced to 1/2 to 1/3.
【図1】本考案の一実施例の構成図である。FIG. 1 is a configuration diagram of an embodiment of the present invention.
【図2】従来のイオン注入装置の構成図である。FIG. 2 is a configuration diagram of a conventional ion implantation apparatus.
1 イオンソース部 2 加速部 3 質量分析部 4 ウェーハホルダー 5 半導体ウェーハ 6 二次電子押さえ込み用電極 7 イオンビーム 8 ビームライン 9 鏡面加工された電極表面 9a 鏡面加工されていない電極表面 DESCRIPTION OF SYMBOLS 1 Ion source part 2 Acceleration part 3 Mass analysis part 4 Wafer holder 5 Semiconductor wafer 6 Electrode for suppressing secondary electrons 7 Ion beam 8 Beam line 9 Mirror-finished electrode surface 9a Electrode surface which is not mirror-finished
Claims (1)
物を注入する半導体装置の製造装置において、イオン注
入時にイオンビームに直接さらされるビームライン内の
部品が鏡面加工されていることを特徴とする半導体装置
の製造装置。1. A semiconductor device manufacturing apparatus for implanting impurities into a semiconductor wafer by ion implantation, wherein components in a beam line directly exposed to an ion beam at the time of ion implantation are mirror-finished. Manufacturing equipment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2700691U JP2555359Y2 (en) | 1991-04-20 | 1991-04-20 | Semiconductor device manufacturing equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2700691U JP2555359Y2 (en) | 1991-04-20 | 1991-04-20 | Semiconductor device manufacturing equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH04121650U JPH04121650U (en) | 1992-10-30 |
JP2555359Y2 true JP2555359Y2 (en) | 1997-11-19 |
Family
ID=31911391
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2700691U Expired - Fee Related JP2555359Y2 (en) | 1991-04-20 | 1991-04-20 | Semiconductor device manufacturing equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2555359Y2 (en) |
-
1991
- 1991-04-20 JP JP2700691U patent/JP2555359Y2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH04121650U (en) | 1992-10-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 19970701 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |