JP2508893B2 - Automatic playing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to an automatic performance device capable of reproducing only a desired portion by a simple operation.

(B) Conventional Technique An automatic performance device is a device that enables automatic performance by storing time-sequential automatic performance data in a performance data memory (performance data storage means) and sequentially reading this data. . The automatic performance data is composed of data relating to sounding timing, note length, pitch, and the like.

To play back this automatic performance data, simply turn on the start switch and the song (automatic performance data)
Play from the beginning to the end automatically.

(C) Problem to be Solved by the Invention By the way, the user does not always want to reproduce all songs, but may want to listen to only a specific part. In such a case, in the conventional automatic performance device, a point (address) at which reproduction is to be started and a pointer at which reproduction is to be ended are designated so that only that section can be reproduced.

However, this method is inconvenient because even if you want to listen to only a part, you cannot play back a part unless you specify two places before and after that. A part of the reproduction is often used to get a feeling of a rewritten or added sound when editing the previously recorded automatic performance data. Therefore, if the troublesome operation as described above is performed every time one edit is performed, there is a disadvantage that the editing takes a very long time.

An object of the present invention is to provide an automatic performance device capable of reproducing only a desired portion with a simple process.

(D) Means for Solving the Problem The first invention of this application is a performance data storage means for storing automatic performance data, and a pointer means for pointing an arbitrary one address in the performance data storage means by an operation.
It is characterized in that it comprises a trial listening means for playing a predetermined section before and after the automatic performance data pointed by the pointer means.

A second invention of this application is performance data storage means for storing automatic performance data, pointer means for pointing to any one address in the performance data storage means by operation,
Editing means including an operation of rewriting the contents of the automatic performance data stored at the address pointed to by the pointer means or an operation of inserting new automatic performance data at the address pointed to by the pointer means, and before and after the address pointed by the pointer means. And a trial listening means for playing a predetermined section.

(E) Action of the Invention With the automatic performance device of the present invention, the operation of the user causes
The pointer means can be moved to any one address in the performance data storage means. By moving the pointer means to any one address and then operating the trial listening means, it is possible to automatically perform a predetermined section before and after the automatic performance data pointed to by the pointer means. The pointer means is used not only when retrieving a part of a song, but also when rewriting a part of a song or editing such as addition. If used in this case, the edited contents can be easily auditioned and the editing efficiency can be improved.

(F) Embodiment FIG. 1 is a block diagram of an electronic musical instrument according to an embodiment of the present invention. This electronic musical instrument is an electronic keyboard instrument equipped with an automatic performance device, and it is possible to play the keyboard in real time by operating the keyboard and also to write the performance data in the performance data memory and then reproduce it.

The operation of the entire device is controlled by the CPU 30. CPU
The bus 30 is connected to a program memory 32, a register memory 33, a performance data memory 34, a display data memory 35, a tempo clock generator 36, a keyboard circuit 37, an operation panel 38 and a tone generator 39 via a bus 31. The program memory 32 stores a program shown in a flowchart described later. Various registers as shown in FIG. 3 are set in the register memory 33. The performance data memory 34 sequentially stores automatic performance data in the format shown in FIGS. The display data memory 35 stores graphic data such as notes displayed on the display unit 2 (see FIG. 2) included in the operation panel 38. The program memory 32 is composed of a ROM, and has a register memory 33, a performance data memory 34, and a display data memory 3
5 is composed of RAM. Tempo clock generator 36 is CP
This is an oscillator circuit that generates a clock signal at the tempo instructed by U30, and performance data is written and automatic performance is performed based on the clock signal of the tempo clock generator 36. The keyboard circuit 37 is provided with a circuit for outputting the on / off state of each key constituting the keyboard and its strength. The operation panel 38 controls the display contents of the display section included in the operation panel shown in FIG. 2 and detects the on / off state of the switch of the operation switch section. Tone generator 39 is CPU3
It is a circuit that forms a musical tone waveform based on a command of 0, and is capable of simultaneously forming musical tones of a plurality of channels by time division control.

FIG. 2 is a diagram showing the configuration of the operation panel 38 of the electronic musical instrument. In addition to the keyboard, the operation panel 38 is provided on the upper surface of the electronic musical instrument. The operation panel 38 is composed of the display unit 2 and the operation switch unit 3. The display unit 2 is provided with a bar number display 4, a cursor display 5, and a score display 7 for displaying the score of a staff. As shown in FIG. 6 (A), the musical score display 7 displays the notes that have been automatically input in the musical score on the staff. A scale 5a and a cursor 6 are displayed on the cursor indicator 5. scale
5a is a fixed display of a straight line with a scale dividing one measure into 16 parts, and the cursor 6 is a display that can be moved by one scale unit of the scale 5a by operating the cursor switch 8.

Further, the operation switch section 3 includes a cursor switch 8, a note switch 9 (9a to 9e), a point switch 11, a start switch 13, a check switch 14, a pickup switch 15,
A delete switch 17 and LEDs 10a to 10e, 12 corresponding to the note switches 9a to 9e and the note point switch 11 are provided. The cursor switch 8 includes a cursor right switch 8a, a next bar switch 8b, a cursor left switch 8c and a previous bar switch 8d, and the cursor 6 can be moved by operating them. Note switch 9
Is composed of five switches 9a to 9e indicating sixteenth notes to whole notes. When the note switches 9a to 9e are turned on in the input mode for inputting the automatic performance data step by note or in the edit mode for editing the written automatic performance data, the corresponding note data is stored as the performance data memory in the automatic performance data. Written in 34. When the note point switch 11 is turned on continuously after the note switch 9 is turned on, the written note data is a code note. The LEDs 10a to 10e and 12 provided in association with the note switches 9a to 9e and the note point switch 11 blink by turning on / off the corresponding switches. The start switch 13 is a switch that is turned on when starting / stopping the automatic performance operation. The check switch 14 is a switch for automatically picking up and operating one bar before or after the bar pointed by the cursor 6, that is, three bars. When this switch is turned on, the section from the beginning of the measure before the measure displayed on the score display 7 (where the cursor 6 was) to the end of the measure next to the measure being displayed is played. To do. The pickup switch 15 is a switch for designating a note indicated by the cursor 6. When this switch is turned on, the corresponding indicator 16 lights up, and the notes input thereafter are replaced with the notes picked up. Further, if the note switches 9a to 9e are turned on without turning on the pickup switch 15, it is possible to specify that the notes written in the notes are overlaid and sounded. The delete switch 17 is the pickup switch 15
This is a switch for deleting the note selected by. When the delete switch 17 is turned on after being picked up, the note is deleted from the performance data memory 34, and the display without a display is also deleted.

FIG. 3 is a diagram showing registers set in the register memory 33.

RUN is a performance flag. This flag is set when the start switch 13 and the check switch 14 are turned on, and the automatic performance is performed based on the setting of this flag.

CLK is a tempo clock register. This register is a register that counts the clock panel of the tempo clock generator 36. In the case of four beats, a number of 0 to 31 is set, and the beat timing within one bar is stored.

BAR is a bar number register. The number of the bar currently displayed on the score display 7 is stored in this register. The stored contents are displayed on the bar number display 4.

MPTR and WPTR are address pointers in a performance data memory 34 (MEM), which will be described later, and in the automatic performance data of the bar currently displayed on the score display 7, the bar pointer MPTR points (stores) the head address.

The write pointer WPTR points to an address designated to write the input data.

The display pointer DPTR stores the number of clocks from the beginning of the bar being displayed on the score display 7 and the cursor display 5 to the position where the cursor 6 is located.

DUR is a code length register. This register is a 6-bit register, and the upper 5 bits store the type of note, and the lowermost bit stores the presence or absence of a note point.

CHG is an edit mode flag. This flag is a flag that is set when the pickup switch 15 is turned on, and it is possible to rewrite or delete this flag or the note specified when it is set.

DT is a performance data buffer. This buffer is used when reading automatic performance data from the performance data memory (MEM) 34.

KC is a key code register. This register contains
The key code of the key turned on is stored.

STK is a timing register. It is a timing register. This register is a register for storing the address amount from the bar pointer MPTR in the performance data memory MEM, and stores where the automatic performance data of the note to be edited is located.

FND is a bar line search counter. This counter is used when searching for the last bar line of the bar next to the bar currently displayed when the check switch 14 is turned on. That is, when the second bar line is found from the displayed bar, it is determined that the bar has reached the end of the next bar.

ST and ED are a start address register and an end address register. A start address and an end address at the time of automatic performance are set in this register. In the case of normal automatic performance (by the start switch 13), the beginning and end addresses of the song are set,
In case of automatic performance by turning on the check switch 14,
The start address of the previous measure and the end address of the next measure are set.

PLY is a performance address pointer. This pointer indicates the address of the automatic performance data being processed during the automatic performance.

ASS is an assigned channel register. This register stores the tone generation channel assigned to the read automatic performance data.

KCBF is a key code buffer. The key code in the automatic performance data read from the performance data memory MEM is stored in this buffer.

CNT is a code length buffer. This buffer is used when calculating the length (count number) of the note from the data of the read automatic performance data.

CNTBF is a code length count buffer. The length of the note (count number) obtained by the CNT is set in this buffer, and is counted down every clock interrupt operation. When it reaches 0, the musical sound is muted.

FIG. 4 is a diagram showing the structure of the performance data memory 34 (MEM), and FIGS. 5A to 5C show the format of each automatic performance data. As shown in FIG. 5 (A),
The note information of the automatic performance data consists of 2 bytes.
The byte and the note length are written in the byte, and the key code is stored in the second byte. Further, as shown in FIGS. 7B and 7C, data of FE _H and FF _H are assigned to the bar line and the end line, respectively. Since note timing data and note length data of the note length are stored in the note information, it is not necessary to store rests,
The timing when there is no note information is effectively a rest.

As shown in FIG. 4, the performance data of the note information is bar line FE.
Separated by _H and stored for each measure, FF _{H at} the end of the song
Is remembered. When the performance data shown in FIG. 4 is expressed as notes, it becomes as shown in FIGS. 6 (A) and 6 (B). That is, E4 and G4 at the 0 timing of the first measure
The quarter note of is pronounced, and the eighth note A4 is pronounced at the fourth timing (second beat). Below, at the 7th timing of B4
The 16th note is pronounced, and the C5 second note is pronounced at the 8th timing. At the second bar, the song ends after pronouncing all C4 notes.

7 to 20 are flowcharts showing the operation of the electronic musical instrument.

FIG. 7 shows the main routine. When the power of this electron is turned on, the initial setting operation is first performed at n1. The initial setting operation includes clearing various registers and setting initial values. At this time, preset operations such as MEM (0) = FF _H , MPTR = 0, BAR = 1 are performed. As a result, the electronic musical instrument becomes ready for performance, detects various events, and executes corresponding actions. Key-on event at n2 to n12,
Pickup switch on event, Delete switch on event, Note switch on event, Note point switch on event, Check switch on event, Start switch on event, Pointer right switch on event, Next measure switch on event, Pointer left switch on event and Previous Judge each bar switch-on event. When any event is determined, the corresponding operation (n14 to n23) is executed. After this processing, other processing such as sending the waveform data to the tone generator is executed and the processing returns to (n24) n2.

FIG. 8A shows a key depression processing operation corresponding to a key-on event. When a key-on event occurs, the key code of the turned-on key is fetched in the key code register KC,
At that time, it is determined whether or not the pickup switch 15 is turned on (n26). When the pickup switch 15 is in the ON state, it is an operation of selecting one of the plurality of notes at the position indicated by the pointer 6, and the operations of n28 to n35 are performed. Further, when the pickup switch 15 is in the off state, it is the operation of inputting the note of the input key code, and the operation of n27 to n40 is performed.

When the pickup switch 15 is in the ON state, the pointer i is set to 0 in n28, and then n29
Then, the automatic performance data MEM (MPTR + i) in the measure is loaded into the performance data buffer DT. Since the bar pointer MPTR is located at the position of the head data of the bar displayed on the score display 7, the head data is read when i = 0, and the automatic performance data is sequentially read as i increases. go.
If the read data is FE _H (FF _H ), it means the end of that measure (or the end of the song), so the note with the pitch specified by the key press does not exist in this measure and returns ( n30). If the contents of the automatic performance buffer DT are other than FE _H and FF _H , the upper 4 bits thereof match the contents of the display pointer DPTR, and the next automatic performance data MEM (MPTR + i
It is determined whether +1) matches the input key code (KC). If these conditions are satisfied, it means that the note on the pointer has been specified correctly.
From 1 to n33, set MPTR + i in the write pointer WPTR (n33) and set the edit mode flag CHG (n34).
New automatic performance data is overwritten at this position. After this, the LED1 attached to the pickup switch 15
Turn on 6 (n35) and return. On the other hand, when the condition is not satisfied at n31, the next automatic performance data is determined, so 2 is added to i and (n32) returns to n29.

On the other hand, if the pickup switch 15 is not on when the key is pressed, it is determined in n27 whether or not the edit mode flag CHG is set. If it is not set, the note that is turned on is added to the position of the display pointer at that time (n36 to n40). When the edit mode flag CHG is set, the operation of rewriting the note designated for editing and the note of the key turned on is executed (n41, n4
2).

In the note addition operation (n36 to n40), the address search operation is first executed. This address search operation will be described in detail with reference to FIG.

In the same figure (B), first, 0 is set to the pointer i (n43). Next, MEM (MPTR +
Import the data of i) (n44). If this data is FE _H or FF _H (n45), or if the upper 4 bits are larger than the display pointer DPTR, it is sufficient to add new automatic performance data to this position, so MPTR is added to the write pointer WPTR.
Set + i (n48) and return. If the conditions of n45 and n46 are not satisfied, the writing position has not been reached, so 2 is added to i and (n47) returns to n44.

With the above operation, the writing position (address) of the automatic performance data to be sounded at the timing indicated by the display pointer DPTR could be searched. In order to add new automatic performance data to this address, the subsequent data is shifted backward by 2 bytes (n37) and a 2-byte blank is created. next,
The timing data DPTR (the value of the display pointer indicates the sounding timing within that bar) and the note length data DUR are written into MEM (MPTR) of the automatic performance data memory (n38). Timing data is written in the upper 4 bits of this byte, and is multiplied by 9 _H to make 4 bits. Next, the depressed key code KC is written in the MEM (MPTR + i + 1) area of the performance data memory (n39). This completes the addition of notes to the performance data memory, displays the notes on the display 2 (score display 7) based on these data (n40), and returns.

On the other hand, when the edit mode flag CHG is set at n27, the specified automatic performance data (key code only) is rewritten to the key code pressed this time, so the edit mode flag is reset (n41) and the pickup switch After turning off the LED16 corresponding to (n42), n38
Proceed to. The rewriting mode is automatically released by the operation of n41 and n42. When it is possible to rewrite the same note many times without automatically canceling the rewriting mode, n41 and n42 may be skipped (broken line in the figure) to directly proceed to n38. In this case, the rewrite mode can be canceled by the operations of n62 and n63 in FIG.

FIG. 9 is a flowchart showing the operation corresponding to the pickup switch on event. When the pickup switch 15 is turned on, it is determined whether or not the edit mode flag CHG is set. If it is set, this set is released (the designation of the note to be rewritten is released). First, at n62, the edit mode flag CHG is reset, the LED 16 corresponding to the pickup switch 15 is turned off (n63), and the process returns.

If the edit mode flag CHG is reset,
Since it is the operation of selecting the note to be rewritten, 0 is set to the pointer i and counter j (n52), and MEM is set to the data buffer DT
The data of (MPTR + i) is fetched (n53), and it is determined whether the upper 4 bits of the data match the value of the display pointer DPTR (n55). If they match, the counter j is added and the value of the pointer i is assigned to the timing register STK (n56). In order to perform the same process for the next automatic performance data, i is incremented by 2 and the process returns to n53. MEM (MPTR +
i) = FE _H or FF _H , that is, until the end of this measure, the above n53 to n57 operations are performed, and when the measure ends
Continue from n54 to n58.

When the operation proceeds to n58, it is determined whether or not j = 1. Since j = 1 means that there is one note at the timing (DPTR) designated when the pickup switch 15 is turned on, it is assumed that this note is designated, and MPTR + STK data is written in the write pointer WPTR. And set the edit mode flag CHG (n60), then LE
Turn on D16 (n61) and return.

If j is not 1, the process directly returns from n58. In this case, when j = 0, that is, when there is no note at the timing indicated by the display pointer DPTR when the pickup switch 15 is turned on, this switch-on event is ignored, and when j ≧ 2, the above-mentioned FIG. (A)
As shown in, when the key is pressed while the pickup switch 15 is turned on, the designation of the note is accepted.

FIG. 10 shows the operation corresponding to the delete switch on event. This delete switch 17 is in edit mode (CHG =
1), that is, valid when one note is specified. Therefore, when CHG is reset, it returns with the judgment of n64. If CHG is set, the process proceeds from n64 to n65 to reset the edit mode flag CHG (n65), and delete the note corresponding to the automatic performance data indicated by the write pointer WPTR from the score display 7. (N66). Next, in order to delete this data from the performance data memory, the data after this automatic performance data is shifted forward by 2 bytes, and this data is deleted (n6
7). After this, LED16 is turned off (n68) and the process returns.

FIG. 11 shows the operation corresponding to the note switch-on event. The structure of the code length register DUR is made up of a 5-bit code length and 1-bit data indicating the presence or absence of a code point. Therefore, when the note switch is turned on, the data corresponding to the note switch (16th note: _2H , 8th note: _4H , 4th note: _6H , 2nd note: _8H , whole note: 10 _H ) in this note length buffer DUR
The least significant bit of is added to the new DUR contents (n69). Here, the least significant bit of DUR is a bit indicating the presence or absence of a code point. After this, it corresponds to the specified note
After turning on the LEDs (10a-10e) (n70), return.

FIG. 12 shows the operation corresponding to the mark-point switch-on event. When the dot switch 11 is turned on, the least significant bit of DUR is inverted (n71). If this bit becomes 1, as a result, to add a note point to the specified note, proceed from n72 to n73, turn on the LED 12 corresponding to the note point switch 11 and return, and as a result of inversion, this bit becomes 0. In case of, the LED12 is turned off (n74) and the process returns.

13 to 17 are flowcharts for explaining the operation when the cursor switch 8 is turned on.

FIG. 13 shows the operation when the cursor right switch 8a is turned on. When the cursor right switch 8a is turned on, first, the cursor that has been displayed so far is erased to move the cursor (n75). Next to display pointer DPTR
Is added (n76), and it is determined whether DPTR = 16 (measure end position) as a result of this addition (n77). DPTR <16
If so, it is still in the same bar, so it goes directly to n80.
On the other hand, when the addition result DPTR = 16, 0 is assigned to the display pointer DPTR (n78), and then the operation of displaying the next bar on the score display 7 (next bar operation: FIG. 14) is performed. Do (n79). This operation is similar to the operation when the next measure switch 8b is turned on. After this, proceed to n80.

In n80, the cursor is displayed based on the DPTR value (n8
0). That is, the scale 5a divided in units of 16th notes
The cursor 6 is displayed at the predetermined position.

Fig. 14 shows the operation when the next measure switch 8b is turned on. When this switch is turned on, the measure pointer MPTR is set to 2
The automatic performance data MEM of this address
This operation is repeated until (MPTR) becomes FE _H or FF _H (n81, n82). If MEM (MPTR) is FE _H or FF _H , this data is the current line because the data of FE _H is the bar line and the data of FF _H is the end line as explained in FIG. It is the last data of the bar displayed on the score display 7. At this time, proceed to n83. At n83, it is determined whether the matched data is FF _H or FE _H. Since FF _H is the end line data, there is no subsequent data. Therefore,
This position MEM (MPTR) so that data can be added
The bar line FE _H is written in and the end line FF _H is written in the next position MEM (MPTR + 1) (n85). By doing so, a note can be written in this new measure. The write operation is performed by the operation of n36 to n40 in FIG. After this, proceed to n85. On the other hand, if the matched data is FE _H , the process proceeds from n83 directly to n85. 1 is added to the bar pointer MPTR indicating the head of the bar (n85), and 1 is added to the bar number register BAR (n86). After executing the measure display operation (n8: Fig. 17), return.

FIG. 15 shows the operation when the cursor left switch 8c is turned on. When the cursor left switch 8c is turned on, first, the cursor that has been displayed so far is erased to move the cursor (n94). Next, 1 is subtracted from the display pointer DPTR (n95), and it is determined whether or not DPTR becomes a negative number (previous measure) as a result of this addition (n96). If DPTR ≧ 0, since it is still within the same bar, the process goes directly to n100. On the other hand, when the addition result DPTR <0, 15 is assigned to the display pointer DPTR (n97), and when the measure number register BAR is not 1 (n98), the previous measure is displayed on the score display 7. After performing the operation of displaying (previous bar operation: FIG. 16), the process proceeds to (n99) n100. When BAR = 1, there is no previous bar, so the process directly proceeds to n100. At n100, the cursor 6 is displayed based on the display pointer DPTR. If BAR = 1, the cursor will move within that bar.

FIG. 16 shows the operation when the front bar switch 8d is turned on. When this switch is turned on, it is first determined whether or not the value of the measure number register BAR is 1 (n101). B
If AR = 1, there is no previous bar and the process returns. If BAR> 1, proceed to n102 and subtract 1 from the bar pointer MPTR. MPTR until MEM (MPTR-1) becomes FE _H
Value is subtracted by 2 (n103, n104), MEM (MPTR-
1) = FE _H , MPTR is the beginning of the previous bar. Subtract 1 from BAR, execute measure display operation (n106), and return.

FIG. 17 shows the bar display operation. This operation is a subroutine performed in the operation corresponding to the next bar switch and the operation corresponding to the previous bar switch as described above. First, at n88, all the notes displayed on the display 2 are erased. Next, 1 is set to the pointer i (n8
9), the contents of performance data memory address MPTR + i is FE _H
Or until the FF _H, two consecutive bytes (MEM (MPTR +
i), MEM (MPTR + i + 1)) event information display 2
(N91). After that, 2 is added to i and the same operation is executed. When the content is FE _H or FF _H , the process proceeds to n93 to display the value of the bar number BAR and returns.

FIG. 18 is a flowchart showing the operation corresponding to the check switch on event. When the check switch 14 is turned on, an operation of automatically playing one bar before and after the bar having the display pointer DPTR, that is, a total of three bars is executed. Before starting this arithmetic operation, the operation of searching the start address (ST) and end address (ED) of the automatic performance is executed. n107 to n111 are operations for searching the start address of the previous bar, that is, the start address. First, it is determined whether or not the bar number (BAR) of the bar currently pointed to by DPTR is 2 or less (n107).
If it is 2 or less, the performance will always start at the beginning of the song, so set 0 in the start address register ST (n112) n1
Proceed to 13. When BAR ≧ 3, 2 is set to the pointer i (n108), and 2 is added to i until MEM (MPTR-i) = FE _H (n109, n110). For MEM (MPTR-i) = MPTR -i when becomes FE _H is the measure line previous to the previous measure, MPTR-i + 1 becomes the beginning of the previous measure, set this to start address register ST (n11 ). After this n
Continue to 113.

n113 to n120 are end address search operations. First n113
At 0, the pointer i and the bar line search counter FND are set to zero. Add 2 to i until MEM (MPTR + i) becomes FF _H or FE _H (n119). MEM (MPTR + i) = FF _H
If (end line) is reached, it means that there is no subsequent automatic performance data, so MPTR + i at that time is set in the end address register ED (n120) and the performance flag RUN is set.
Is set (n121), the start address (ST) is set in the performance address pointer PLY (n122), 0 is set in the tempo clock CLK (n123), and the process returns. On the other hand, M
When EM (MPTR + i) = FE _H (bar line), 1 is added to the bar line search counter FND (n116). If FND = 2 as a result, it is the last bar line of the bar next to the bar where the cursor 6 is located, so this address is made the end address (n120). Then, the operation of n121 is performed. FND <2 with n117
If (= 1), 1 for i to skip this bar line
After adding (n118), return to n114.

FIG. 19 is a flowchart showing the operation corresponding to the start switch on event. When the start switch 13 is turned on, all songs are automatically played. First, after setting the start address register ST to 0 (n124),
The performance data memory is searched and the address where the FF _H (end line) data is stored is assigned to the end address register ED (n125). Next, set the performance flag RUN (n12
6) Substitute ST contents into the performance address pointer PLY (n1
27), after setting the tempo clock CLK to 0 (n12
8) Return.

FIG. 20 is a flowchart showing the clock interrupt operation. Since the clock interrupt operation is valid only during the automatic performance operation, the performance flag RUN is first judged (n131), and if it is not set, the routine directly returns. When this flag is set, it is determined whether the address being played at that time is a bar line, that is, MEM (PLY) = FE _H (n132). If it is not a bar line, the upper 4 bits of the content (MEM (PLY)) are compared with 1/2 of the clock count number of the tempo clock register CLK (n1
33). That is, the first 4 bits of the note data are the data for storing the sounding timing, and the clock CLK is counted at a half cycle of this timing. If they match, it is the sounding timing, and the lower 4 bits of MEM (PLY) are assigned to the note length register DUR (n134). As shown in FIG. 5, the upper 3 bits of the note length data are numerical values representing the 16th note to the whole note, and the lowermost bit is the bit indicating the presence or absence of a note point. Since the tempo clock counts 2 in 16 note times, the value of 1/2 of the code length register DUR, that is, the value with the least significant bit truncated, is used as the exponent of 2 in order to calculate the above-mentioned count of note length (n135) , When the least significant bit is 1, there is a dot, so multiply this value by 1.5 (3/2) (n156, n137). Note that the reason that 1 is subtracted in n135 is to provide a key-off interval. At the address next to the address (BYTE) where the timing and note length data is stored, the key code of the musical sound to be played at that timing is stored, so ME
The data of M (PLY + 1) is assigned to the key code register KC (n138). Next, the tone generator 39 searches for a vacant tone generation channel and sets the channel number in the assigned channel register ASS (n139). The contents of KC etc. are transmitted to the ASS channel of the tone generator and key-on processing is performed to start sounding (n140). next,
CNT to counter buffer CNTBF (ASS) of this channel
Substitute the value of (n141). That is, the musical sound of the ASS channel is produced until the value of CNTBF (ASS) is counted down to zero.

After this, 2 is added to the performance address pointer PLY (n142). If the content of PLY is less than or equal to the value of the end address register ED, the process returns to n132, and if the value of PLY exceeds the content of ED, the performance flag RUN is reset (n14
4) Return.

On the other hand, if MEM (PLY) = FE _H in n132, or if the upper 4 bits of MEM (PLY) are not equal to CLK / 2 in n133, the operation proceeds to n145 and below. in n145
Key-off processing is performed on the channel ASS for which CNTBF (ASS) = 0, and the counter buffer CN of the previous channel
The content of TBF (ASS) is decremented by 1 (n146). However, CNTB
Subtraction is not performed for channels for which F (ASS) = 0. After this, 1 is added to the tempo clock register CLK (n147) and the process returns. In this case, if LCK = 32, counting for one bar has been completed, so CLK is cleared (n149), and the address of the bar line (FE _H ) is skipped. Add 1 (n150) and return.

(G) Effect of the Invention As described above, in the automatic performance device of the present invention, if one point of the performance data stored in the automatic performance storage means is designated by the pointer means, the predetermined section before and after that can be automatically played. Since this is possible, this can be done even while the music is being edited, and the feeling of the newly modified and inserted sound can be immediately grasped. Further, by doing so, the reference pointer can be prevented from moving during the automatic performance, so that it is possible to return to the performance state after viewing.

[Brief description of drawings]

FIG. 1 is a block diagram of an electronic musical instrument which is an embodiment of the present invention, FIG. 2 is a schematic configuration diagram of an operation panel of the electronic musical instrument, FIG. 3 is a partial configuration diagram of a register, FIG. 4 and FIG. Is a diagram showing the structure of the automatic performance memory and the format of the automatic performance data, and FIG. 6 is a diagram showing a state in which the automatic performance data is expressed as notes. 7 to 20 are flowcharts showing the operation of this electronic musical instrument. 6 ... Pointer, 14 ... Check switch.

Claims (2)

(57) [Claims] 1. Performance data storage means for storing automatic performance data, pointer means for pointing to any one address in the performance data storage means by operation, and predetermined sections before and after the automatic performance data pointed to by the pointer means. An automatic performance device characterized in that it includes a listening means for performing a performance. 2. Performance data storage means for storing automatic performance data, pointer means for pointing to any one address in the performance data storage means by operation, and automatic performance stored at the address pointed to by this pointer means. Editing means including an operation of rewriting the contents of data or an operation of inserting new automatic performance data at an address pointed to by the pointer means; and a listening means for playing a predetermined section before and after the address pointed to by the pointer means. An automatic performance device characterized by that.