JP2024153281A - Imaging device - Google Patents

Abstract

[Problem] To provide an imaging device that performs shading correction while avoiding deterioration of responsiveness under shooting conditions in which responsiveness deteriorates due to the generation of correction values. [Solution] The imaging device has an imaging element including a plurality of pixels arranged in a matrix, each including a photoelectric conversion element, and a plurality of column circuits, each of which is provided for a plurality of pixel columns, a storage unit that stores a first correction value for each of the plurality of column circuits, a generation unit that generates a second correction value for each of the plurality of column circuits using signals read out from the plurality of pixels, a selection unit that selects one of the first correction value and the second correction value, and a correction unit that corrects an image using the correction value selected by the selection unit, and the selection unit selects one of the first correction value and the second correction value depending on the shooting conditions when the generation unit generates the second correction value. [Selected Figure] Figure 11

Description

The present invention relates to an imaging device.

In imaging elements such as CMOS sensors, horizontal shading exists depending on the non-uniformity of the memory in the readout circuit for each column or the distance from the memory to the output line where the signal is output. Shading differs depending on the imaging element, the driving conditions, and the driving mode of the imaging element, so correction is required for each combination of imaging element, driving conditions, and driving mode.

Patent Document 1 discloses an imaging device that generates a correction value based on a signal read from an imaging element when a change in driving conditions or driving mode occurs, and corrects the image using the correction value to suppress shading.

JP 2021-097384 A

However, in the imaging device of Patent Document 1, the generation of correction values may span multiple frames. In this case, imaging is performed without switching the driving conditions or driving mode until the generation of correction values is completed, so a time lag occurs between receiving a switching instruction and switching the driving conditions or driving mode. In other words, the responsiveness of the imaging device deteriorates, which may cause problems such as the user missing the decisive moment when shooting.

The present invention aims to provide an imaging device that performs shading correction while avoiding deterioration of responsiveness under shooting conditions in which responsiveness deteriorates due to the generation of correction values.

An imaging device according to one aspect of the present invention has an imaging element including a plurality of pixels arranged in a matrix, each including a photoelectric conversion element, and a plurality of column circuits, each of which is provided for a plurality of pixel columns; a storage unit that stores a first correction value for each of the plurality of column circuits; a generation unit that generates a second correction value for each of the plurality of column circuits using signals read out from the plurality of pixels; a selection unit that selects one of the first correction value and the second correction value; and a correction unit that corrects an image using the correction value selected by the selection unit, wherein the selection unit selects one of the first correction value and the second correction value depending on the shooting conditions when the generation unit generates the second correction value.

The present invention provides an imaging device that performs shading correction while avoiding deterioration of responsiveness under shooting conditions in which responsiveness deteriorates due to the generation of correction values.

1 is a diagram showing the arrangement of an image capturing apparatus according to an embodiment of the present invention. FIG. 2 is a diagram illustrating a configuration of an image sensor according to the first embodiment. FIG. 2 is a diagram showing a circuit configuration of a pixel according to the first embodiment. FIG. 1 is a diagram illustrating a configuration of an AD converter according to a first embodiment. FIG. 2 is a diagram showing a configuration of a pixel region according to the first embodiment; FIG. 2 is a diagram illustrating a configuration of a vertical scanning circuit according to the first embodiment. 4 is a timing chart showing the operation of the image sensor according to the first embodiment. FIG. 2 is a diagram illustrating a configuration of a correction circuit according to the first embodiment. 4 is a conceptual diagram illustrating an operation of generating a correction value of the correction circuit according to the first embodiment; 4 is a conceptual diagram showing an operation of generating a correction value of the correction circuit according to the first embodiment; FIG. 4 is a flowchart showing a shooting operation of the imaging apparatus according to the first embodiment. FIG. 4 is a diagram showing a data table in the first embodiment. 2 is a conceptual diagram showing states and operations of components of the imaging apparatus according to the first embodiment. FIG. 2 is a conceptual diagram showing states and operations of components of the imaging apparatus according to the first embodiment. FIG. 2 is a conceptual diagram showing states and operations of components of the imaging apparatus according to the first embodiment. FIG. 2 is a conceptual diagram showing states and operations of components of the imaging apparatus according to the first embodiment. FIG. 2 is a conceptual diagram showing states and operations of components of the imaging apparatus according to the first embodiment. FIG. 2 is a conceptual diagram showing states and operations of components of the imaging apparatus according to the first embodiment. FIG. 10 is a flowchart showing a shooting operation of an imaging apparatus according to a second embodiment. 10A and 10B are conceptual diagrams showing states and operations of components of an imaging apparatus according to a second embodiment. 10A and 10B are conceptual diagrams showing states and operations of components of an imaging apparatus according to a second embodiment. 10A and 10B are conceptual diagrams showing states and operations of components of an imaging apparatus according to a second embodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used to refer to the same components, and duplicated descriptions will be omitted.
First Embodiment
1 is a block diagram showing the configuration of an image capturing apparatus 1000 according to an embodiment of the present invention. The image capturing apparatus 1000 is, for example, a digital camera, and has a still image capturing function and a moving image capturing function.

The imaging device 1000 has an imaging element 100, a DSP 101, a CPU (control unit) 102, a RAM 103, a ROM (storage unit) 104, an operation unit 105, a display unit 106, a recording unit 107, a path 108, and an imaging lens 109.

The image sensor 100 converts the optical image formed by the imaging lens 109 into an electrical signal (analog pixel signal), then performs AD conversion according to a predetermined quantization bit rate and outputs digital image data (hereinafter referred to as image data). The DSP 101 performs correction processing, compression processing, etc. on the image data received from the image sensor 100. The CPU 102 provides overall control of the imaging device 1000. The CPU 102 is connected to each unit via a path 108.

RAM 103 is an image memory for temporarily storing image data output from the image sensor 100 and image data processed by the DSP 101. RAM 103 is also used as a work memory for the CPU 102. In this embodiment, RAM 103 is used as the image memory and work memory, but other memories may be used as long as there is no problem with access speed.

The ROM 104 stores data necessary for the operation of the imaging device 1000, such as programs run by the CPU 102 and pre-stored correction values used during correction. In this embodiment, a flash ROM is used as the ROM 104, but other memories may be used as long as there is no problem with access speed.

The operation unit 105 includes a main switch for starting up the imaging device 1000, a shooting switch with which the user commands the imaging device 1000 to shoot still images or videos, and is also used when setting shooting conditions, etc.

Under the control of the CPU 102, the display unit 106 displays still images or moving images according to the image data, as well as menus, etc.

The recording unit 107 is, for example, a non-volatile memory or a hard disk, and stores image data, etc. In this embodiment, the recording unit 107 is built into the imaging device 1000, but it may also be an external recording medium such as a memory card that is detachable via a connector, etc.

Figure 2 is a diagram showing the configuration of the image sensor 100. The image sensor 100 includes a pixel section 210. The pixel section 210 includes a plurality of pixels 200, each including a photoelectric conversion element (photodiode). The plurality of pixels 200 are made up of pixels R0_0 to Bm-1_n-1 (m and n are integers equal to or greater than 0), and are arranged in a matrix. Note that R, G, and B indicate that red, green, and blue color filters are arranged, respectively.

Figure 3 is a diagram showing the circuit configuration of pixel 200. Photodiode (hereinafter PD) 201 photoelectrically converts incident light and accumulates charge according to the amount of exposure. By setting the control signal tx to a high level, transfer gate 202 turns on (conducts), and the charge accumulated in PD 201 is transferred to floating diffusion section (hereinafter FD section) 203. FD section 203 is connected to the gate of amplification MOS transistor 204. Amplification MOS transistor 204 outputs a voltage signal according to the amount of charge transferred from PD 201 to FD section 203. Reset switch 205 is a switch for resetting the charge of FD section 203 and PD 201. By setting the control signal res to a high level, reset switch 205 turns on (conducts), and the charge of FD section 203 is reset. Furthermore, when resetting the charge of the PD 201, the control signal tx and the control signal res are simultaneously set to high level, so that both the transfer gate 202 and the reset switch 205 are turned on, and the charge of the PD 201 is reset via the FD section 203. The pixel selection switch 206 is turned on (conductive) by setting the control signal sel to high level, and connects the amplification MOS transistor 204 and the output terminal vout 207. As a result, the pixel signal converted into a voltage signal by the amplification MOS transistor 204 is output from the output terminal vout 207.

Returning to FIG. 2, the vertical scanning circuit 303 supplies control signals res, tx, sel, etc. to each of the multiple pixels 200. These control signals are supplied to the terminals res, tx, and sel of each of the multiple pixels 200, respectively.

The output terminal vout207 is connected to the column output line 300. Taking column 0, in which pixel R0_0 is arranged, as an example, pixels from pixel R0_0 in the 0th row to pixel Gm-1_0 in the (m-1)th row are connected to the column output line 300. This connection pattern is the same for each column.

The column output line 300 is connected to the input of an AD converter (ADC) 301. The AD converter 301 performs analog-to-digital conversion of the optical signal and noise signal output from the pixel 200. A current source 302 is connected to the column output line 300. A source follower circuit is formed by the current source 302 and the amplifying MOS transistor 204 connected to the column output line 300.

Figure 4 is a diagram showing the configuration of an AD converter 301 according to an embodiment. The AD converter 301 has a comparator 324, Latch_N 325, Latch_S 326, and switches 327 and 328. The signal output by the column output line 300 is input to the comparator 324. In addition, the comparator 324 receives a ramp signal output from the ramp signal generator (Ramp) 306 via a signal line 321.

Latch_N325 is a memory element for holding the noise level (N signal), and Latch_S326 is a memory element for holding the signal level (S signal). The counter value output from counter 305 via signal line 320 is input to Latch_N325 and Latch_S326. Latch_N325 holds the counter value at the time when the inverted output is input from comparator 324 as the digital signal value of the N signal, and Latch_S326 holds the counter value at the time when the inverted output is input from comparator 324 as the digital signal value of the S signal.

The N signal held in Latch_N325 and the S signal held in Latch_S326 are output to the S-N calculation unit 308 via switches 327 and 328 and common output lines 322 and 323, respectively.

The ramp signal generator 306 has a function of outputting ramp signals with multiple types of slopes. The CPU 102 sets the slope of the ramp signal according to the setting of the ISO sensitivity of the imaging device 1000. In this embodiment, a higher gain is applied as the ISO sensitivity of the imaging device increases, but the present invention is not limited to this.

Switches 327 and 328 are controlled by a control signal from horizontal scanning circuit 304. Digital signals are output to S-N calculation unit 308 in sequence, a process called horizontal transfer. S-N calculation unit 308 subtracts the N signal from the input S signal. This operation generates an image signal in which noise components caused by the readout circuit have been cancelled, or a correction value generation signal, which will be described later.

The data output from the S-N calculation unit 308 is input to the correction circuit 309. The correction circuit 309 performs offset correction or correction value generation for each column, which will be described later. The data output from the correction circuit 309 is input to the data output unit 310, and is output from the data output unit 310 to the outside of the image sensor 100.

Figure 5 is a diagram showing the configuration of a pixel region (pixel array) in the image sensor 100. The image sensor 100 has a VOB region (vertical optical black section) and a HOB region (horizontal optical black section), which are light-shielded pixel regions in which a plurality of light-shielded pixels are arranged, and an effective pixel region (pixel section) in which a plurality of effective pixels for capturing an image of a subject are arranged. n columns of pixels are arranged in the horizontal direction (pixel row direction) and m rows of pixels are arranged in the vertical direction (pixel column direction). In addition, in the vertical direction (pixel column direction), the VOB region has h (h is an integer greater than 0) rows of pixels, and the effective pixel region has 12i (i is an integer greater than 0) rows of pixels.

The VOB area is used when reading image data or when reading data for generating correction values, which will be described later, and the HOB area and the effective image area are used when reading image data. The vertical scanning operation for reading signals from the VOB area, HOB area, and effective image area, and the control signal sel that determines the electrical connection between the pixels and the column output lines 300 are controlled by the vertical scanning circuit 303.

Figure 6 is a diagram showing the configuration of the vertical scanning circuit 303. The CPU 102 inputs a vertical synchronization signal VD and a horizontal synchronization signal HD (not shown) to the image sensor 100. The horizontal synchronization signal HD is asserted for each row readout, and the vertical synchronization signal VD is asserted for each frame of the image. The horizontal counter 330 resets the count value to 0 when the horizontal synchronization signal HD is asserted, and increments the count value for each clock (not shown) input to the image sensor 100. The vertical counter 331 resets the count value to 0 when the vertical synchronization signal VD is asserted, and increments the count value for each horizontal synchronization signal HD is asserted.

The row selection circuit 332 refers to the vertical counter value input from the vertical counter 331, and calculates and outputs the readout selected row and the shutter selected row. The row selection circuit 332 receives the image readout start timing setting 334 and the image readout area setting 335 set by the CPU 102. When the vertical counter value matches the image readout start timing setting 334, the row selection circuit 332 selects the readout row from the top end of the area set in the image readout area setting 335 (starts reading image data). Each time the vertical counter value is incremented, the selected readout row is changed sequentially toward the bottom of the area.

In this embodiment, the image sensor 100 controls exposure with a slit rolling shutter. A shutter start timing setting 339 set by the CPU 102 is input to the row selection circuit 332. When the vertical counter value matches the shutter start timing setting 339, the row selection circuit 332 selects a row to be shuttered from the top end of the area set in the image readout area setting 335 (starts shuttering). Each time the vertical counter value is incremented, the selected row to be shuttered is changed sequentially toward the bottom of the area.

In addition, in this embodiment, the image sensor 100 has a function of reading out data for generating correction values (correction data) outside the image data readout period. A correction data readout start timing setting 336, a correction data readout area setting 337, and a correction data readout period setting 338 set by the CPU 102 are input to the row selection circuit 332. When the vertical counter value matches the correction data readout start timing setting 336, the row selection circuit 332 selects a readout row from the top end of the area set in the correction data readout area setting 337 (starts reading correction data). Each time the vertical counter value is incremented, the selected readout row is changed sequentially toward the bottom of the area. Also, within the period of the vertical counter value set in the correction data readout period setting 328, correction data reading of the area set in the correction data readout area setting 337 is repeated.

In this embodiment, the CPU 102 sets the VOB area, HOB area, and effective pixel area as image data readout areas, and sets the VOB area as the correction data readout area. Note that the setting of the correction data readout area is not limited to this, and can also be applied to a configuration in which the VOB area, HOB area, and part of the effective pixel area are set. As described above, the readout selection row and shutter selection row are determined and input to the decoder 333.

The res setting A350 set by the CPU 102 is input to the res generation circuit 345. The res generation circuit 345 refers to the horizontal counter value and transitions the output signal that is the source of the control signal res to High (H) or Low (L) based on the res setting A350.

The sel generation circuit 344 receives the sel setting A349 set by the CPU 102. The sel generation circuit 344 refers to the horizontal counter value and transitions the output signal that is the source of the control signal sel to High or Low based on the sel setting A349.

The tx_sh generation circuit 343 receives the tx_sh setting A348 set by the CPU 102. The tx_sh generation circuit 343 refers to the horizontal counter value and transitions the output signal that is the source of the control signal tx_sh to High or Low based on the tx_sh setting A348.

The selector 346 receives tx setting A 347a and tx setting B 347b set by the CPU 102. Based on the select signal output from the row selection circuit 332, tx setting A 347a or tx setting B 347b is selected. The row selection circuit 332 outputs a select signal that selects tx setting A 347a during the image data read period and selects tx setting B 347b during the correction data read period. The tx setting output from the selector 346 is input to the tx generation circuit 342. The tx generation circuit 342 refers to the horizontal counter value and transitions the output signal that is the source of the control signal tx to High or Low based on the tx setting.

The decoder 333 sequentially asserts a read row selection signal 0 for the 0th row, a read row selection signal 1 for the 1st row, ... based on the read selection row output from the row selection circuit 332. Also, the decoder 333 sequentially asserts a shutter row selection signal 0 for the 0th row, a shutter row selection signal 1 for the 1st row, ... based on the shutter selection row output from the row selection circuit 332.

As shown in FIG. 6, a logical product 340 or logical sum 341 is formed between the output of each generating circuit and the output of the decoder 333, and res_0, sel_0, and tx_0, which are the control signals res, sel, and tx for the 0th row, are generated. The same applies to the 1st row and onwards.

Now, the image data read or correction data read operation will be described with reference to FIG. 7. FIG. 7 is a timing chart showing the operation of the image sensor 100.

Figure 7 (a) shows the operation of the image sensor 100 when reading image data.

At time ta0, the control signal tx goes high, and the transfer gate 202 turns on (conducts). At this time, the control signal res of the reset switch 205 goes high. Then, the charge accumulated in the PD 201 is transferred to the power supply 208 via the transfer gate 202 and the reset switch 205, and the PD 201 is reset (a reset operation by the slit rolling shutter).

At time ta1, the control signal tx is set to low, and charge accumulation in PD201 begins.

At time ta2, the control signal sel of the pixel selection switch 206 becomes High, and the source of the amplification MOS transistor 204 is connected to the column output line 300.

At time ta3, the reset of the FD section 203 is released by setting the control signal res of the reset switch 205 to Low. At this time, a potential of a reset signal level according to the potential of the FD section 203 is output to the column output line 300 via the amplification MOS transistor 204 and input to the AD converter 301. A noise level is output to the output terminal vout of each pixel, and a signal of the pixel noise level is output to the column output line 300.

At time ta4, TG307 drives AD converter 301 to start AD conversion. Here, the noise level signal output to column output line 300 is AD converted. As AD conversion starts, counter 305 starts incrementing the count value. The signal level of column output line 300 and the ramp signal level output from ramp signal generator 306 are compared by comparator 324, and the counter value at the point of match is stored in Latch_N325, thereby performing AD conversion.

At time ta5, when the AD conversion is completed, each AD converter 301 holds the AD converted noise level (N signal).

At time ta6, the vertical scanning circuit 303 sets the drive signal tx to High and turns on the transfer gate 202 of the pixel 200. Then, the signal charge stored in the PD 201 of each pixel is transferred to the gate of the source follower composed of the amplification MOS transistor 204. The potential of the source follower fluctuates from the reset level by an amount corresponding to the transferred signal charge, and the signal level is determined. At this time, the signal level is output to the output terminal vout of each pixel, and the pixel signal level is output to the column output line 300.

At time ta7, the drive signal tx is set to Low, completing the transfer of the signal from PD201.

At time ta8, TG307 drives AD converter 301 to start AD conversion. Here, the signal levels output to each column output line are AD converted.

At time ta9, when the AD conversion is completed, the AD converter 301 holds the AD converted signal level (S signal).

At time ta10, res is set to High, and the FD unit 203 is reset again. In addition, data output to the outside of the image sensor 100 is started. The horizontal scanning circuit 304 starts horizontal scanning, and sequentially transfers the N signal and S signal of the AD converter 301 of each column to the S-N calculation unit 308. The S-N calculation unit subtracts the N signal from the S signal for each column, and the data is output from the data output unit 310 via the correction circuit 309.

At time ta11, sel goes low, and then at time ta12, when data output for all columns is completed, one transfer unit of data output is completed.

Figure 7 (b) shows the operation of the image sensor 100 when reading correction data.

At time tb0, the control signal sel of the pixel selection switch 206 becomes High, and the source of the amplification MOS transistor 204 is connected to the column output line 300.

At time tb1, the reset of the FD section 203 is released by setting the control signal res of the reset switch 205 to Low. At this time, a potential of a reset signal level according to the potential of the FD section 203 is output to the column output line 300 via the amplification MOS transistor 204 and input to the AD converter 301. A noise level is output to the output terminal vout of each pixel, and a signal of the pixel noise level is output to the column output line 300.

At time tb2, TG307 drives AD converter 301 to start AD conversion. Here, the noise level signal output to column output line 300 is AD converted. As AD conversion starts, counter 305 starts incrementing the count value. The signal level of column output line 300 and the ramp signal level output from ramp signal generator 306 are compared by comparator 324, and the counter value at the point of match is stored in Latch_N325, thereby performing AD conversion.

At time tb3, when the AD conversion is completed, the AD converter 301 holds the AD converted noise level (N signal).

At time tb4, TG307 again drives AD converter 301 to start AD conversion. That is, the noise level output to each column output line is AD converted.

When the AD conversion is completed at time tb5, the AD converter 301 holds the AD converted noise level (N' signal). The noise level held here and the initial noise level differ in time (timing) from the state in which res is set to Low and the reset is released. In this embodiment, the difference between the noise levels acquired twice related to this time is treated as column offset noise specific to each column circuit (column output line 300, AD converter 301, etc.) and is subject to correction.

At time tb6, res is set to High, and the FD unit 203 is reset again. At the same time, data output to the outside of the image sensor 100 is started. The horizontal scanning circuit 304 starts horizontal scanning, and sequentially transfers the N signal and N' signal of the AD converter 301 of each column to the S-N calculation unit 308. The S-N calculation unit subtracts the N signal from the N' signal for each column, and inputs the result to the correction circuit 309.

At time tb7, sel goes low.

When data output for all columns is completed at time tb8, one transfer unit of data output is completed.

In this way, when the correction data is read, no charge is transferred from PD 201. As a result, the VOB area read out when the image data is read contains dark current components according to the same accumulation time as the effective pixel area, and can be used for OB clamp processing to determine the black level of the effective pixel area.

Next, the configuration of the correction circuit 309 will be described with reference to FIG. 8. FIG. 8 is a diagram showing the configuration of the correction circuit 309, including the connection with the S-N calculation unit 308. The image data and correction data output from the S-N calculation unit 308 are input to the correction unit 361 or the correction value generation circuit (generation unit) 360.

The SSG 362 counts the number of input data and controls the operation timing of the correction unit 361 or the correction value generation circuit 360. This controls the generation of correction values and correction for each column.

As described with reference to FIG. 7(b), the correction value generation circuit 360 generates a correction value for each column circuit (column output line 300, AD converter 301, etc.) from the correction data output from the S-N calculation unit 308.

RAM 363 has RAM_A 363a and RAM_B 363b. Either one of the RAMs is used to store correction values for the image data to be read. The RAM not used for correction generates or holds correction values, or is powered down.

The correction unit 361 subtracts the correction value output from the RAM 363 for each column circuit from the image data to perform offset correction. Then, the correction unit 361 outputs the data to the data output unit 310.

The correction value selector (selection unit) 364 selects the correction value to be used for correction according to the setting value set by the CPU 102, and stores the selected correction value in the RAM 363.

In this embodiment, when x is set in the correction value selector 364, the correction value (second correction value) X generated by the correction value generation circuit 360 is selected, and the correction value is stored in the RAM 363. When y is set in the correction value selector 364, the correction value (first correction value) Y pre-stored in the ROM 104 is selected, and the correction value is stored in the RAM 363.

Here, we will explain the operation of the correction circuit 309. As shown in FIG. 2, there are two correction circuits 309, one above the other, so correction data for only even columns or odd columns is input to each correction circuit 309.

Figures 9 and 10 are conceptual diagrams showing the operation of generating correction values in the correction circuit 309 to which correction data for even columns is input. When x is set in the correction value selector 364, correction data for each column is input to the correction value generation circuit 360 for a predetermined number of rows. In the correction value generation circuit 360, the correction data is added for each column, passes through the correction value selector 364, and is stored in RAM_A 363a or RAM_B 363b in RAM 363.

On the other hand, when y is set in the correction value selector 364, the correction values previously stored in the ROM 104 are output by the CPU 102 from the ROM 104 to the correction value selector 364 for each column. The correction values pass through the correction value selector 364 and are stored in RAM_A 363a or RAM_B 363b in the RAM 363.

As shown in FIG. 10, when the reading of image data starts, image data is input to the correction unit 361 one row at a time. The correction unit 361 sequentially reads out correction values corresponding to the columns of the input image data from the RAM 363. The read out correction values are averaged by the number of correction data added, and image data is subtracted for each column. In this way, offset correction is applied for each column. Note that, although the above configuration is used for the generation and correction of correction values in this embodiment, the present invention is not limited to this configuration.

The state and operation of the imaging device 1000 of this embodiment will be described below. FIG. 11 is a flowchart showing the shooting operation of the imaging device 1000 of this embodiment. FIG. 12 is a diagram showing a data table. FIGS. 13A to 13F are conceptual diagrams showing the state and operation of each component of the imaging device 1000.

When the photographer presses the power switch of the imaging device 1000 on the operation unit 105, the imaging device 1000 is powered on and preparation for LV (live view) shooting begins.

In step S100, the CPU 102 acquires the shooting conditions. The shooting conditions include the video mode and ISO sensitivity set in the image sensor.

In step S101, the CPU 102 references data for determining the setting value (correction value selector setting value) to be set in the correction value selector 364 from the shooting conditions acquired in step S100, and acquires the correction value selector setting value. In this embodiment, the correction value selector setting value is defined by a combination of the mode and ISO sensitivity when the correction data is read, and is stored in the imaging device 1000 as a table structure. The setting value table 365 in FIG. 12 is shown as an example. In this embodiment, the correction value selector setting value is determined by referring to the setting value table 365.

A method of defining the set value table 365 will be described. When the correction value generation circuit 360 generates the correction value X, the time required for generation can be calculated, and this is set as the correction value generation time _tc . The correction value generation time _tc makes it possible to judge the quality of the responsiveness of the imaging device 1000 until the generated correction value is reflected. The longer the correction value generation time _tc, the longer the time until the generated correction value is reflected, and the worse the responsiveness becomes.

Therefore, a time lag judgment time (predetermined time) _t0 for judging "deterioration of responsiveness" is set in advance (the setting method is arbitrary). When the correction value generation time _tc is shorter than the time lag judgment time _t0 , it is judged that the responsiveness does not deteriorate, and when the correction value generation time _tc is longer than the time lag judgment time _t0, it is judged that the responsiveness deteriorates. In this embodiment, when the correction value generation time _tc is shorter than the time lag judgment time _t0 , x is set to the correction value selector 364, and when the correction value generation time _tc is longer than the time lag judgment time _t0 , y is set to the correction value selector 364. Note that when the correction value generation time _tc is equal to the time lag judgment time _t0 , either x or y may be set to the correction value selector 364.

Furthermore, since the correction value generation time _tc will give different calculation results depending on the combination of the mode when the correction data is read and the ISO sensitivity, a setting value table 365 shown in FIG. 12 is defined.

Based on the above explanation, the operation of step S101 will be explained with reference to Figures 13A and 13B.

13A shows the state and operation of the image capture device 1000 operating in live view mode with an ISO sensitivity of 200. The correction value generation time _tc at this time is shorter than the time lag determination time _t0 , indicating that there is no deterioration in the responsiveness of the image capture device 1000. In step S101, the setting value table 365 is referenced and x is obtained as the correction value selector setting value.

13B shows the state and operation of the image capture device 1000 operating in live view mode with an ISO sensitivity of 12800. The correction value generation time _tc at this time is equal to or longer than the time lag determination time _t0 , indicating a state in which the responsiveness of the image capture device 1000 deteriorates. In step S101, the setting value table 365 is referenced, and y is obtained as the correction value selector setting value.

In step S102, the CPU 102 sets the correction value selector setting value determined in step S101 to the correction value selector 364.

In step S103, the CPU 102 determines whether the correction value selector setting value set in step S102 is x. If the CPU 102 determines that the correction value selector setting value is x, it executes the process of step S104, and if the CPU 102 determines that the correction value selector setting value is not x, i.e., is y, it executes the process of step S108.

In step S104, the CPU 102 sets the number of rows of correction data required to generate a correction value. As described above, the correction value generation circuit 360 adds correction data for each column, and the number of additions is determined by this set value. In this embodiment, the required number of additions is determined by the gain applied to the AD converter 301. When the gain is high, there is a lot of noise, so the number of additions is increased to reduce the effect of noise. Note that the method of determining the number of rows is not limited to this. In the first frame, correction data is read and a correction value is generated to correct the moving image of the next frame (frame LV_1 in FIG. 13A).

In step S105, the CPU 102 sets the image sensor 100 to ON for reading correction data and OFF for reading moving image data.

In step S106, the CPU 102 sets the correction circuit 309 to OFF correction and ON correction value generation.

In step S107, the CPU 102 reads the correction data. The correction data is read from the VOB area. The operation of the imaging device 1000 at this time is shown in frame LV_0 of FIG. 13A. The read correction data is input to the correction circuit 309, and a correction value is generated. Here, it is assumed that the correction value is stored in RAM_A 363a.

In step S108, the CPU 102 copies the correction values used for correction from the shooting conditions acquired in step S100 from the ROM 104 to the RAM 363. At this time, the correction values expanded from the ROM 104 pass through the correction value selector 364, and are stored in the RAM_A 363a. Figure 13C shows the state and operation of the imaging device 1000 at this time.

In step S109, the CPU 102 sets the image sensor 100 to read moving image data. It sets the image sensor 100 to read moving image data ON and to read correction data OFF.

In step S110, the correction circuit 309 is set to ON for correction and OFF for correction value generation.

In step S111, the CPU 102 reads out the moving image data. If it is determined in step S103 that the correction value selector setting value is x, the moving image data is read out as shown in frame LV_1 of FIG. 13A. If it is determined in step S103 that the correction value selector setting value is y, the moving image data is read out as shown in frame LV_1 of FIG. 13C. At this time, the moving image data is corrected using the correction value stored in RAM_A363a and output to the outside of the image sensor 100. The moving image data read out from the image sensor 100 is subjected to predetermined corrections, compression, etc. in the DSP 101, and is displayed on the display unit 106.

By performing the above operations, as shown in FIG. 13B, under shooting conditions in which responsiveness deteriorates when a correction value is generated by the correction value generation circuit 360, the deterioration of responsiveness can be avoided by selecting a pre-stored correction value for correction as shown in FIG. 13C.

In step S112, the CPU 102 determines whether the photographer has pressed a menu button included in the operation unit 105. If the CPU 102 determines that the button has been pressed, it ends live view shooting and the display on the display unit 106, and if it determines that the button has not been pressed, it executes the process of step S113.

In step S113, the CPU 102 determines whether the ISO sensitivity has been changed. If the CPU 102 determines that the ISO sensitivity has been changed, it executes the process of step S114, and if the CPU 102 determines that the ISO sensitivity has not been changed, it executes the process of step S109.

The processes in steps S114 to S116 are the same as those in steps S100 to S102, respectively, and therefore will not be described here.

In step S117, the CPU 102 determines whether the correction value selector setting value set in step S116 is x. If the CPU 102 determines that the correction value selector setting value is x, it executes the process of step S118, and if the CPU 102 determines that the correction value selector setting value is not x, i.e., is y, it executes the process of step S123.

After the CPU 102 executes the process of step S117, it executes the process of step S118, which is when the correction value generation circuit 360 generates a correction value. Here, the case of moving from frame LV_1 in FIG. 13A to frame LV_2 in FIG. 13D will be described.

In step S118, the CPU 102 sets the number of rows of correction data required to generate a correction value. The number of rows of correction data required to be read is set according to the set ISO sensitivity.

In step S119, the CPU 102 sets the image sensor 100 to ON for reading correction data and ON for reading moving image data.

In step S120, the CPU 102 sets the correction circuit 309 to ON for correction and ON for correction value generation.

The processing of steps S118 to S120 is performed in frame LV_1 of FIG. 13A.

In step S121, the CPU 102 reads out the moving image data and the correction data. The operation of the imaging device 1000 at this time is shown in frame LV_2 of FIG. 13D. First, the moving image data before the ISO sensitivity is switched is read out. At this time, the moving image data is corrected with the correction value stored in RAM_A 363a and output to the outside of the imaging element 100. The moving image data read out from the imaging element 100 is subjected to predetermined corrections, compression, etc. in the DSP 101 and displayed on the display unit 106. Thereafter, reading of the correction data in the VOB area is started at the timing of vertical count=A, which is immediately after the end of the image data reading. The read correction data is input to the correction circuit 309, and a correction value is generated. Here, it is assumed that the correction value is stored in RAM_A 363b.

In step S122, the CPU 102 determines whether the generation of the correction value corresponding to the changed ISO sensitivity has been completed. If the CPU 102 determines that the generation of the correction value corresponding to the changed ISO sensitivity has been completed, the CPU 102 executes the process of step S112. Here, if the CPU 102 executes the processes of steps S109 to S112 after executing the processes of steps S112 and S113, the processes of steps S109 and S110 are performed in frame LV_2 in FIG. 13D. Also, the processes of steps S111 and S112 are performed in frame LV_3 in FIG. 13D. If the CPU 102 determines that the generation of the correction value corresponding to the changed ISO sensitivity has not been completed, the CPU 102 executes the process of step S119.

After the CPU 102 executes the process of step S117, it executes the process of step S123, which is when the correction value generation circuit 360 generates a correction value. Here, the case of moving from frame LV_1 in FIG. 13C to frame LV_2 in FIG. 13E will be described.

The processing in steps S123 and S124 is the same as the processing in steps S109 and S110, respectively, and therefore will not be described. Steps S123 and S124 are performed in frame LV_1 in FIG. 13C.

In step S125, the CPU 102 reads out the moving image. The state and operation of the imaging device 1000 at this time are shown in frame LV_2 of FIG. 13E. The moving image data before the ISO sensitivity is switched is read out. At this time, the moving image data is corrected with the correction value stored in RAM_B 363a and output to the outside of the imaging element 100. The moving image data read out from the imaging element 100 is subjected to predetermined corrections, compression, etc. in the DSP 101 and displayed on the display unit 106.

In step S126, the CPU 102 copies the correction values used for correction based on the shooting conditions acquired in step S114 from the ROM 104 to the RAM 363. At this time, the correction values expanded from the ROM 104 pass through the correction value selector 364, and are stored in the RAM_A 363b.

When the CPU 102 executes the processes of steps S109 to S112 after executing the processes of steps S126, S112, and S113, the processes of steps S109 and S110 are executed in frame LV_2 in FIG. 13E. Moreover, the processes of steps S111 and S112 are executed in frame LV_3 in FIG. 13E.

The state and operation of the imaging device 1000 when the generation of correction values does not end in step S122 will be described below with reference to FIG. 13F. FIG. 13F shows the state when the ISO sensitivity set in the imaging device 1000 is switched from 200 to 400. The description begins with step S117 in FIG. 11.

As shown in FIG. 13F, since the correction value generation time _tc is shorter than the time lag determination time _t0 , the CPU 102 executes the process of step S117, and then executes the process of step S118.

After steps S118 to S120, the CPU 102 executes step S121. In step S121, the CPU 102 reads out the moving image data and the correction data. The state and operation of the imaging device 1000 at this time are shown in frame LV_2 of FIG. 13F.

After processing steps S121 and S122, the CPU 102 executes processing step S119.

The CPU 102 performs read settings for the imaging device 1000 and settings for the correction circuit in steps S119 and S120, and performs readout of the moving image data and readout of the correction data in step S121. The state and operation of the imaging device 1000 at this time are shown in frame LV_3 of FIG. 13F. Since the generation of correction values ends in this frame, the CPU 102 performs the process of step S121 and then the process of step S112.

The state and operation of the imaging device 1000 after step S112 are shown in frames LV_4 and LV_5 of FIG. 13F. The operation thereafter is the same as above, so the explanation ends here.

By performing the above operation, when the correction value generation circuit 360 generates a correction value when shooting conditions such as ISO sensitivity change during Lv shooting, shading correction can be performed without deteriorating responsiveness even under shooting conditions in which responsiveness deteriorates until the generated correction value is reflected.

In this embodiment, the correction value is acquired when the gain of the AD converter 301 is changed in relation to the ISO sensitivity, but the present invention is not limited to this. For example, it can be applied when the gain of the built-in amplifier is changed. It can also be applied when the driving mode of the image sensor, such as the number of bits for AD conversion or the number of mixed pixels in the vertical/horizontal directions, is switched.

In addition, in this embodiment, offset correction is performed, but any correction caused by the readout circuit, such as gain correction, can be applied.

In addition, in this embodiment, the shooting scene has been described as being configured for LV shooting, but the present invention is not limited to this. It can also be applied to video shooting and recording.

In this embodiment, in steps S101 and S115, the CPU 102 determines the setting value of the correction value selector 364 by referring to a setting value table stored in the imaging device, but this is not the only possible configuration. For example, when generating a correction value, the correction value generation time t _c may be calculated in the imaging device 1000, and the correction value selector setting value may be determined based on the result of comparing the correction value with the time lag determination time t ₀ each time.

In addition, in this embodiment, when determining the correction value selector setting value, the correction value generation time _tc is either longer than the time lag determination time _t0 or shorter than the time lag determination time _t0 is selected as the only two options. However, the present invention is not limited to this.

In addition, the correction value selector setting value may be determined depending on whether responsiveness is required for the imaging device 1000 according to the driving mode of the imaging element. For example, the responsiveness required for the imaging device 1000 differs between still image shooting and video shooting. When shooting still images, correction is performed on the live view image displayed on the display unit 106 and the captured still image, respectively, but it is necessary to drive the LV with high responsiveness so as not to miss a momentary shutter opportunity. In addition, it is desirable that the release time lag when shooting still images is as short as possible. Therefore, when shooting still images, the imaging device 1000 is required to have as high a responsiveness as possible, and it is difficult to secure the time to generate a correction value. Under such shooting conditions, as described above, it is possible to reduce responsiveness by setting the correction value selector 364 to y and using a correction value stored in advance.

On the other hand, when shooting moving images, the response speed is not as high as when shooting still images, and the same configuration as in this embodiment can be used.
Second Embodiment
In the first embodiment, in order to prevent a deterioration in responsiveness of the imaging device 1000 that occurs when a horizontal shading correction value is generated by the correction value generation circuit 360 shown in FIG. 8, a correction value stored in advance is used for the worsening shooting conditions, thereby avoiding the deterioration in responsiveness.

In this embodiment, the operation of the image sensor 100 during the generation of the correction value is controlled according to the shooting mode when the correction value is generated, thereby avoiding deterioration of responsiveness.

The imaging device of this embodiment is similar to that of the first embodiment, so a description of its configuration and operation will be omitted. In this embodiment, the correction value selector setting value shown in FIG. 8 is limited to x.

The state and operation of the imaging device 1000 of this embodiment will be described below. Fig. 14 is a flowchart showing the shooting operation of the imaging device 1000 of this embodiment. Figs. 15A to 15C are conceptual diagrams showing the state and operation of each component of the imaging device 1000. When the photographer presses the power switch of the imaging device 1000 on the operation unit 105, the imaging device 1000 is powered on and video shooting with LV (live view) display begins.

The processes in steps S200 to S204 are the same as those in steps S100 and S104 to S107 in FIG. 11, respectively, and therefore will not be described.

After the processing of step S204, reading of the correction data for the first frame counting from the start of live view shooting is completed, and correction values to be used for correction of the next frame (frame LV_1 in FIG. 15A) and thereafter are generated. The operation at this time is shown in frame LV_0 in FIG. 15A.

The processes in steps S205 and S206 are the same as those in steps S109 and S110 in FIG. 11, respectively. Here, they are performed in frame LV_0 in FIG. 15A.

In step S207, the CPU 102 reads the video image data.

In step S208, the CPU 102 determines whether the photographer has pressed a menu button included in the operation unit 105. If the CPU 102 determines that the button has been pressed, it ends live view shooting and the display on the display unit 106, and if it determines that the button has not been pressed, it executes the process of step S209.

In step S209, the CPU 102 determines whether the ISO sensitivity has been changed.
If the CPU 102 determines that the ISO sensitivity has been changed, it executes the process of step S210, and if it determines that the ISO sensitivity has not been changed, it executes the process of step S208.

In step S210, the CPU 102 acquires the shooting conditions set in the image sensor 100.

In step S211, the CPU 102 sets the number of rows of correction data required to generate a correction value. The number of rows of correction data required to be read is set according to the set ISO sensitivity.

In step S212, the CPU 102 determines whether the exposure control setting set in the image sensor 100 is the auto mode. The exposure control setting is a setting related to brightness, such as shutter speed, exposure, and ISO sensitivity. If the CPU 102 determines that the exposure control setting is the auto mode, it executes the process of step S213, and if it determines that the exposure control setting is not the auto mode, i.e., the manual mode, it executes the process of step S218.

First, the operation of the imaging device 1000 (first control by the CPU 102) when the shooting mode is the auto mode (when the CPU 102 executes the process of step S212 and then executes the process of step S213) will be described.

In steps S213 and S214, the CPU 102 sets the image sensor read settings and the correction circuit settings for the next frame (frame LV_2 in FIG. 15B). Here, this is performed in frame LV_1 in FIG. 15A. The operations are the same as steps S119 and S120 in FIG. 11, respectively, and therefore will not be described.

In step S215, the CPU 102 reads out the moving image and the correction data. The operation at this time is shown in frame LV_2 of FIG. 15B. The operation is the same as step S121 of FIG. 11, so a description thereof will be omitted.

In step S216, CPU 102 determines whether generation of correction values corresponding to the changed ISO sensitivity has been completed. If CPU 102 determines that generation of correction values corresponding to the changed ISO sensitivity has been completed, it executes the process of step S217, and if it determines that generation of correction values corresponding to the changed ISO sensitivity has not been completed, it repeats the process of step S213. Here, CPU 102 determines that generation of correction values has not been completed and executes the process of step S213.

In steps S213 and S214, the CPU 102 sets the readout settings of the image sensor 100 for the next frame (frame LV_3 in FIG. 15B) and the correction circuit settings. Here, this is performed in frame LV_2 in FIG. 15B. The operation performed in step S215 is shown in frame LV_3 in FIG. 15B. In step S216, as shown in LV_3 in FIG. 15B, since correction value generation is not complete for this frame either, the CPU 102 executes the process of step S216 and then executes the process of step S213.

The CPU 102 repeats the above-described operations from step S213, and executes step S216. The state and operation of the image sensor 100 at this time are shown in frame LV_4 of FIG. 15B. Since the correction value generation is completed in this frame, the CPU 102 executes step S216, and then executes step S217.

In step S217, the CPU 102 switches the ISO sensitivity setting for reading moving images for the next frame (frame LV_5 in FIG. 15B). Here, the CPU 102 switches the ISO sensitivity for the image sensor 100 from 200 to 12,800. Thereafter, the CPU 102 executes the processes of steps S208, S209, S205, and S206 in order.

In steps S205 and S206, the CPU 102 performs image sensor read settings and correction circuit settings for the next frame (frame LV_5 in FIG. 15B). Here, this is performed in frame LV_4 in FIG. 15B. After that, the CPU 102 executes the process of step S207.

In step S207, the CPU 102 reads out the video image data set with an ISO sensitivity of 12800, as shown in frame LV_5 in FIG. 15B. The CPU 102 then executes the process of step S208.

The above is a description of the operation of the imaging device 1000 when the shooting mode is the auto mode. When the shooting mode is the auto mode, the imaging device 1000 issues an instruction to change the ISO sensitivity to the imaging device 1000, and the timing of the instruction is not known to the photographer. Therefore, it is unlikely that a time lag will be felt between the instruction to change the ISO sensitivity and the ISO sensitivity being switched. Therefore, as shown in FIG. 15B, the ISO sensitivity for reading moving image data continues to operate at the setting before switching until the correction value generation is completed, and the ISO sensitivity for reading moving image data is switched after the correction value generation is completed. With this control method, a highly accurate correction value can be used for correction for all frames before and after the ISO sensitivity is switched.

Next, the operation of the imaging device 1000 (second control by the CPU 102) when the shooting mode is manual mode (when the CPU 102 executes the process of step S212 and then executes the process of step S218) will be described.

After executing the process of step S218, the CPU 102 executes the processes of steps S219, S220, and S221 in order, but because these are the same as the processes of steps S213 to S216, only a brief description will be given.

In steps S218 and S219, the CPU 102 performs image sensor read settings and correction circuit settings for the next frame (frame LV_2 in FIG. 15C).

In step S220, the CPU 102 reads the moving image and the correction data. The operation at this time is shown in frame LV_2 of FIG. 15C.

In step S221, the CPU 102 determines whether or not the generation of the correction value corresponding to the changed ISO sensitivity has been completed. If the CPU 102 determines that the generation of the correction value has been completed, it executes the process of step S217, and if it determines that the generation of the correction value has not been completed, it executes the process of step S222.

In step S222, the CPU 102 switches the ISO sensitivity setting for reading moving images for the next frame (frame LV_3 in FIG. 15C). Here, the CPU 102 switches the ISO sensitivity for the image sensor 100 from 200 to 12,800.

In steps S223 and S224, the CPU 102 performs image sensor read settings and correction circuit settings for the next frame (frame LV_3 in FIG. 15C). Here, this is performed for frame LV_2 in FIG. 15C. In addition, the correction values stored in RAM_A363b are copied to RAM_A363a.

In step S225, the CPU 102 reads the moving image data and the correction data. The operation at this time is shown in frame LV_3 of FIG. 15C. Since the ISO sensitivity was switched in step S222, the moving image data after the ISO sensitivity switching (ISO 12800) is read here. At this time, the moving image data is corrected with the correction value stored in RAM_A 363a and output to the outside of the image sensor 100. The moving image data read from the image sensor 100 is subjected to a predetermined correction, compression, etc. in the DSP 101 and displayed on the display unit 106. After that, reading of the correction data of the VOB area is started at the timing of vertical count = A, which is immediately after the end of the image data reading. The correction value generated in frame LV_2 of FIG. 15C and held in RAM_A 363b and the correction data read in this frame are input to the correction circuit 309, and the correction value is updated. Here, the correction value is stored in RAM_A 363b.

The process of step S226 is the same as the process of step S221, so a description thereof will be omitted. Here, the CPU 102 determines that the generation of the correction value has not ended, and executes the process of step S223.

In steps S223 and S224, the CPU 102 performs image sensor read settings and correction circuit settings for the next frame (frame LV_4 in FIG. 15C). Here, this is performed for frame LV_3 in FIG. 15C. In addition, the correction values stored in RAM_A363b are copied to RAM_A363a.

In step S225, the CPU 102 reads out the moving image data and the correction data. The operation at this time is shown in frame LV_4 of FIG. 15C. After that, the CPU 102 executes the process of step S226. Since the correction value generation ends in this frame, the CPU 102 executes the process of step S226 and then executes the process of step S208.

The above is a description of the operation of the imaging device 1000 when the shooting mode is manual mode. When the shooting mode is manual mode, the photographer issues an instruction to change the ISO sensitivity to the imaging device 1000, and the photographer is therefore aware of the timing of the instruction to change the ISO sensitivity. Therefore, as shown in FIG. 15B, if the generation of correction values spans multiple frames and the ISO sensitivity is not switched until the generation of the correction values is complete, there is a high possibility that a time lag will be felt between the timing of the instruction to change the ISO sensitivity and the time the ISO sensitivity is switched.

In such a case, as in frames LV_2 and LV_3 in FIG. 15C, a correction value is generated in one frame, and the ISO sensitivity for reading the moving image is switched and read out in the next frame. By doing so, the time from when an instruction to change the ISO sensitivity is given to switch the ISO sensitivity is shortened, so that the LV moving image can be displayed on the display unit 106 without the photographer feeling the time lag described above.

However, the correction value used for correction in frame LV_3 in FIG. 15C was generated without the necessary number of rows of correction data determined for each ISO sensitivity having been read out, so there is a possibility that unevenness will remain in the corrected image. For this reason, correction data is read out continuously until the necessary number of rows of correction data has been read out, and the correction value is updated.

By the above operation, the operation of the image sensor 100 during the generation of the correction value is controlled according to the shooting mode at the time of the ISO sensitivity change instruction, so that shading correction can be performed without deteriorating the responsiveness of the image sensor 1000 when the ISO sensitivity is switched. In this embodiment, the correction value is acquired when the gain of the AD converter 301 is changed in relation to the ISO sensitivity, but this is not limited to this. For example, it can be applied when the gain of the built-in amplifier is changed. It can also be applied whenever the drive mode of the image sensor 100, such as the number of bits for AD conversion or the number of mixed pixels in the vertical and horizontal directions, is switched. In this embodiment, the offset correction is performed, but any correction caused by the readout circuit, such as gain correction, can be applied.

In addition, in this embodiment, the shooting scene has been described as being configured for LV shooting, but this is not limited to this. It can also be applied to video shooting and recording.

The disclosure of this embodiment includes the following configuration:

(Configuration 1)
an image sensor including a plurality of pixels arranged in a matrix, each of the pixels including a photoelectric conversion element, and a plurality of column circuits each of which is provided for a plurality of pixel columns;
a storage unit configured to store a first correction value for each of the plurality of column circuits;
a generation unit that generates a second correction value for each of the plurality of column circuits using signals read out from the plurality of pixels;
a selection unit that selects one of the first correction value and the second correction value;
a correction unit that corrects an image using the correction value selected by the selection unit,
The imaging device, wherein the selection unit selects one of the first correction value and the second correction value depending on shooting conditions when the generation unit generates the second correction value.
(Configuration 2)
The imaging device according to configuration 1, wherein the selection unit selects one of the first correction value and the second correction value depending on a time when the generation unit generates the second correction value.
(Configuration 3)
The imaging device described in configuration 1 or 2, characterized in that the selection unit selects the second correction value when a time taken for the generation unit to generate the second correction value is shorter than a predetermined time, and selects the first correction value when the time is longer than the predetermined time.
(Configuration 4)
2. The imaging apparatus according to claim 1, wherein the selection unit selects one of the first correction value and the second correction value in accordance with a drive mode of the imaging element.
(Configuration 5)
Further comprising a control unit for changing the photographing conditions,
The imaging device described in configuration 1, characterized in that when the correction unit uses the second correction value, the control unit performs, depending on the shooting mode, a first control that switches the shooting conditions when the correction data for generating the second correction value is read out without switching the shooting conditions when the moving image is read out while the second correction value is generated, or a second control that switches the shooting conditions when the moving image is read out while the second correction value is generated and the shooting conditions when the correction data is read out.
(Configuration 6)
The imaging device according to configuration 5, wherein the control unit performs the first control when the shooting mode is an auto mode, and performs the second control when the shooting mode is a manual mode.
(Configuration 7)
7. The imaging device according to any one of configurations 1 to 6, wherein the correction unit is included in the imaging element.
(Configuration 8)
8. The imaging device according to any one of configurations 1 to 7, wherein the selection unit is included in the imaging element.

The above describes preferred embodiments of the present invention, but the present invention is not limited to these embodiments, and various modifications and variations are possible within the scope of the gist of the invention.

100 Image sensor 104 ROM (storage unit)
300 Column output line (column circuit)
301 AD converter (column circuit)
360 Correction value generating circuit (generating unit)
361 Correction unit 364 Correction value selector (selection unit)
1000 Imaging device

Claims (8)

an image sensor including a plurality of pixels arranged in a matrix, each of the pixels including a photoelectric conversion element, and a plurality of column circuits each of which is provided for a plurality of pixel columns;
a storage unit configured to store a first correction value for each of the plurality of column circuits;
a generation unit that generates a second correction value for each of the plurality of column circuits using signals read out from the plurality of pixels;
a selection unit that selects one of the first correction value and the second correction value;
a correction unit that corrects an image using the correction value selected by the selection unit,
The imaging device, wherein the selection unit selects one of the first correction value and the second correction value depending on shooting conditions when the generation unit generates the second correction value. The imaging device according to claim 1, characterized in that the selection unit selects one of the first correction value and the second correction value depending on the time when the generation unit generates the second correction value. The imaging device according to claim 1 or 2, characterized in that the selection unit selects the second correction value when the time taken for the generation unit to generate the second correction value is shorter than a predetermined time, and selects the first correction value when the time is longer than the predetermined time. The imaging device according to claim 1, characterized in that the selection unit selects one of the first correction value and the second correction value depending on the driving mode of the imaging element. Further comprising a control unit for changing the photographing conditions,
The imaging device described in claim 1, characterized in that when the correction unit uses the second correction value, the control unit performs, depending on the shooting mode, a first control that switches the shooting conditions when the correction data for generating the second correction value is read out without switching the shooting conditions when the moving image is read out while the second correction value is generated, or a second control that switches the shooting conditions when the moving image is read out while the second correction value is generated and the shooting conditions when the correction data is read out. The imaging device according to claim 5, characterized in that the control unit performs the first control when the shooting mode is an auto mode, and performs the second control when the shooting mode is a manual mode. The imaging device according to claim 1 or 2, characterized in that the correction unit is included in the imaging element. The imaging device according to claim 1 or 2, characterized in that the selection unit is included in the imaging element.