JP2024070496A - Power supply circuit and device including the power supply circuit - Google Patents

Abstract

[Problem] To make it possible to reduce heat generation in a power supply circuit. [Solution] The power supply circuit includes a transformer whose primary side and secondary side are insulated, a boost circuit for boosting the voltage on the secondary side of the transformer, an amplifier circuit for amplifying the difference between a voltage based on the output voltage of the boost circuit and a designated voltage that defines the output voltage of the boost circuit, an amplitude control circuit 150 for supplying the voltage based on the output voltage of the amplifier circuit to the primary side of the transformer while limiting the maximum output current, and a transistor for turning on and off the current on the primary side of the transformer according to a predetermined clock, and the amplitude control circuit 150 is configured to include a comparator CMP1 for modulating the pulse width of the output voltage of the amplifier circuit, and a MOSFET M2, a diode D1, a coil L1, and a capacitor C1 for stepping down and outputting the power supply voltage by performing a switching operation according to the modulated wave output by the comparator CMP1. [Selected Figure] Figure 2

Description

The present invention relates to a power supply circuit and a device including the power supply circuit.

In recent years, in the fields of mobility and industrial equipment, it has become important to improve the reliability and stable operation of electronic systems in order to ensure long-term use and operation. To achieve high reliability, it is necessary to achieve both low noise and low heat generation (low power consumption) in the power supply circuits that connect to various circuit boards mounted on electronic systems to supply power. However, there is a trade-off between low heat generation and low noise, and in particular, in DC power supply circuits that generate voltages higher than a certain power supply voltage, a large amount of noise and power consumption is generated when boosting the voltage, which becomes a heat and noise source for many devices.

DC power supply circuits capable of generating a stable output voltage include, for example, boost circuits using negative feedback control (e.g., Cockcroft-Walton voltage doubler circuits). For example, in the technology described in Patent Document 1, the DC power supply circuit inputs a control signal to an amplifier circuit, compares the output voltage with the divided voltage, and controls the primary voltage of the transformer. In this DC power supply circuit, the primary side of the transformer generates a signal with an appropriate duty ratio by pulse-width modulating the output of the amplifier circuit, which switches the transistor. Furthermore, in this DC power supply circuit, a lower limit is set for the duty ratio to prevent output voltage fluctuations caused by inputting a short pulse to the gate of the transistor.

JP 2020-22228 A

In the technology described in Patent Document 1, the DC power supply circuit uses a linear regulator (dropper) power supply circuit to control the primary voltage of the transformer (primary voltage adjustment circuit). In this power supply circuit, the power consumption, which is the product of the difference between the input voltage Vin and the output voltage Vout2 and the average current Iave (Vin-Vout) x Iave, is consumed by the MOSFET, generating heat.

For example, it is conceivable that this heat could be dissipated using an inner layer copper foil plane of a printed circuit board, but a boost circuit that generates a high voltage cannot have an inner layer copper foil plane provided in order to ensure sufficient insulation voltage. Also, the transformer is mounted at the boundary between the low voltage section on the primary side and the boost circuit on the secondary side. Therefore, if the MOSFET is moved closer to the transformer in an attempt to reduce size, it will be mounted closer to the boost circuit from which the inner layer copper foil plane has been omitted, and the copper foil area required for heat dissipation cannot be secured, making it necessary to provide, for example, a heat sink. In other words, even if the component mounting area on the printed circuit board can be reduced, there is a problem in that the height of the DC power supply circuit will increase.

The present invention was developed in consideration of the above circumstances, and its purpose is to provide a technology that can reduce heat generation in power supply circuits.

In order to achieve the above object, a power supply circuit according to one aspect includes a transformer having insulation between its primary side and secondary side, a boost circuit for boosting the voltage on the secondary side of the transformer, an amplifier circuit for amplifying the difference between a voltage based on the output voltage of the boost circuit and a designated voltage that defines the output voltage of the boost circuit, an amplitude control circuit for supplying the voltage based on the output voltage of the amplifier circuit to the primary side of the transformer while limiting the maximum output current, and a transistor for turning on and off the current on the primary side of the transformer according to a predetermined clock, and the amplitude control circuit includes a pulse modulation circuit for modulating the pulse width of the output voltage of the amplifier circuit, and a step-down circuit for stepping down and outputting the power supply voltage by performing a switching operation according to the modulated wave output by the pulse modulation circuit.

The present invention makes it possible to reduce heat generation in the power supply circuit.

FIG. 1 is an overall configuration diagram of a DC power supply circuit according to a first embodiment. FIG. 2 is a configuration diagram of the amplitude control circuit according to the first embodiment. FIG. 3 is a diagram for explaining the process of the comparator according to the first embodiment. FIG. 4 is a diagram illustrating an example of a boost circuit according to the first embodiment. FIG. 5 is a configuration diagram of another example of the boost circuit according to the first embodiment. FIG. 6 is a diagram illustrating a square wave according to the first embodiment. FIG. 7 is a diagram illustrating a sawtooth wave according to the first embodiment. FIG. 8 is a diagram illustrating a triangular wave according to the first embodiment. FIG. 9 is a diagram showing the overall configuration of a DC power supply circuit according to the second embodiment. FIG. 10 is a configuration diagram of an amplitude control circuit according to the second embodiment. FIG. 11 is a diagram illustrating the process of the duty ratio control circuit according to the second embodiment.

The following embodiments are described with reference to the drawings. Note that the embodiments described below do not limit the invention as claimed, and not all of the elements and combinations thereof described in the embodiments are necessarily essential to the solution of the invention.

Figure 1 is an overall configuration diagram of a DC power supply circuit according to the first embodiment.

The DC power supply circuit 1 is a circuit that outputs a high voltage, and is provided in devices that require a high voltage power supply, such as a high voltage electron multiplier tube or a semiconductor photosensor. The DC power supply circuit 1 includes a clock oscillation circuit 10, a transformer T1, a MOSFET M1 as an example of a transistor, a sawtooth wave generating circuit 20, a boost circuit 100, a voltage divider circuit 110, a resistor RE, an operational amplifier circuit OP1, a phase compensation circuit 140, and an amplitude control circuit 150.

The clock oscillator circuit 10 outputs a square wave clock. The output clock is input to the MOSFET M1 and the sawtooth wave generator circuit 20.

The sawtooth wave generating circuit 20 generates and outputs a sawtooth wave 151 as an example of an input wave according to the input clock. In this embodiment, the sawtooth wave generating circuit 20 generates a sawtooth wave 151 with the same frequency as the clock. The sawtooth wave 151 is input to the amplitude control circuit 150.

MOSFET M1 is set, for example, so that the drain-source resistance is 0Ω when it is on and ∞ when it is off. When MOSFET M1 is on, the terminal voltage of the primary coil T1a of transformer T1 is V1 [V], and when it is off, it is 0 [V], thereby controlling the on/off of the current on the primary side of transformer T1. Here, V1 [V] is the voltage output from amplitude control circuit 150.

The transformer T1 has a primary coil T1a and a secondary coil T1b, and transforms the voltage flowing through the primary side (primary coil T1a side) and transmits it to the secondary side (secondary coil T1b side). If the winding ratio of the primary coil T1a and secondary coil T1b is N, when the voltage on the primary side changes between 0 and V1, a repeating waveform between 0V and N x V1 [V] is transmitted to the secondary side.

The boost circuit 100 rectifies and boosts the voltage transmitted to the secondary coil T1b of the transformer T1 to output a DC voltage Vout. The DC voltage Vout is supplied to each section that requires a DC voltage, and is also supplied to the voltage divider circuit 110.

The voltage divider circuit 110 divides (e.g., multiplies by 1/100) the input DC voltage Vout so that it falls within a predetermined range (e.g., -5V to +5V). In this embodiment, since the DC voltage Vout of the boost circuit 100 is a negative voltage, the voltage divider circuit 110 inverts the phase and outputs it. Note that if the DC voltage Vout of the boost circuit is a positive voltage, the voltage divider circuit 110 does not invert the phase. The output from the voltage divider circuit 110 is input to the operational amplifier circuit OP1 via resistor RE.

The phase compensation circuit 140 is provided as a feedback circuit for the operational amplifier circuit OP1.

The operational amplifier circuit OP1 compares the command voltage (specified voltage) Vr to be specified in order to set the output of the boost circuit to the target voltage with the input signal (the output of the voltage divider circuit 110 and the signal fed back by the phase compensation circuit 140), and performs negative feedback control to lower the output voltage Vc if the DC voltage Vout is higher than the target, and to raise the output voltage Vc if the DC voltage Vout is lower than the target.

Here, the phase compensation circuit 140 is designed so that negative feedback control is performed stably. Here, a method for designing a stable negative feedback circuit can be performed by a method established in the field of control engineering. For example, one design method is to cut off a part of the negative feedback loop in FIG. 1 (for example, the part of the output voltage Vc), obtain the frequency characteristics in the open loop state (the frequency characteristics of the circuit in which the left side of the cut Vc is the input and the right side of the cut Vc is the output), and design so that the phase does not invert at frequencies where the gain is greater than 1.

The amplitude control circuit 150 generates a voltage V1 from the power supply voltage VCC and the output voltage Vc [V] of the operational amplifier circuit OP1.

Figure 2 is a diagram showing the configuration of the amplitude control circuit according to the first embodiment.

The amplitude control circuit 150 includes a comparator CMP1 as an example of a pulse modulation circuit, a MOSFET M2 as an example of a switching transistor, a diode D1, a coil L1, a capacitor C1, a resistor R2, a transistor Q1, a transistor Q2, and a resistor R1.

The sawtooth wave 151 is input to the negative terminal of the comparator CMP1, and the output voltage Vc of the operational amplifier circuit OP1 is input to the positive terminal. The comparator CMP1 performs pulse width modulation on the output voltage Vc based on the sawtooth wave 151, and outputs a pulse width modulated wave 152. The pulse width modulated wave 152 is input to the gate of the MOSFET M2.

Figure 3 is a diagram explaining the processing of the comparator according to the first embodiment.

When the output voltage Vc and the sawtooth wave 151 are input to the comparator CMP1 as shown in FIG. 3, the comparator CMP1 outputs a pulse width modulated wave 152 that is at a high level when the voltage of the sawtooth wave 151 is lower than the output voltage Vc, and is at a low level when the voltage of the sawtooth wave 151 is higher than the output voltage Vc.

Returning to the explanation of Figure 2, MOSFET M2, diode D1, coil L1, and capacitor C1 form a step-down switching regulator circuit (step-down circuit).

MOSFET M2 has a drain to which the power supply voltage VCC is input, a gate to which a pulse-width modulated wave 152 is input, and a source to which a grounded diode D1 and a coil L1 are connected, and switching is performed by the gate's pulse-width modulated wave 152. Coil L1 is connected to a grounded capacitor C1 and the collector of transistor Q1.

In this step-down circuit, when the pulse-width modulated wave 152 input to the gate of MOSFET M2 is at a high level, MOSFET M2 is turned on and a current flows from the source of MOSFET M2 to coil L1, while when the pulse-width modulated wave 152 input to the gate of MOSFET M2 is at a low level, MOSFET M2 is turned off and a current flows from diode D1 to coil L1. When MOSFET M2 is on and off, the current flowing through coil L1 is almost constant and is smoothed by capacitor C1 to generate voltage V1' supplied to the collector of transistor Q1. With this step-down circuit, it is possible to generate voltage V1' with a waveform close to that of a stable DC voltage without constantly supplying current from the power supply voltage VCC.

A voltage V1' is input to the collector of transistor Q1, and the output voltage Vc is input to the base via resistor R2. Resistor R1 and the base of transistor Q2 are connected to the emitter of transistor Q1. A current I1 of voltage V1 output from the emitter of transistor Q1 is supplied to the primary side of transformer T1 via resistor R1.

The emitter voltage of transistor Q1 is input to the base of transistor Q2, the base voltage of transistor Q1 is input to the collector, and the emitter is connected downstream of resistor R1.

In the amplitude control circuit 150, when the base current of transistor Q2 is sufficiently small and negligible, the base current of transistor Q1 is current IB1, the base-emitter voltage is voltage VBE1, and the grounded emitter current amplification factor is amplification factor β, and the current I1 and voltage V1 output from the amplitude control circuit 150 are calculated by the following formulas (1) and (2). In this embodiment, the amplification factor β is, for example, 100 or 300 times.

I1=(β+1)×IB1 (1)
V1=Vc-R2×IB1-VBE1-R1×I1 (2)

Here, if the base-emitter voltage of transistor Q2 is voltage VBE2, the collector current of transistor Q2 flows when R1 x I1 is greater than voltage VBE2. Therefore, when current I1 becomes larger than a certain level, the current output from resistor R2 flows through transistor Q2, limiting the base current of transistor Q1. As a result, the current output from transistor Q1 decreases, and the maximum value I1max of I1 (maximum output current) is controlled to be VBE2/R1.

Next, we will explain a specific example of the boost circuit 100.

Figure 4 is a configuration diagram of an example of a boost circuit according to the first embodiment, and Figure 5 is a configuration diagram of another example of a boost circuit according to the first embodiment.

The boost circuit 100 may be, for example, a rectifier circuit 100a configured with a capacitor C11 and a diode D11 as shown in FIG. 4, or a Cockcroft-Walton type voltage doubler circuit 100b including multiple capacitors C21, C22, C23, and C24 and diodes D21, D22, D23, and D24 as shown in FIG. 5.

Here, for example, when a step-down circuit is not provided in the amplitude control circuit 150, the power P1 consumed in the configuration on the primary side of the transformer T1 including the transistor Q1 is expressed as shown in the following equation (3).
P1 (conventional)≦I1max×VCC (3)

On the other hand, in the amplitude control circuit 150 of this embodiment, the power P1 consumed in the primary side configuration of the transformer T1 including the transistor Q1 is expressed as shown in the following equation (4).

P1 (this embodiment)≦I1max×V1′
= P1 (conventional) - I1max × (VCC - V1') ... (4)
Here, since VCC>V1', P1 (present embodiment)<P1 (conventional embodiment). Therefore, when a step-down circuit is provided, the power consumed by the primary side of the transformer T1 including the transistor Q1 can be reduced, and as a result, the amount of heat generated can be reduced.

In the step-down circuit, the output voltage is voltage V1' and the output current is current I1, so a power supply of V1' x I1 is required. If the efficiency of the step-down circuit is γ, the power consumption PAW in the step-down circuit is expressed as shown in the following formula (5). The efficiency γ is, for example, 80% or more.

PSW≦(1−γ/100)×V1′×I1max
= (1 - γ / 100) x P1 (this embodiment)
<P1 (this embodiment) ... (5)

Therefore, P1 dominates the power consumed by the power supply circuit.

Here, we will explain the square wave clock generated by the clock oscillator circuit 10.

Figure 6 is a diagram explaining the square wave according to the first embodiment.

The square wave in Figure 6 has a period T [s], an angular frequency ω of ω = 2π/T [rad/s], and an amplitude of 1 [V]. When expanded into a Fourier series, this square wave is expressed by the equation shown in Figure 6.

Next, we will explain the sawtooth wave generated by the sawtooth wave generating circuit 20 based on the clock (square wave) shown in Figure 6.

Figure 7 is a diagram explaining the sawtooth wave according to the first embodiment.

A sawtooth wave is generated by a square wave and has the same period, angular velocity, and amplitude as a square wave. When a sawtooth wave is expanded into a Fourier series, it is expressed by the equation shown in Figure 7.

Comparing the Fourier series expansion equation of the square wave shown in Figure 6 with the Fourier series expansion equation of the sawtooth wave shown in Figure 7, the level ratio between the square wave and the sawtooth wave is 1/(1-1/2n)>1. Therefore, the sawtooth wave can suppress the levels of the amplitude components of the fundamental wave and harmonics lower than the square wave. In addition, since the sawtooth wave has the same frequency as the square wave, the noise frequency is similar and can be easily removed.

In the above embodiment, a sawtooth wave is output by the sawtooth wave generating circuit 20, but instead of the sawtooth wave generating circuit 20, a triangular wave generating circuit may be provided and a triangular wave (an example of an input wave) may be output based on a clock (rectangular wave).

Here, we will explain the sawtooth wave generated by the triangular wave generating circuit based on the clock (square wave) shown in Figure 6.

Figure 8 is a diagram explaining the triangular wave according to the first embodiment.

A triangular wave is generated by a square wave and has the same period, angular velocity, and amplitude as a square wave. When a triangular wave is expanded into a Fourier series, it is expressed by the equation shown in Figure 8.

Comparing the Fourier series expansion equation of the square wave shown in Figure 6 with the Fourier series expansion equation of the triangular wave shown in Figure 8, the level ratio between the square wave and the triangular wave is π/(n-1)>1. Therefore, the triangular wave can suppress the levels of the fundamental wave and harmonic amplitude components lower than the square wave. In addition, since the triangular wave has the same frequency as the square wave, the noise frequency is similar and can be easily removed.

Next, we will explain the DC power supply circuit according to the second embodiment.

Figure 9 is an overall configuration diagram of a DC power supply circuit according to the second embodiment. Note that the same configurations and elements as those in the DC power supply circuit 1A according to the first embodiment are given the same reference numerals.

The DC power supply circuit 1A according to the second embodiment is different from the DC power supply circuit 1 according to the first embodiment in that it additionally includes a minimum pulse width setting circuit 154 and includes an amplitude control circuit 150A instead of the amplitude control circuit 150.

The clock output from the clock oscillator circuit 10 is input to the minimum pulse width setting circuit 154. In accordance with the input clock, the minimum pulse width setting circuit 154 generates and outputs a pulse width setting signal Vdmin, which is a rectangular wave with the same frequency as the clock and a predetermined pulse width that goes high, as a high level. In this embodiment, the predetermined pulse width is a width that allows the MOSFET M2 of the amplitude control circuit 150A to be appropriately turned on.

Next, we will explain the amplitude control circuit 150A.

Figure 10 is a configuration diagram of an amplitude control circuit according to the second embodiment. Note that the same configurations and elements as those of the amplitude control circuit 150 according to the first embodiment are given the same reference numerals.

The amplitude control circuit 150A further includes a duty ratio control circuit 153 as an example of a pulse width control circuit in addition to the amplitude control circuit 150.

The duty ratio control circuit 153 receives the pulse width setting signal Vdmin output from the minimum pulse width setting circuit 154, and also receives the pulse width modulated wave 152 from the comparator CMP1.

Figure 11 is a diagram explaining the processing of the duty ratio control circuit according to the second embodiment. Figure 11 shows the output voltage Vc and sawtooth wave 151 input to comparator CMP1, the pulse width modulated wave 152 output from comparator CMP1, the pulse width setting signal Vdmin, and the output from the duty ratio control circuit 153.

When the output voltage Vc and sawtooth wave 151 are input to the comparator CMP1, the comparator CMP1 outputs a pulse width modulated wave 152 having a pulse width corresponding to the input. In the example of FIG. 11, the pulse width modulated wave 152 has a smaller width than the pulse width setting signal Vdmin.

The duty ratio control circuit 153 is, for example, an OR circuit OR1. When the pulse width modulated wave 152 and the pulse width setting signal Vdmin are input to the OR circuit OR1, the wave with the larger width is output. In the example of FIG. 11, the pulse width modulated wave 152 has a smaller width than the pulse width setting signal Vdmin, so the pulse width setting signal Vdmin is output. Note that when the pulse width modulated wave 152 has a larger width than the pulse width setting signal Vdmin, the pulse width modulated wave 152 is output. In this way, a wave with a width equal to or greater than the width of the pulse width setting signal Vdmin is output from the OR circuit OR1. Therefore, when the output wave from the OR circuit OR1 is input to the MOSFET M2, the MOSFET M2 can perform an appropriate ON operation according to the output wave from the OR circuit OR1, and can flow a current from the power supply to the drain side. This makes it possible to more reliably supply a current from the step-down circuit to the downstream side.

The present invention is not limited to the above-described embodiment, and can be modified as appropriate without departing from the spirit of the present invention.

For example, in the above embodiment, a voltage divider circuit 110 is provided, but the present invention is not limited to this. If the output voltage from the boost circuit 100 can be supplied to the operational amplifier circuit OP1 without being divided, the voltage divider circuit 110 does not need to be provided.

1, 1A...power supply circuit, 10...clock oscillation circuit, 20...sawtooth wave generating circuit, 100...booster circuit, 110...voltage dividing circuit, 140...phase compensation circuit, 150, 150A...amplitude control circuit, T1...transformer, M1, M2...MOSFET, OP1...operational amplifier circuit

Claims (9)

A transformer whose primary side and secondary side are insulated from each other;
a boost circuit that boosts a voltage on the secondary side of the transformer;
an amplifier circuit that amplifies a difference between a voltage based on an output voltage of the boost circuit and a designated voltage that defines the output voltage of the boost circuit;
an amplitude control circuit that limits a maximum output current of a voltage based on an output voltage of the amplifier circuit and supplies the voltage to a primary side of the transformer;
a transistor that turns on and off the current on the primary side of the transformer in accordance with a predetermined clock,
The amplitude control circuit includes:
a pulse modulation circuit that modulates the pulse width of the output voltage of the amplifier circuit;
a step-down circuit that performs a switching operation in accordance with the modulated wave output by the pulse modulation circuit to step down and output a power supply voltage;
A power supply circuit comprising: 2. The power supply circuit according to claim 1,
The step-down circuit is a power supply circuit including a switching transistor, a diode, a coil, and a capacitor. 2. The power supply circuit according to claim 1,
The pulse modulation circuit is a power supply circuit that uses an input wave that is a sawtooth wave or a triangular wave to modulate the pulse width of the output voltage of the amplifier circuit. 4. The power supply circuit according to claim 3,
A power supply circuit in which the input wave is generated based on the clock. 5. The power supply circuit according to claim 4,
A power supply circuit, wherein the frequency of the input wave is the same as the frequency of the clock. 2. The power supply circuit according to claim 1,
The amplitude control circuit includes:
The power supply circuit further comprises a pulse width control circuit disposed between the step-down circuit and the pulse modulation circuit, the pulse width control circuit controlling the pulse width of the modulated wave output by the pulse modulation circuit to a modulated wave having a predetermined width or greater. 2. The power supply circuit according to claim 1,
The power supply circuit further comprises a voltage divider circuit between the boost circuit and the amplifier circuit, the voltage divider circuit dividing an output voltage of the boost circuit. 2. The power supply circuit according to claim 1,
The boost circuit is a power supply circuit that is a Cockcroft-Walton type voltage doubler circuit. 9. An apparatus comprising a power supply circuit according to any one of claims 1 to 8.