JP2024058379A - ISDB-T Modulator and Time Interleaving Method Thereof - Google Patents

Abstract

[Problem] To deal with a troublesome time interleaving function, particularly in an ISDB-T modulator as an IC, and to eliminate the need for an external memory for time interleaving. [Solution] The ISDB-T modulator comprises a carrier modulation section 15 that performs carrier modulation on input data, a receiving carrier buffer 16 that stores carrier data carrier-modulated by the carrier modulation section 15, an input/output processing section 11 that transfers the carrier data in the receiving carrier buffer 16 to a host device and receives carrier data that has been time-interleaved by the host device, a transmitting carrier buffer 17 that stores the carrier data after time interleaving received by the input/output processing section 11, and processing sections 21, 22, 23 that perform frequency interleaving, OFDM frame configuration processing, and IFFT processing on the carrier data stored in the transmitting carrier buffer 17, and output the carrier data as an ISDB-T signal. [Selected Figure] Figure 1

Description

The present invention relates to an ISDB-T modulator and a time interleaving method thereof.

In recent years, modulator ICs for the Integrated Services Digital Broadcasting (ISDB-T) standard for terrestrial digital broadcasting have been introduced to the market.

This modulator IC stores multiple TSs, i.e. video and audio data and SI information (PAT, PMT, etc.) in a temporary memory (buffer) via an input/output interface such as a USB interface, adds a playback rate to each and plays them as a temporal TS stream, finally multiplexing them into a single stream, then performs ISDB-T modulation and generates an IQ signal using a DAC (digital-to-analog converter). In order to support time interleaving, it was common to use an SRAM (Static Random Access Memory) of about 1MB. However, SRAM had the problem of being expensive per unit capacity.

Alternatively, it may be possible to use relatively low-cost SDRAM (Synchronous DRAM), such as DDR3 (Double Data Rate 3) (see, for example, Patent Document 1).

Patent document 2 also discloses a method for performing time interleaving using an external memory for time interleaving.

JP 2008-244807 A JP 2003-60610 A

Association of Radio Industries and Businesses (ARIB) Standard for "Transmission System for Digital Terrestrial Television Systems" ARIB STD-B31 2.0 Edition

However, using SDRAM (e.g. DDR3), which is less expensive than SRAM, as the external memory for the modulator IC creates a problem in that the circuit becomes more complex, causing a sharp rise in design costs.

The Japanese system also maintains higher signal quality than the American and European systems by using a very long interleaving period for the modulated carrier. In other words, it has significantly improved noise resistance. However, to achieve this function, a large amount of delay memory is required. For example, a minimum of 474 kilobytes is required per channel modulation, and when multiple channels are used, multiples of that amount of memory are required, making this even more difficult.

The standard for the "transmission method of the terrestrial digital television system" is summarized in ARIB STD-B31 (Non-Patent Document 1). If a modulator IC complies with this standard, it will be an IC with memory, but as mentioned above, the memory will be of large capacity. For this reason, two types of products have become mainstream: products that do not implement a time interleaving function, and products that use a multi-layered chip with memory, although they are less cost-competitive.

The present invention has been made against this background, and its purpose is to provide an ISDB-T modulator and a time interleaving processing method that address the troublesome time interleaving function, particularly in ISDB-T modulators as ICs, and that eliminate the need for external memory for time interleaving.

The ISDB-T modulator according to the present invention comprises a carrier modulation section that performs carrier modulation on input data, a receiving carrier buffer that stores carrier data modulated by the carrier modulation section, an input/output processing section that transfers the carrier data in the receiving carrier buffer to a host device and receives carrier data that has been time interleaved by the host device, a transmitting carrier buffer that stores the carrier data after time interleaving received by the input/output processing section, and a processing section that performs frequency interleaving, OFDM frame configuration processing, and IFFT processing on the carrier data stored in the transmitting carrier buffer and outputs it as an ISDB-T signal. With this configuration, the time interleaving is performed by an external host device, and the ISDB-T modulator itself does not need to perform time interleaving by using the results of this execution. As a result, the ISDB-T modulator does not need a memory for time interleaving.

As one aspect of the present invention, the host device performs time interleaving by having its CPU execute a specific program.

In another aspect of the present invention, the receiving carrier buffer and the transmitting carrier buffer each store a number of carrier data lines corresponding to at least one symbol.

In another aspect of the present invention, when one symbol of carrier data is accumulated in the receiving carrier buffer, the input/output processing unit transfers the carrier data to the host device.

In another aspect of the invention, the carrier data transferred to the host device is assigned a corresponding symbol number.

In another aspect of the present invention, the input/output processing unit generates an interrupt signal to the host device when one symbol of carrier data is accumulated in the receive carrier buffer.

In another aspect of the present invention, the ISDB-T modulator is configured as an integrated circuit.

The time interleaving method for an ISDB-T modulator according to the present invention includes the steps of storing carrier modulated carrier data in a receive carrier buffer, transferring the carrier data in the receive carrier buffer to a host device, receiving the time interleaved carrier data in the host device, and storing the received time interleaved carrier data in a transmit carrier buffer.

As one aspect of the time interleaving method of this ISDB-T modulator, in the time interleaving process, the host device secures a two-dimensional array of (number of symbols x number of carriers) in main memory, then writes carrier data for each symbol, the number of carriers for that symbol, offsetting it in the symbol axis direction by the number of delays in the time interleaving of that symbol, and then continuously reads out the carrier data for the number of carriers written at each symbol position, and sends it back to the ISDB-T modulator.

The present invention makes it possible to deal with the troublesome time interleaving function in ISDB-T modulators and to eliminate the need for external memory for time interleaving. This makes it possible to provide a relatively low-cost ISDB-T modulator.

1 is a block diagram showing an example of the configuration of an ISDB-T modulator according to an embodiment of the present invention. 1 is a format diagram showing a schematic diagram of a memory space of a required size for a receiving carrier buffer and a transmitting carrier buffer in an embodiment of the present invention. 1 is a block diagram showing two examples of applications of an ISDB-T modulator according to an embodiment of the present invention; FIG. 1 is an explanatory diagram of time interleaving processing according to the standard. FIG. 13 is a diagram showing the transition state of writing and reading when the number of delays is 10. FIG. 2 is an explanatory diagram of a time interleaving process according to an embodiment of the present invention. A sequence diagram showing an example of communication between an input/output processing unit of an ISDB-T modulator for time interleaving processing in an embodiment of the present invention and a host device. 10 is a flowchart showing an example of a specific processing flow of a time interleaving process by a host device in an embodiment of the present invention. FIG. 13 is a diagram showing a table showing the number of delays of time interleaving in an embodiment of the present invention.

The following describes in detail the embodiments of the present invention.

Figure 1 is a block diagram showing an example of the configuration of an ISDB-T modulator according to this embodiment. This ISDB-T modulator includes an input/output processing unit (IO processing unit) 11, TS buffers 12a, 12b, multiplexing units (MUX) 13a, 13b, an ISDB-T remultiplexing unit 14, a time interleaving preprocessing unit 15, a receiving carrier buffer 16, a transmitting carrier buffer 17, a frequency interleaving processing unit 21, an OFDM frame construction unit 22, an IFFT unit (+GI addition unit) 23, and a DAC unit 24. This ISDB-T modulator is a device that can be applied to a single IC chip. This configuration is basically almost the same as the conventional configuration, and detailed explanations of well-known components will be omitted.

What makes this embodiment different from conventional configurations is that it does not have a time interleaving memory, either built into the ISDB-T modulator or attached externally. Instead, it is equipped with a receive carrier buffer 16 and a transmit carrier buffer 17 for 4,992 lines per symbol, as well as an input/output processing unit 11 for the ISDB-T modulator to receive input data and exchange control. This input/output processing unit 11 exchanges carrier data, commands, etc. with the host device for time interleaving processing.

In this example, the input/output processing unit 11 is assumed to be an SDIO interface, but it may be another input/output interface such as USB.

The carrier data generated by the ISDB-T modulator is temporarily stored in the receive carrier buffer 16, and when one symbol's worth of data is accumulated, it is transferred to the host device (host side). The host device uses its own memory to perform interleaving processing on the received carrier data through software processing of its CPU. Here, software processing means the execution of a computer program. Data read from the host side memory is transferred to the transmit carrier buffer 17 via the input/output processing unit 11. In other words, the carrier data after time interleaving processing is transferred to the transmit carrier buffer 17 after a delay of a predetermined number of symbols. At this time, information on the read symbol number is also added to the read carrier data. The symbol number is required for subsequent OFDM frame synchronization. The data in the transmit carrier buffer 17 is subjected to frequency interleaving, OFDM frame configuration processing, and IFFT processing, and is finally output as an ISDB-T signal.

Typically, host devices with input/output interfaces are equipped with fairly large memory for, for example, MPEG2 encoding and VOIP (Voice over Internet Protocol) RTP (Rear-time Transport Protocol) processing. For example, host CPUs usually have large-scale memory of 512 MB or 1 GB. Therefore, it is easy to secure about 1 MB of memory for time interleaving processing.

The ISDB-T modulator in this embodiment is compatible with multiple channels. In the example shown in the figure, it is 2CH, but it can be expanded to more channels (e.g., 4CH) by increasing the number of TS buffers and the number of processing stages in the IFFT unit 21. Of course, it may also be compatible with a single channel.

In the case of an SDIO interface, the signal lines consist of a command (IO_CMD), a clock (IO_CLK), and 4-bit data (IO_DAT). During communication, the command is placed on the CMD line, and a response is received from the CMD line. The 4-bit data line (IO_DAT) is used for writing and reading data. CMD52 (command 52) is used for single-byte access, and CMD53 is used for continuous transfers. In this example, SDIO_CLK = 50 MHz, and data is sampled on both edges of the clock, so a transfer rate of 50 MB/s is assumed.

TS0 buffers 12a and 12b are, for example, multifunction TS buffers, and can be used as a single buffer, or can be divided to generate multiple TSs. When generating multiple TSs, they are multiplexed by multiplexing units (MUX) 13a and 13b. The multiplexed TS is remultiplexed in time division format by ISDB-T remultiplexing unit 14, and then becomes a broadcast TS. That is, in preprocessing unit 15, IIP packets (ISDB-T Information Packets) are inserted and a 16-byte Reed-Solomon code (outer code) is added after 188 bytes. In addition, hierarchical division, energy diffusion, delay compensation, byte interleaving, convolutional coding, carrier modulation (bit interleaving and mapping), and hierarchical synthesis are performed.

The mapped data after carrier modulation is 1 byte for 1CH, 2 bytes for 2CH, and 4 bytes for 4CH. The carrier data is organized into units of 4992 words per symbol period and stored in the receive carrier buffer 16, and an interrupt signal (here, an SDIO interrupt) is generated from the input/output processing unit 11 to the host CPU.

The host CPU that receives the interrupt signal takes in 4992 words and performs interleaving processing using software. This ISDB-T interleaving processing is explained in detail below.

Figure 2 is a format diagram showing the required size of memory space for the receive carrier buffer 16 and transmit carrier buffer 17 in this embodiment. The left side of Figure 2 shows the size of memory space for 1CH, and the right side shows the size for 2CH. The required size is 5K bytes for 1CH and 10K bytes for 2CH. For 1CH, an area for the symbol number (SYMBOL_NUM[7:0]) and a 7-byte dummy is prepared, and for 2CH, an area for the symbol number (SYMBOL_NUM[7:0]) and a 15-byte dummy is prepared. For quick writing and reading, multiple memory areas of the same size may be provided. For example, if a 32K byte memory area is prepared, a three-plane configuration can be used for 2CH.

Figure 3 shows two examples of applications of the ISDB-T modulator of this embodiment. Figure 3(a) is a block diagram of an application example to an IP-RF conversion device, and Figure 3(b) is a block diagram of an application example to a browser ISDB-T conversion device (browser-RF conversion device).

The host device 31 of the IP-RF conversion device shown in FIG. 3(a) is a so-called SOM (System On Module), which is composed of a CPU, a main memory (e.g., SDRAM DRR3), a non-volatile memory such as a flash ROM, a communication unit connected to a network, an input/output processing unit, etc., and receives an IP stream input, more specifically an RTP (UDP+FEC) input, via the communication unit, and outputs a TS stream to the subsequent ISDB-T modulator 30 via the input/output processing unit. In this embodiment, the CPU of this host device 31 executes time interleaving processing by software processing. The I+Q analog signal output from the ISDB-T modulator 30 is converted to an RF signal by an RF upconverter 33 and output. The program for software processing can be stored in a non-volatile memory, for example.

Incidentally, since the TS output from the host device 31 does not contain time information, an accelerator (not shown) is added to the ISDB-T modulator 30, which generates the rate. In other words, when the TS is input to the ISDB-T modulator 30, the playback rate is calculated from the RTP timestamp, and this is set in the accelerator to play back the time.

The host device 32 of the browser ISDB-T conversion device shown in FIG. 3(b) is basically composed of a CPU, main memory (e.g. SDRAM DRR3), non-volatile memory such as flash ROM, a communication unit connected to a network, an input/output processing unit, etc., similar to the host device 31 shown in FIG. 3(a), but has an HTML browser and MPEG2 encoding function and requires a CPU with higher capabilities. The host device 32 receives HTML content (e.g. written in HLS, etc.) as its input, decodes it (MP4/H264), finally converts it (transcodes it) to MPEG2, and outputs it to the ISDB-T modulator 30 as a TS. The I+Q analog signal output from the ISDB-T modulator 30 is converted to an RF signal by the RF upconverter 33 and output. As in the case of FIG. 3(a), this host device 32 executes time interleaving processing by software processing of the CPU.

Before explaining the time interleaving process of this embodiment, we will briefly explain the time interleaving process according to the standard with reference to Figure 4.

The left side of Figure 4 illustrates the writing of carrier data before interleaving processing into the time interleaving memory, while the right side illustrates the reading of carrier data after processing. The vertical axis corresponds to the carrier number, and 4,992 pieces of carrier data are generated in one symbol period. The numbers shown in the boxes for each carrier are the number of delays. The delay here means that even if writing occurs on the left side of the figure, data cannot be read on the right side until the delayed amount of carrier data has been written. Because the number of delays is different for each carrier, it takes a long time to process the entire time interleaving according to the specifications of the standard.

Figure 5 shows the transition state of writing and reading when the delay number is 10. Until the delay number for writing is satisfied (from state 0 to state 8), carrier data cannot be read and output. From the initial state 0 to state 8, only writing is performed, and reading is suppressed. The delay number is satisfied in state 9. In reality, the write position and read position are managed by the write pointer and read pointer. The write pointer has an initial value of 0, and the read pointer also has an initial value of 0 (relative address). When the write pointer exceeds 9 and becomes 10, output begins. At this time, the position of the read pointer 0 is output. After this output, the read pointer is incremented (+1), and the next time a write occurs, the data of the read pointer 1 is output, and the read pointer is incremented again. When the pointer reaches 9, it returns to 0. In this way, after the delay number is satisfied in state 9, it becomes a mechanism like a shift register. The final position of the read pointer must always be known. If such processing is directly processed by software, it becomes quite complicated.

Next, we will explain a specific example of time interleaving processing by software processing on the host CPU in this embodiment.

Figure 6 is an explanatory diagram of time interleaving processing according to this embodiment.

This figure assumes a two-dimensional array (matrix) with a total of 204 symbols from 0 to 203 set on the horizontal axis and a total of 4992 carriers from 0 to 4991 set on the vertical axis. Here, the horizontal axis of the matrix is managed by column, and the vertical axis is managed by row. Data for the 4992 carriers for each symbol position is written in order from carrier number 0 to carrier number 4991. At that time, as described later, the write position is offset in the horizontal axis (symbol axis) direction according to the number of delays for each carrier. After this writing is completed, the symbol number is incremented (+1). As described above, the memory for storing carrier data is prepared in units of 1 byte per word for 1 CH, 2 bytes for 2 CH, and 4 bytes for 4 CH. In this embodiment, the memory area used for such time interleaving processing is secured in the host memory.

At the right end of the vertical axis in Figure 6, the delay number is defined for each carrier number from 0 to 4991. The numbers in the boxes indicate the delay number for each carrier. If the delay number is 0, the carrier data can be read immediately after it is written, but if the delay number is non-zero, it can be read after that amount of delay. The delay number differs depending on the location based on the carrier number i along the vertical axis. The delay number can be calculated based on the standard using the following formula. I is a parameter related to the length of the interleave (2 in this example).

i=0 >> I x m0 = 2 x ((i x 5) mod 96) = 0
i=1 >> I x m1 = 2 x ((i x 5) mod 96) = 10
i=2 >> I x m2 = 2 x ((i x 5) mod 96) = 20
...

The black dots in the matrix area in Figure 6 indicate the write position of the carrier data for each carrier. In other words, this figure shows how the write position of 4992 carrier data lines with symbol number 0 is changed (shifted to the left in the figure) by offsetting the delay number for each carrier on the horizontal axis. When all 4992 lines of carrier data have been written, writing for one symbol period is completed. After writing is completed, the carrier data written in this way is read out from consecutive positions along the vertical axis corresponding to the symbol number to be read, that is, starting from carrier position 0 on the vertical axis and continuing up to 4991. This read carrier data is shifted along the horizontal axis (symbol axis) according to the delay number when it is written, so time interleaving processing is reflected when it is read out.

When reading, the symbol number is incremented (+1) for each symbol position read process, moved along the horizontal axis, and the same process is repeated. When the symbol number finally reaches 203, it returns to 0. Therefore, if the sum of the offset and symbol number is 204 or more, 204 is subtracted from the calculation result and returned to the right.

In this way, by using a technique of moving the position when writing to perform non-contiguous writing and performing continuous reading when reading, it is possible to speed up time interleaving processing. Uniform processing is possible without having to consider the recording of positions for each delay or the output timing. More specifically, 4992 carriers for writing one symbol are prepared in about 1 ms, and although the readout cycle is also about 1 ms, it is also read out at high speed. Once writing of one symbol is completed, the time-interleaved data is read out immediately. However, because the maximum number of delays is 190 symbols, it takes that much time for the time interleaving effect to appear.

Figure 7 shows a sequence diagram illustrating an example of the communication between the input/output processing unit of the ISDB-T modulator and the host device for time interleaving processing in this embodiment.

The input/output processing unit of the ISDB-T modulator first resets the symbol number (symbol_num) to 0 (S1). After that, when the 4992 words of carrier data for this one symbol period are stored in the receive carrier buffer (S2), an interrupt signal is generated to the host CPU (S3) and the 4992 words of carrier data are sent to the host (S4).

The host device (CPU) receives the interrupt signal, receives the carrier data, and performs time interleaving (S11). The resulting time-interleaved carrier data is returned to the ISDB-T modulator (S12).

The input/output processing unit of the ISDB-T modulator receives the carrier data after time interleaving processing and stores it in the transmission carrier buffer (S5). After that, the symbol number is incremented (+1) (S6) and a check is made to see if the symbol number is less than 203 (S7). If the symbol number is less than 203, the process returns to step S2 and the above process is repeated for the next symbol. When the symbol number reaches 203, the process returns to step S1, the symbol number is reset to 0, and the above process is repeated.

Figure 8 is a flowchart showing an example of a specific processing flow for time interleaving processing by a host device.

This process is started by an interrupt as described above. First, the input of the symbol number (symbol_num) is accepted (S21), and the input of the carrier data (carrier_data_in [4992]) is also accepted (S22). Furthermore, the carrier memory (carrier_memory [204][4992]) array is set (secured) (S23). Next, the time interleave table (til_table [96]) is set (S24). This time interleave table is a table that contains 96 values (integer offset values) as the number of delays as shown in Figure 1. This table makes it possible to obtain the number of delays corresponding to each carrier number. The table value corresponding to the carrier number i (maximum 4992) is referenced by iMOD96.

Following step S24, the variable row that counts the carriers is reset to 0 (S25), and the variable segment that counts the segments is reset to 0 (S26). Furthermore, the variable repeat that counts the number of repetitions is reset to 0 (S27), and the variable carrier that represents the carrier count value for table reference is reset to 0 (S28).

Next, it is checked whether the sum of the current symbol number (symbol_num) and the table reference value (til_table[carrier]) of the current carrier count value carrier is less than 203 (S29).

If it is less than 203, the sum of the current symbol number and the table value of the current carrier count value is set as the column value (S30). If it reaches 203, proceed to step S31, and the value obtained by subtracting 204 from the sum of the current symbol number and the table value of the current carrier count value is set as the column value (S31).

Then, the carrier data (carrier_data_in [row]) of the current variable row is stored in the carrier memory position (carrier_memory [column][row]) of the variable column and variable row (S32).

Then, the carrier count value is incremented (+1) (S33), and the variable row is incremented by 1 (+1) (S34).

Then, a check is made to see whether the carrier count value "carrier" is less than 96 (S35). If it is less than 96, the process returns to step S29 and the subsequent processes are executed again.

When it reaches 96, the repeat value is incremented (+1) (S36), and a check is made to see if the value is less than 4 (S37). If it is less than 4, the process returns to step S28, the carrier value is reset to 0, and the subsequent processes are executed again. When it reaches 4, the segment value is incremented (+1) (S38), and a check is made to see if the value is less than 13 (S39). If it is less than 13, the process returns to step S27, the repeat value is reset to 0, and the subsequent processes are executed again.

When the segment value reaches 13, the row value is reset to 0 (S41), and the process moves to the memory read routine.

In the read routine, the carrier data in the carrier memory that corresponds to the current symbol number and the current row value, carrier_memory [symbol_num][row], is set as the output carrier data (carrier_data_out) (S42). Next, the row value is incremented (+1) (S43), and a check is made to see if the row value is less than 4992 (S44). If it is less than 4992, the process returns to step S42, and carrier data is read for the next row value. When it reaches 4992, all 4992 carrier data, carrier_data_out, that correspond to the symbol number is output to the ISDB-T modulator (S45), and the interrupt process is terminated (RET).

Figure 9 shows a table showing the number of delays in time interleaving. For ease of illustration, some parts have been omitted to show one segment. In this figure, I represents the parameter related to the length of the interleave (2 in this example), i represents the carrier number, and SB represents the number of symbol delays. It starts with i=0, SB=0, and at i=95, SB=182. At the next i=96, it returns to SB=0. This is repeated four times within one segment, eventually progressing to i=383, SB=182. There are 384 carriers in one segment, and 13 segments equals 384x13=4992 carriers.

Therefore, the time interleave table (til_table[96]) referred to in the process of FIG. 8 is defined as follows:
char til_table [ 96 ] = {
0,10,20,30,40,50,60,70,80,90,100,110,120,130,140,150,160,170,180,190,
8,18,28,38,48,58,68,78,88,98,108,118,128,138,148,158,168,178,188,
6,16,26,36,46,56,66,76,86,96,106,116,126,136,146,156,166,176,186,
4,14,24,34,44,54,64,74,84,94,104,114,124,134,144,154,164,174,184,
2,12,22,32,42,52,62,72,82,92,102,112,122,132,142,152,162,172,182 };

The above describes the preferred embodiment of the present invention, but various modifications and changes can be made within the scope of the claims in addition to those described above. For example, the present invention has been described as being preferably applied to a modulator IC, but application to a modulator IC is not necessarily a prerequisite. In addition, the parts, elements, numbers, sizes, procedures, variables, values, application examples, etc. used are not necessarily limited to those presented.

11 Input/Output Processing Unit 12a, 12b TS Buffer 13a, 13b Multiplexing Unit (MUX)
14 Remultiplexing unit 15 Preprocessing unit 16 Reception carrier buffer 17 Transmission carrier buffer 21 Frequency interleave processing unit 22 Frame construction unit 23 IFFT unit (+GI addition unit)
24 DAC section 30 ISDB-T modulator 31, 32 host device 33 RF up-converter

Claims (9)

1. An ISDB-T modulator comprising:
A carrier modulation unit that performs carrier modulation on input data;
a receiving carrier buffer for storing carrier data modulated by the carrier modulation unit;
an input/output processing unit that transfers the carrier data in the receiving carrier buffer to a host device and receives carrier data that has been time-interleaved by the host device;
a transmission carrier buffer for storing the time-interleaved carrier data received by the input/output processing unit;
a processing unit that performs frequency interleaving processing, OFDM frame configuration processing, and IFFT processing on the carrier data stored in the transmission carrier buffer and outputs the processed data as an ISDB-T signal. The ISDB-T modulator according to claim 1, wherein the host device performs time interleaving by having its CPU execute a specified program. The ISDB-T modulator of claim 1, wherein the receive carrier buffer and the transmit carrier buffer each store at least one number of carrier data corresponding to one symbol. The ISDB-T modulator according to claim 1, wherein the input/output processing unit transfers the carrier data to the host device when one symbol's worth of carrier data is accumulated in the receiving carrier buffer. The ISDB-T modulator of claim 4, in which the carrier data transferred to the host device is assigned a corresponding symbol number. The ISDB-T modulator according to claim 1, wherein the input/output processing unit generates an interrupt signal to the host device when one symbol of carrier data is accumulated in the receiving carrier buffer. An ISDB-T modulator according to any one of claims 1 to 6 configured as an integrated circuit. A method for time interleaving an ISDB-T modulator, comprising the steps of:
storing the carrier modulated carrier data in a receive carrier buffer;
transferring the carrier data in the receiving carrier buffer to a host device;
receiving time interleaved carrier data at the host device;
storing the received time-interleaved carrier data in a transmission carrier buffer. The host device, in the time interleaving process,
9. The time interleaving processing method according to claim 8, further comprising the steps of: securing a two-dimensional array of (number of symbols x number of carriers) in a main memory; writing, for each symbol, carrier data for the number of carriers for that symbol while offsetting the number of delays in time interleaving for that symbol in the symbol axis direction; and then continuously reading out, for each symbol position, the carrier data for the number of carriers written at that symbol position, and returning it to the ISDB-T modulator.