JP2024047816A - Switching Circuit - Google Patents

Abstract

[Problem] To control the voltages of switching elements connected in series to a balanced state. [Solution] A switching circuit includes a switching section 20 having one end connected to a high potential terminal of a DC voltage source and including multiple switching elements connected in series, an inductor 30 connected between the switching section and a load 100, a conductive section 40 consisting of one or more diodes 41, 42 whose cathodes are on the switching section side and whose anodes are on the low potential side of the DC voltage source, and a control section that controls turning on and off the switching elements. The control section includes a main control section that determines the duty of the ON/OFF operation of each switching element so that the detected value of the output voltage at the output terminal becomes a set value, and a timing correction section that corrects the timing of turning off each switching element so that the potential difference between the first terminal and the second terminal of each switching element during the OFF period of each switching element approaches the average value. [Selected Figure] Figure 1

Description

The present invention relates to a switching circuit.

In circuits where the withstand voltage of a MOSFET is exceeded, the MOSFETs are connected in series to increase the withstand voltage. However, if there is variation between the MOSFETs connected in series, such as poor voltage balance, some MOSFETs may be subjected to a high voltage that exceeds the device's rated voltage, which may cause damage in the worst case scenario.

A control method is disclosed in which the drain-source voltage Vds of each FET in series is measured and each Vds is controlled to be in a balanced state (Patent Document 1).

JP 2020-114142 A

However, a control method that measures the Vds of each FET requires a detector to be provided for each FET to detect the potential difference between the first and second terminals of the FET, resulting in an overall increase in size.

The present invention was made in consideration of these problems, and aims to provide a switching circuit that can control the voltage of each switching element to a balanced state without measuring the Vds of the switching elements connected in series.

In order to solve the above-mentioned problems and achieve the object, the switching circuit according to the present invention comprises a DC voltage source having a high potential terminal and a low potential terminal and outputting a set DC voltage, a switching unit having one end connected to the high potential terminal of the DC voltage source and having a plurality of switching elements connected in series, an inductor connected between the other end of the switching unit and a load, and at least one inductor connected between the other end of the switching unit and the low potential terminal of the DC voltage source and arranged so that its cathode is on the other end side of the switching unit and its anode is on the low potential terminal side of the DC voltage source. The switching unit has a conduction unit composed of another diode, and a control unit that controls the turning on and off of each switching element included in the switching unit, and the control unit has a main control unit that determines the duty ratio of the ON/OFF operation of each switching element so that the detected value of the output voltage at the output terminal becomes a set value, and a timing correction unit that corrects the timing of turning off each switching element so that the potential difference between the first terminal and the second terminal of each switching element during the OFF period of each switching element approaches the average value.

According to the present invention, it is possible to control the voltage of each switching element to a balanced state without measuring the Vds of the switching elements connected in series.

FIG. 1 is a diagram illustrating an example of a configuration of a switching circuit according to an embodiment. FIG. 2 is a diagram illustrating the rate of change of the potential difference Vds between the first terminal and the second terminal of each switching element. FIG. 3 is a diagram illustrating the rate of change in the potential difference between the first terminal and the second terminal of each switching element when there is variation in capacitance. FIG. 4 is an explanatory diagram of a case where variation occurs in the timing of turning OFF each switching element due to variation in precision of each switching element and the components of the corresponding gate drive circuit. FIG. 5 is a diagram for explaining a method for calculating the correction amount. FIG. 6 is a diagram showing an example of changes in each voltage Vds when the timing of turning off the second switching element is delayed by 6.66 ns. FIG. 7 is a diagram showing a modification of the switching circuit according to the embodiment.

Below, an embodiment of a switching circuit according to the present invention will be described in detail with reference to the drawings. Note that the present invention is not limited to this embodiment.

(Embodiment)
1 is a diagram showing an example of the configuration of a switching circuit according to an embodiment. A DC voltage source 10 has a high potential side terminal 11 and a low potential side terminal 12, and outputs a set DC voltage Vin. The DC voltage source 10 is, for example, configured by a DC-DC converter. In this embodiment, the DC voltage Vi is set to 1000 V, the high potential side terminal 11 is a positive terminal with a potential of 1000 V, and the low potential side terminal 12 is a GND terminal with a GND potential, but this is just an example and is not limited to this.

For example, the potential of the high potential terminal 11 may be GND potential, and the potential of the low potential terminal 12 may be -1000V.

The DC voltage Vi may be a high voltage of 10 kV or more. In the case of such a high voltage, it is desirable to increase the number of switching elements connected in series in the switching unit 20 described later, thereby reducing the potential difference per switching element.

The switching unit 20 has multiple switching elements connected in series. The MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) shown in FIG. 1 is an example of a switching element. In each of the multiple switching elements Q1 and Q2, the first terminal corresponds to the drain of the MOSFET, the second terminal corresponds to the source of the MOSFET, and the third terminal corresponds to the gate of the MOSFET. The first terminal of the switching element Q1 is connected to one end of the switching unit 20, the second terminal of the switching element Q2 is connected to the other end of the switching unit 20, and one end of the switching unit 20 is connected to the high potential terminal 11 of the DC voltage source 10.

The inductor 30 is connected between the other end of the switching unit 20 and the load 100. The first node N1 refers to the connection point between the switching unit 20 and the inductor 30.

The conductive part 40 is connected between the other end of the switching part 20 and the low potential side terminal 12 of the DC voltage source 10. The second node N2 refers to the connection point between the conductive part 40 and the low potential side terminal 12.

In this embodiment, the conductive section 40 is configured with two diodes 41, 42 connected in series. Each diode 41, 42 is arranged so that the cathode is on the other end side of the switching section 20, i.e., the first node N1 side, and the anode is on the low potential side terminal 12 side of the DC voltage source 10, i.e., the second node N2 side. Note that the number of these diodes is not limited, and an appropriate number is set depending on the usage environment, such as the potential difference across both ends.

The smoothing capacitor 50 smoothes the voltage at the output terminal of the switching circuit 1. In this embodiment, the smoothing capacitor 50 is connected between the high-potential side output terminal T1 and the low-potential side output terminal T2, and smoothes the voltage output to the load resistor 100.

The voltage detection unit 60 detects the voltage at the output terminal of the switching circuit 1 and outputs the detection signal to the main control unit 81 as the detection value of the output voltage (Vout_det). The voltage at the output terminal is the voltage between the high potential side output terminal T1 and the low potential side output terminal T2, and this is detected as the output voltage. The output voltage is actually input to the main control unit 81 via an A/D converter or the like, but the A/D converter or the like is not shown here.

The current detection unit 70 detects the inductor current IL flowing between the first node N1 and the inductor 30, and outputs the detection signal to the timing correction unit 82 as the detection value (IL_det) of the inductor current IL. In practice, the inductor current IL is input to the timing correction unit 82 via an A/D converter or the like, but the A/D converter and the like are not shown here.

The control unit 80 includes a main control unit 81 and a timing correction unit 82.

The main control unit 81 determines the duty ratio (duty) of the ON/OFF operation of each switching element Q1, Q2 so that the detected value (Vout_det) of the output voltage at the output terminal of the switching circuit 1 becomes the set value (Vout_set).

Specifically, the following information (1) to (3) is input to the main control unit 81 as setting values. For example, this information may be input to the main control unit 81 from another device, or may be input via a user interface (not shown).

(1) Set value of the output voltage at the output terminal of the switching circuit 1 Vout_set

(2) Switching period setting value Tsw_set or switching frequency setting value Freq_set

(3) Initial value of the duty ratio Duty_ini

The initial duty ratio (duty) of the ON/OFF operation of each switching element Q1 and Q2 is determined based on the information in (2) and (3) above.

Also, enter the following information as the detection value:

(4) Detected value Vout_det of the output voltage at the output terminal of the switching circuit 1

The information (4) is output from the voltage detection unit 60. The updated value (Duty) of the duty ratio (duty) is output to the timing correction unit 82 so that the detected value Vout_det of the output voltage becomes the set value Vout_set of the output voltage (1).

The timing correction unit 82 corrects the timing of turning OFF each of the switching elements Q1 and Q2 so that the potential difference between the first terminal and the second terminal of each of the switching elements Q1 and Q2 during the OFF period of each of the switching elements Q1 and Q2 approaches the average value. As a result, the timing of turning OFF each of the switching elements Q1 and Q2 differs, so switching control signals Ssw1 and Ssw2 for each of the switching elements Q1 and Q2 are generated and output to the corresponding gate drive circuit 91 for Q1 and gate drive circuit 92 for Q2.

The timing correction unit 82 may correct the timing of turning OFF each of the switching elements Q1 and Q2 so that when the potential difference between the first terminal and the second terminal of each of the switching elements Q1 and Q2 increases after each of the switching elements Q1 and Q2 is turned OFF and the sum of the potential differences becomes equal to the potential difference between the high potential side terminal 11 and the low potential side terminal 12 of the DC voltage source 10, which is 1000 V in one embodiment, the potential difference between the first terminal and the second terminal of each of the switching elements Q1 and Q2 approaches the average value.

Specifically, the following information (1) to (8) is input to the timing correction unit 82 as setting values. This information may be input, for example, from another device or via a user interface (not shown).

The timing correction unit 82 calculates the correction time using information (1) to (8).

(1) Switching period setting value (Tsw_set) or switching frequency setting value (Freq_set)

(2) Set value of the DC voltage output from the DC voltage source 10 (Vin_set)

(3) Inductance L of inductor 30

(4) Capacitance Ccoss1 of the parasitic capacitance Coss1 of the switching element Q1

(5) Capacitance Ccoss2 of the parasitic capacitance Coss2 of the switching element Q2

(6) Duty ratio (duty) update value (Duty)

Also, enter the following information as the detection value:

(7) The detection value (IL_det) of the inductor current IL flowing between the first node N1 and the inductor 30 output from the current detection unit 70

(8) The detected value of the output voltage at the output terminal of the switching circuit 1 output from the voltage detection unit 60 (Vout_det)

In addition, the set value (Vout_set) in (9) below may be used instead of the detection value (Vout_det) in (8).

(9) Set value of the output voltage at the output terminal of the switching circuit 1 (Vout_set)

However, it is preferable to use the actual detection value (8) (Vout_det), as this allows for more realistic control.

The gate drive circuit 91 for Q1 and the gate drive circuit 92 for Q2 control the potential difference between the third terminal and the second terminal of the corresponding switching elements Q1 and Q2 based on the switching control signals Ssw1 and Ssw2 for each switching element Q1 and Q2 output from the timing correction unit 82, thereby controlling the ON/OFF operation of each switching element Q1 and Q2.

<Explanation of the charging operation of the parasitic capacitances Coss1 and Coss2 when the switching elements Q1 and Q2 are turned OFF>

In the above configuration, when each switching element Q1, Q2 is ON, the first node N1 has the same potential as the potential (1000 V) of the high potential side terminal 11 of the DC voltage source 10. At this time, the conductive part 40 is non-conductive, so the DC voltage (1000 V) output from the DC voltage source 10 is supplied to the load 100 via the inductor 30.

After that, when the switching elements Q1 and Q2 are turned OFF simultaneously, the high potential side terminal 11 of the DC voltage source 10 and the first node N1 are in an open state. However, since the conductive part 40 is not yet conductive, the potential of the first node N1 is not the same as the potential of the low potential side terminal 12 of the DC voltage source 10.

In this state, a path is created through which current flows from the inductor 30 to the parasitic capacitances Coss1 and Coss2 of the switching elements Q1 and Q2 included in the switching unit 20, and the parasitic capacitances Coss1 and Coss2 are charged. As a result, the absolute value of the potential difference between the first and second terminals of each switching element Q1 and Q2 increases. As a result, the absolute value of the potential difference between both ends of the switching unit 20 (between one end and the other end) increases. Then, when the total value of the potential difference between the first and second terminals of each switching element Q1 and Q2 becomes the same as the potential difference (1000 V) between the high potential side terminal 11 and the low potential side terminal 12, the change in the potential difference stops, and the potential of the first node N1 becomes the same as the potential of the low potential side terminal 12 of the DC voltage source 10. Therefore, the conductive unit 40 is conductive.

Figure 2 is a diagram explaining the rate of change of the potential difference Vds between the first terminal and the second terminal of each switching element Q1, Q2. Figure 2(a) shows a simplified diagram of the circuit shown in Figure 1. Figure 2(b) shows an example of the relationship between the potential difference Vgs (Q1Vgs, Q2Vgs) between the third terminal and the second terminal of each switching element Q1, Q2 during ON/OFF operation, the potential difference Vds (Q1Vds, Q2Vds) between the first terminal and the second terminal of each switching element Q1, Q2, the inductor current IL, and the output voltage Vout.

As an example, FIG. 2 shows the case where the capacitances Ccoss1 and Ccoss2 of the parasitic capacitances Coss1 and Coss2 of each switching element Q1 and Q2 are the same with no variation. When the parasitic capacitances Coss1 and Coss2 are charged along the path through which current flows from the inductor 30 side to the parasitic capacitances Coss1 and Coss2 described above, the potential difference Vds between the first terminal and the second terminal of each switching element Q1 and Q2 increases at the same rate of change. In FIG. 2, the changes in the potential difference Vds of each switching element Q1 and Q2 overlap because they change at the same rate.

Since they increase at the same rate at the same time, when the total potential difference between the first and second terminals of each switching element Q1 and Q2 becomes the same as the potential difference between the high potential side terminal 11 and the low potential side terminal 12 of the DC voltage source 10, each potential difference becomes the same as the average value.

As shown in FIG. 2, when the potential of the high potential side terminal 11 of the DC voltage source 10 is 1000V, the capacitance Ccoss1 of the parasitic capacitance Coss1 of the first switching element Q1 is 100pF, and the capacitance Ccoss2 of the parasitic capacitance Coss2 of the second switching element Q2 is 100pF, the potential difference Q1Vds between the first terminal and the second terminal of the first switching element Q1 is 500V, and the potential difference Q2Vds between the first terminal and the second terminal of the second switching element Q2 is 500V. In this example, since there are two switching elements Q1 and Q2, the average value is 500V. In other words, the potential differences Q1Vds and Q2Vds between the first terminal and the second terminal of each of the switching elements Q1 and Q2 are both the same as the average value of 500V.

<Reason for timing correction>
On the other hand, if there is variation in the capacitances Ccoss1 and Ccoss2 of the parasitic capacitances Coss1 and Coss2 of the switching elements Q1 and Q2, the rate of change in the potential difference Vds (potential difference Q1Vds and potential difference Q2Vds) between the first terminal and the second terminal of each switching element Q1 and Q2 will be different.

Figure 3 is a diagram explaining the rate of change of the potential difference Q1Vds and the potential difference Q2Vds between the first and second terminals of each switching element Q1, Q2 when there is variation in the capacitances Ccoss1, Ccoss2. Figure 3(a) shows a simplified circuit with variation in the capacitances Ccoss1, Ccoss2. Figure 3(b) shows an example of the relationship between the potential difference Vgs (Q1Vgs, Q2Vgs), the potential difference Vds (Q1Vds, Q2Vds), the inductor current IL, and the output voltage Vout in the circuit shown in Figure 3(a). Note that Figure 3(b) also shows enlarged views at the time of turn-off to show the difference in the rate of change of the potential difference Q1Vds and the potential difference Q2Vds.

When the parasitic capacitances Coss1 and Coss2 are charged along the path through which current flows from the inductor 30 to the parasitic capacitances Coss1 and Coss2, as shown in the enlarged view of FIG. 3(b), the potential difference Vds between the first terminal and the second terminal of each switching element Q1 and Q2 increases at different change rates. Since the potential difference Vds increases at different change rates at the same time, the difference in the potential difference between the first terminal and the second terminal of each switching element Q1 and Q2 increases.

As shown in FIG. 3, for example, assume that the potential of the high potential side terminal 11 of the DC voltage source 10 is 1000V, the capacitance Ccoss1 of the parasitic capacitance Coss1 of the first switching element Q1 is 200pF, and the capacitance Ccoss2 of the parasitic capacitance Coss2 of the second switching element Q2 is 100pF. In this case, as shown in the enlarged view, the potential difference Q1Vds between the first and second terminals of the first switching element Q1 during charging is 320V, and the potential difference Q2Vds between the first and second terminals of the second switching element Q2 is 680V. At this stage, the conductive part 40 is conductive.

That is, a difference occurs between the potential difference Q1Vds and the potential difference Q2Vds between the first terminal and the second terminal of each of the switching elements Q1 and Q2. If this difference is large, there is a possibility that the upper limit of the withstand voltage of the switching element Q1 or the switching element Q2 will be exceeded. If the upper limit of the withstand voltage of the switching element Q1 or the switching element Q2 is exceeded, that switching element (switching element Q1 or switching element Q2) will be damaged.

<Reasons for performing timing correction (other examples)>
Furthermore, due to variations in the precision of the switching elements Q1, Q2 and the components of the corresponding gate drive circuits 91, 92, there is a possibility that variations will occur in the timing at which the switching elements Q1, Q2 are turned OFF.

Figure 4 is an explanatory diagram of a case where the timing of turning off each switching element Q1, Q2 varies due to the variation in the accuracy of the parts of each switching element Q1, Q2 and the corresponding gate drive circuits 91, 92. Figure 4 shows an example of the relationship between the potential difference Vgs (Q1Vgs, Q2Vgs), the potential difference Vds (Q1Vds, Q2Vds), the inductor current IL, and the output voltage Vout when the timing of turning off each switching element Q1, Q2 varies in a circuit such as Figure 2. In addition, enlarged views at the time of turn-off are shown side by side to show the deviation between the potential difference Q1Vds and the potential difference Q2Vds. In the example shown in Figure 4, the capacitances Ccoss1 and Ccoss2 of the parasitic capacitances Coss1 and Coss2 of each switching element Q1, Q2 are both 100 pF.

In FIG. 4, the potential difference between the third terminal and the second terminal of each switching element Q1, Q2 (potential difference Q1Vgs and potential difference Q2Vgs) causes a difference in the timing of turning OFF.

When the parasitic capacitances Coss1 and Coss2 are charged along the path through which current flows from the inductor 30 to the parasitic capacitances Coss1 and Coss2, as shown in the enlarged view of FIG. 4, the potential difference Vds between the first and second terminals of each switching element Q1 and Q2 increases at the same rate. Although the potential difference Vds increases at the same rate, the timing of turn-off differs, so a difference occurs in the potential difference between the first and second terminals of each switching element Q1 and Q2.

4, for example, if the second switching element Q2 is turned OFF earlier than the first switching element Q1, even if the capacitances Ccoss1 and Ccoss2 of the parasitic capacitances Coss1 and Coss2 of the switching elements Q1 and Q2 are the same, the potential difference Vds between the first and second terminals of the second switching element Q2 starts to change earlier. Therefore, when the sum of the potential differences Vds (potential difference Q1Vds and potential difference Q2Vds) becomes equal to the potential difference (e.g., 1000V) between the high potential side terminal 11 and the low potential side terminal 12 of the DC voltage source 10, the potential difference Vds of the second switching element Q2 becomes larger. Specifically, when the timing of the turn-OFF is 5 ns earlier, in the example shown in FIG. 4, the potential difference Q1Vds between the first and second terminals of the first switching element Q1 is 310 V, and the potential difference Q2Vds between the first and second terminals of the second switching element Q2 is 690 V. At this stage, the conductive part 40 is conductive.

<Effect of timing correction>
The switching circuit 1 of this embodiment has a timing correction unit 82, and can correct the timing of turning OFF each of the switching elements Q1 and Q2. Therefore, even if there is variation in the capacitances Ccoss1 and Ccoss2 of the parasitic capacitances Coss1 and Coss2 of each of the switching elements Q1 and Q2, or there is variation in the timing of turning OFF each of the switching elements Q1 and Q2, it is possible to reduce variation in the potential difference between the first terminal and the second terminal of each of the switching elements Q1 and Q2 when each of the switching elements Q1 and Q2 is turned OFF.

As a result, the possibility of exceeding the upper voltage limit of the switching elements Q1 and Q2 is reduced, which in turn reduces the possibility of damage due to increased switching losses.

<Example of correction method>
As described above, when each of the switching elements Q1 and Q2 is turned OFF, a path through which a current flows from the inductor 30 to the parasitic capacitances Coss1 and Coss2 of each of the switching elements Q1 and Q2 included in the switching unit 20 is generated, and the parasitic capacitances Coss1 and Coss2 are charged. As a result, the absolute value of the potential difference between the first terminal and the second terminal of each of the switching elements Q1 and Q2 increases.

Therefore, if the current value of the inductor current IL when each switching element Q1, Q2 is turned OFF (hereinafter, the current value of the inductor current IL is referred to as the inductor current value), the correction amount in the timing correction unit 82 can be calculated based on the inductor current value and other known values.

Below, we will explain in detail how the timing correction unit 82 calculates the correction amount based on the inductor current value and other known values, with reference to Figure 5.

Figure 5 is a diagram to explain how to calculate the correction amount.

[Step 1]
The inductor current value IL_peak when each of the switching elements Q1 and Q2 is turned OFF is calculated using the following formula (1). The values used in formula (1) are (a) to (e) below. When the conditions in this embodiment are applied to formula (1), the inductor current value IL_peak becomes 7.5 A.

At this stage, all switching elements Q1 and Q2 included in the switching unit 20 are turned ON and OFF simultaneously.

IL_peak = IL_0 + (Vin - Vout) / L x Ton
= 7.5A ... (1)

(a) to (e) will be described with reference to FIG.
(a) IL_0

This is the inductor current value of the inductor 30 when each switching element Q1, Q2 is turned ON. This inductor current value IL_0 may be detected, for example, by the current detection unit 70.

In this embodiment, the inductor current value IL_0 of the inductor 30 detected by the current detection unit 70 when each switching element Q1 and Q2 is turned ON, as shown in FIG. 5, is assumed to be 2.5 A.

In this embodiment, since the switching circuit 1 functions as a step-down chopper, the inductor current value IL of the inductor 30 rises at a constant gradient, i.e., at a current change rate per unit time, during the ON period (Ton) of each switching element Q1, Q2, as shown in FIG. 5, and reaches a maximum value (peak value) IL_peak when each switching element Q1, Q2 is turned OFF. The gradient is expressed by "(Vin-Vout)/L×Ton" in formula (1).

As can be seen from the explanation so far, since equation (1) is a linear function, it is not necessary to detect the inductor current value IL_0 when each switching element Q1, Q2 is turned ON. In other words, if the inductor current value of inductor 30 is detected during the ON period of each switching element Q1, Q2, the inductor current value IL_peak when each switching element Q1, Q2 is turned OFF can be calculated.

However, if the inductor current value is detected immediately before each switching element Q1, Q2 is turned OFF, the timing correction unit 82 cannot calculate the correction amount for the turn OFF timing of each switching element Q1, Q2 by the time each switching element Q1, Q2 is turned OFF, so the detection timing of the inductor current value must be determined taking into account the calculation time.

(b) Vin
This is the voltage value at one end (input side) of the inductor 30 when each of the switching elements Q1 and Q2 is turned ON. This voltage value can be substituted for the potential difference (1000V) between the terminals (between the high potential side terminal 11 and the low potential side terminal 12) of the DC voltage source 10. Since the DC voltage (1000V) output from the DC voltage source 10 is stable, the set value Vin_set of the DC voltage output from the DC voltage source 10 can be used. The set value Vin_set is a known value. In this embodiment, the set value Vin_set of the DC voltage (1000V) output from the DC voltage source 10 is 1000V.

(c) Vout
It is a voltage value at the other end (output side) of the inductor 30 when each switching element Q1, Q2 is turned ON. Note that this voltage value is the same as the output end voltage Vout of the switching circuit 1 (the potential difference between the high potential side output terminal T1 and the low potential side output terminal T2 of the switching circuit 1). Also, as described above, the output end voltage Vout detected by the voltage detection unit 60 is fed back to stabilize the output end voltage Vout, so that the set value Vout_set of the output end voltage Vout, which is a known value, can be used. Of course, the output end voltage Vout detected by the voltage detection unit 60 may also be used. Note that in this embodiment, the set value Vout_set of the output end voltage Vout is 500V.

(d) Ton
It is the time of the ON period during one cycle of the ON/OFF operation of the switching elements Q1 and Q2. Therefore, the time Ton can be calculated based on the setting value Tsw_set of the switching cycle and the duty ratio duty. Of course, the time Ton may be calculated using the setting value Freq_set of the switching frequency and the duty ratio duty. The setting value Tsw_set of the switching cycle, the setting value Freq_set of the switching frequency, and the duty ratio duty are known values. In this embodiment, the duty ratio duty is 50%.

(e) L
This is the inductance L of the inductor 30. The inductance L of the inductor 30 is a known value since it has been measured in advance. In this embodiment, the inductance L of the inductor 30 is 500 μH.

[Step 2]
Next, a correction time Δtn for correcting the timing of turning OFF each of the switching elements Q1 and Q2 is calculated so that the potential difference between the first terminal and the second terminal of each of the switching elements Q1 and Q2 approaches the average value, using the inductor current value IL_peak when each of the switching elements Q1 and Q2 is turned OFF, calculated in step 1. The correction time Δtn can be used as a delay time for delaying the timing of turning OFF, for example.

For example, suppose that the potential of the high potential side terminal 11 of the DC voltage source 10 is 1000 V, the capacitance Ccoss1 of the parasitic capacitance Coss1 of the first switching element Q1 is 200 pF, and the capacitance Ccoss2 of the parasitic capacitance Coss2 of the second switching element Q2 is 100 pF, and the IL_peak calculated in step 1 is 7.5 A. In addition, the average value Vave of the potential difference between the first terminal and the second terminal of each switching element Q1 and Q2 is 500 V.

Under these conditions, after each switching element Q1, Q2 is turned OFF, the potential difference between the first terminal and the second terminal of each switching element Q1, Q2 increases, and each potential difference becomes the average value Vave.

Therefore, the rate of change in the potential difference between the first terminal and the second terminal is calculated for each switching element Q1 and Q2.

The rate of change ΔVds1/Δt of the potential difference between the first terminal and the second terminal of the first switching element Q1 is expressed by the following formula (2), and the rate of change ΔVds2/Δt of the potential difference between the first terminal and the second terminal of the second switching element Q2 is expressed by the following formula (3).

However, the capacitance of the parasitic capacitance Coss1 of the first switching element Q1 is Ccoss1, and the capacitance of the parasitic capacitance Coss2 of the second switching element Q2 is Ccoss2.

ΔVds1/Δt=IL_peak/Ccoss1
= 7.5 A / 200 pF = 37.5 / ns ... (2)

ΔVds2/Δt=IL_peak/Ccoss2
= 7.5A/100pF = 75/ns ... (3)

Next, calculate the change time, which is the time it takes for the potential difference between the first terminal and the second terminal of each switching element Q1, Q2 to change to the average value Vave when the change rate is calculated using the above formulas (2) and (3).

The change time Tq1 of the first switching element Q1 is expressed by the following equation (4), and the change time Tq2 of the second switching element Q2 is expressed by the following equation (5).

Tq1 = Vave / (ΔVds1 / Δt)
= 500 / (37.5 V / ns) = 13.33 ns ... (4)

Tq2 = Vave / (ΔVds2 / Δt)
= 500 / (75 V / ns) = 6.66 ns ... (5)

Therefore, the difference between equation (4) and equation (5) is the correction time Δtn, and the timing of turning OFF the switching element with a small parasitic capacitance can be delayed by the difference between equation (4) and equation (5). In the above example, the timing of turning OFF the second switching element Q2 can be delayed by 6.66 ns.

Figure 6 shows an example of the changes in Q1Vds and Q2Vds when the timing of turning off the second switching element Q2 is delayed by 6.66 ns.

The timing correction unit 82 delays the timing of turning OFF the second switching element Q2 by 6.66 ns, so that Q2Vgs changes with a delay based on the delay time of 6.66 ns relative to Q1Vgs, as shown in FIG. 6. Based on these changes, Q1Vds and Q2Vds increase at their respective rates, and each settles at or near the average value Vave of 500 V.

In the above, an example was shown in which the switching unit 20 includes switching elements Q1 and Q2, but the number of switching elements is not limited to two. If there are three or more switching elements, the average value Vave of the potential difference will be different, but otherwise, in the same manner, a correction time can be calculated to correct the timing of turning off each switching element so that the potential difference between the first terminal and the second terminal of each switching element approaches the average value.

In this way, the switching circuit according to this embodiment can be made smaller because it is not necessary to provide a detector for each switching element that detects the potential difference between the first and second terminals of each switching element so as not to exceed the upper voltage resistance value of the switching element, as is the case with conventional technology.

<Modifications of the embodiment>
7 is a diagram showing a modification of the switching circuit according to the embodiment. The capacitances Ccoss1 and Ccoss2 of the parasitic capacitances Coss1 and Coss2 of the switching elements Q1 and Q2 can be measured in advance. Therefore, capacitors (C_add1 and C_Add2) that reduce the variation in the parasitic capacitances Coss1 and Coss2 of the switching elements Q1 and Q2 are externally attached to the switching elements Q1 and Q2 as shown in FIG. 7. By providing the capacitors (C_add1 and C_Add2) in this way, the variation in the potential difference between the first terminal and the second terminal of each switching element Q1 and Q2 when each switching element Q1 and Q2 is turned OFF can be reduced.

Note that commercially available capacitors have capacitances set in stages, so it is difficult to reduce the variation in the parasitic capacitances Coss1 and Coss2 of each switching element Q1 and Q2 to 0 (zero), but it is possible to reduce the variation.

As a result, the correction time in the timing correction section can be shortened, which in turn improves the correction accuracy.

In addition to the above-described embodiments, the present invention may be implemented in various different embodiments within the scope of the technical ideas described in the claims.

REFERENCE SIGNS LIST 1 Switching circuit 10 DC voltage source 11 High potential side terminal 12 Low potential side terminal 20 Switching section 30 Inductor 40 Conduction section 41, 42 Diode 50 Smoothing capacitor 60 Voltage detection section 70 Current detection section 80 Control section 81 Main control section 82 Timing correction section 91 Gate drive circuit for Q1 92 Gate drive circuit for Q2 100 Load Coss1, Coss2 Parasitic capacitance Ccoss1 Capacitance of regulated capacitance of switching element Q1 Ccoss2 Capacitance of regulated capacitance of switching element Q2 IL Inductor current L Inductance N1 First node N2 Second node Q1, Q2 Switching elements Ssw1 Switching control signal for switching element Q1 Ssw2 Switching control signal for switching element Q2 T1 High potential side output terminal T2 Low potential side output terminal

Claims (3)

a DC voltage source having a high potential terminal and a low potential terminal and outputting a set DC voltage;
a switching unit having one end connected to a high potential terminal of the DC voltage source and including a plurality of switching elements connected in series;
an inductor connected between the other end of the switching unit and a load;
a conduction unit including at least one diode connected between the other end of the switching unit and a low potential side terminal of the DC voltage source, the cathode of the diode being located on the other end side of the switching unit and the anode of the diode being located on the low potential side terminal side of the DC voltage source;
A control unit that controls turning on and off each of the switching elements included in the switching unit;
having
The control unit is
a main control unit that determines a duty ratio of an ON/OFF operation of each of the switching elements so that a detected value of an output voltage at an output terminal becomes a set value;
a timing correction unit that corrects a timing of turning off each of the switching elements so that a potential difference between a first terminal and a second terminal of each of the switching elements during an OFF period of each of the switching elements approaches an average value;
A switching circuit having a a correction amount in the timing correction unit is calculated based on a current value of an inductor current of the inductor during an ON period of each of the switching elements and a known value;
2. The switching circuit of claim 1. an external capacitor for reducing the variation in parasitic capacitance of each switching element included in the switching unit;
A switching circuit according to claim 1 or 2.

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