JP2024041597A - Light detector, light detection system, rider device, and movable body - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a light detector, a light detection system, a rider device, and a movable body, capable of shortening a time constant, reducing jitter, or improving photodetection efficiency.

SOLUTION: A light detector according to an embodiment includes a first element unit, a second element unit, an insulating portion, a first wiring, a second wiring, and a third wiring. The first element unit includes a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type provided on the first semiconductor region. The second element unit is aligned with the first element unit in a second direction. The second element unit includes a third semiconductor region of the first conductivity type, a fourth semiconductor region of the second conductivity type provided on the third semiconductor region, and a fifth semiconductor region of the first conductivity type provided on the fourth semiconductor region. The insulating portion is provided between the first element unit and the second element unit. The first wiring is electrically connected to the second semiconductor region. The second wiring is electrically connected to the fourth semiconductor region. The third wiring is electrically connected to the first wiring and the fifth semiconductor region.

SELECTED DRAWING: Figure 1

COPYRIGHT: (C)2024,JPO&INPIT

Description

Embodiments of the present invention relate to a photodetector, a photodetection system, a lidar device, and a moving object.

There are photodetectors with semiconductor regions. Photodetectors are required to shorten the time constant, reduce jitter, or improve photodetection efficiency.

Japanese Patent Application Publication No. 2020-153929 Japanese Patent Application Publication No. 2021-148640

Embodiments of the present invention provide a photodetector, a photodetection system, a lidar device, and a moving object that can shorten the time constant, reduce jitter, or improve photodetection efficiency.

The photodetector according to the embodiment includes a first element section, a second element section, an insulating section, a first wiring, a second wiring, and a third wiring. The first element portion includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type provided on the first semiconductor region. The second element portion is aligned with the first element portion in a second direction perpendicular to the first direction from the first semiconductor region to the second semiconductor region. The second element portion includes a third semiconductor region of a first conductivity type, a fourth semiconductor region of a second conductivity type provided on the third semiconductor region, and a fourth semiconductor region provided on the fourth semiconductor region. a fifth semiconductor region of the first conductivity type. The insulating section is provided between the first element section and the second element section. The first wiring is electrically connected to the second semiconductor region. The second wiring is electrically connected to the fourth semiconductor region. The third wiring is electrically connected to the fifth semiconductor region and electrically connected to the first wiring.

FIG. 1 is a schematic plan view showing a photodetector according to an embodiment. FIG. 2 is an enlarged schematic plan view of portions A and B in FIG. FIG. 3 is an enlarged schematic plan view of portions A and B in FIG. FIG. 4 is an enlarged schematic plan view of one first element portion and its vicinity. FIG. 5 is an enlarged schematic plan view of one second element portion and its vicinity. FIG. 6 is a sectional view taken along line C1-C2 in FIG. FIG. 7 is a schematic diagram for explaining the operation of the photodetector according to the embodiment. FIG. 8 is a schematic diagram for explaining the operation of the photodetector according to the embodiment. FIGS. 9A and 9B are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 10(a) and 10(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 11(a) and 11(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 12(a) and 12(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 13(a) and 13(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 14(a) and 14(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 15(a) and 15(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 16(a) and 16(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 17(a) and 17(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 18(a) and 18(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 19(a) and 19(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 20(a) and 20(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIGS. 21(a) and 21(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment. FIG. 22 is a schematic plan view illustrating a part of the photodetector according to the embodiment. FIG. 23 is a schematic plan view illustrating a part of the photodetector according to the embodiment. FIG. 24 is a schematic plan view illustrating a part of a photodetector according to a reference example. FIG. 25 is a schematic plan view showing a part of the photodetector according to the first modification of the embodiment. FIG. 26 is a sectional view taken along line A1-A2 in FIG. FIG. 27 is a schematic plan view showing a part of a photodetector according to a second modification of the embodiment. FIG. 28 is a schematic cross-sectional view showing a part of a photodetector according to a third modification of the embodiment. FIG. 29 is a schematic cross-sectional view showing a part of a photodetector according to a fourth modification of the embodiment. FIG. 30 is a schematic plan view showing a part of a photodetector according to a fifth modification of the embodiment. FIG. 31 is a schematic diagram showing a photodetection system according to an embodiment. FIG. 32 is a table showing conditions and results of determination by the determiner. FIG. 33 is a schematic diagram illustrating an active quench circuit. FIG. 34 is a schematic diagram illustrating a lidar device according to an embodiment. FIG. 35 is a diagram for explaining detection of a detection target by a LIDAR device. FIG. 36 is a schematic top view of a moving body equipped with a lidar device according to an embodiment.

Each embodiment of the present invention will be described below with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios may be shown differently depending on the drawing.
In the specification of this application and each figure, elements similar to those already explained are given the same reference numerals, and detailed explanations are omitted as appropriate.
In the following description, the notations n ⁺ , n, n ⁻ and p ⁺ , p, p ⁻ represent relative levels of each impurity concentration. In other words, a notation with a "+" has a relatively higher impurity concentration than a notation with neither a "+" nor a "-", and a notation with a "-" Indicates that the impurity concentration is relatively lower than the notation without . When each region contains both p-type impurities and n-type impurities, these notations represent the relative height of the net impurity concentration after these impurities compensate for each other.
Each of the embodiments described below may be implemented by inverting the p-type and n-type of each semiconductor region.

FIG. 1 is a schematic plan view showing a photodetector according to an embodiment. 2 and 3 are enlarged schematic plan views of portion A and portion B of FIG. 1, respectively. FIG. 4 is an enlarged schematic plan view of one first element portion and its vicinity. FIG. 5 is an enlarged schematic plan view of one second element portion and its vicinity. FIG. 6 is a sectional view taken along line C1-C2 in FIG.

As shown in FIGS. 1 to 6, the photodetector 1 according to the embodiment includes a first element section 10, a second element section 20, an insulating section 30, a semiconductor layer 31, an insulating layer 35, a quench section 40, a first It includes a wiring 41, a second wiring 42, a third wiring 43, a protective resistor 45, a common wiring 51, a first pad 61, and a second pad 62. Note that the insulating layer 35 is omitted in FIGS. 1 to 5.

As shown in FIG. 1, the first pad 61 and the second pad 62 are separated from each other and electrically isolated. The first pad 61 and the second pad 62 are each electrically connected to an external electronic device via a bonding wire or the like.

As shown in FIGS. 1 and 2, a plurality of common wiring lines 51 are electrically connected to the first pad 61. As shown in FIGS. 1 and 3, a plurality of second wirings 42 are electrically connected to the second pad 62. In the illustrated example, one common wiring 51 and one second wiring 42 are provided alternately in the Y direction.

As shown in FIGS. 4 to 6, the first element section 10 includes a p ^- type (first conductivity type) semiconductor region 11 (first semiconductor region) and an n ⁺ type (second conductivity type) semiconductor region 12 (first conductivity type). 2 semiconductor regions). The second element section 20 includes a p ⁻ type semiconductor region 23 (third semiconductor region), an n type semiconductor region 24 (fourth semiconductor region), a p ⁺ type semiconductor region 25 (fifth semiconductor region), and an n ⁺ type semiconductor region region 26 is included.

Here, the direction from the p ⁻ type semiconductor region 11 to the n ⁺ type semiconductor region 12 is defined as the Z direction (first direction). One direction perpendicular to the Z direction is defined as the X direction (second direction). One direction that is perpendicular to the Z direction and intersects with the X direction is defined as the Y direction (third direction). The Y direction may be orthogonal to the X direction. Furthermore, for the sake of explanation, the direction from the p ^- type semiconductor region 11 to the n ⁺ type semiconductor region 12 is referred to as "up", and the opposite direction is referred to as "down". These directions are based on the relative positional relationship between the p ⁻ type semiconductor region 11 and the n ⁺ type semiconductor region 12, and are independent of the direction of gravity.

As shown in FIG. 6, the first element section 10, the second element section 20, and the insulating section 30 are provided on the semiconductor layer 31. As illustrated, a back electrode 32 may be provided under the semiconductor layer 31. The second element section 20 is aligned with the first element section 10 in one direction perpendicular to the Z direction. The insulating section 30 is provided around the first element section 10 in the XY plane. A portion of the insulating section 30 is located between the first element section 10 and the second element section 20.

In the first element section 10, the n ⁺ type semiconductor region 12 is provided on the p ⁻ type semiconductor region 11. A pn junction J1 is formed between the p ⁻ type semiconductor region 11 and the n ⁺ type semiconductor region 12.

As illustrated, the p ^- type semiconductor region 11 may include a first portion 11a and a second portion 11b. The second portion 11b is provided on the first portion 11a. The pn junction J1 is formed between the second portion 11b and the n ⁺ type semiconductor region 12. The p-type impurity concentration of the second portion 11b is higher than the p-type impurity concentration of the first portion 11a.

The thickness of the first portion 11a (length in the Z direction) is greater than the thickness of the second portion 11b. The n type impurity concentration of the n ⁺ type semiconductor region 12 is higher than the p type impurity concentration of the first portion 11a. The n type impurity concentration of the n ⁺ type semiconductor region 12 may be the same as the p type impurity concentration of the second portion 11b, or may be higher than that.

The first portion 11a is in contact with the insulating section 30. The second portion 11b and the n ⁺ type semiconductor region 12 are separated from the insulating section 30. Alternatively, the second portion 11b and the n ⁺ type semiconductor region 12 may be in contact with the insulating section 30.

In the second element section 20, the n-type semiconductor region 24 is provided on the p ^- type semiconductor region 23. The p ⁺ type semiconductor region 25 and the n ⁺ type semiconductor region 26 are provided on the n type semiconductor region 24 . The p ⁺ type semiconductor region 25 and the n ⁺ type semiconductor region 26 are separated from each other.

The n-type impurity concentration of the n-type semiconductor region 24 is higher than the p-type impurity concentration of the p ^- type semiconductor region 23. The p type impurity concentration of the p ⁺ type semiconductor region 25 is higher than the n type impurity concentration of the n type semiconductor region 24. The n type impurity concentration of the n ⁺ type semiconductor region 26 is higher than the n type impurity concentration of the n type semiconductor region 24.

A pn junction J2 and a pn junction J3 are formed between the p ⁻ type semiconductor region 23 and the n type semiconductor region 24 and between the n type semiconductor region 24 and the p ⁺ type semiconductor region 25, respectively. The thickness of the p ^- type semiconductor region 23 is smaller than the thickness of the p ^- type semiconductor region 11. The thickness of the n-type semiconductor region 24 is greater than the thickness of the n ⁺ -type semiconductor region 12. The pn junction J2 between the p ⁻ type semiconductor region 23 and the n type semiconductor region 24 is located below the pn junction J1 between the p ⁻ type semiconductor region 11 and the n ⁺ type semiconductor region 12.

As illustrated, the n-type semiconductor region 24 may include a third portion 24c and a fourth portion 24d. The fourth portion 24d is provided on the third portion 24c. The n-type impurity concentration of the fourth portion 24d is higher than the n-type impurity concentration of the third portion 24c. The p ⁺ type semiconductor region 25 and the n ⁺ type semiconductor region 26 are in contact with the fourth portion 24d.

The p ^- type semiconductor region 23 and the third portion 24c are in contact with the insulating section 30. The fourth portion 24d, the p ⁺ type semiconductor region 25, and the n ⁺ type semiconductor region 26 are separated from the insulating section 30.

The p ⁻ type semiconductor region 11 and the p ⁻ type semiconductor region 23 are connected under the insulating section 30 . Therefore, carriers can move between the p ^- type semiconductor region 11 and the p ^- type semiconductor region 23.

Preferably, the insulating section 30 is optically transparent. The insulating section 30 is made of, for example, an insulating material. A light-transmitting conductive member may be provided in the insulating section 30. In either case, an insulating section 30 is provided at a position in contact with the semiconductor region.

The first wiring 41 is electrically connected to the n ⁺ type semiconductor region 12 via a contact plug 41a. The second wiring 42 is electrically connected to the n ⁺ type semiconductor region 26 via a contact plug 42a. The n-type semiconductor region 24 is electrically connected to the second wiring 42 via the n ⁺ -type semiconductor region 26.

The third wiring 43 is electrically connected to the p ⁺ type semiconductor region 25 via a contact plug 43a. The third wiring 43 is electrically connected to the first wiring 41. In the illustrated example, the third wiring 43 is electrically connected to the first wiring 41 via a contact plug 45a, a protective resistor 45, and a contact plug 45b.

As shown in FIG. 4, the first wiring 41 is electrically connected to the common wiring 51 via the quench section 40. In the illustrated example, a contact plug 40a, a quench section 40, and a contact plug 40b are electrically connected between the first wiring 41 and the common wiring 51. The first wiring 41 is electrically connected between the quench section 40 and the third wiring 43.

The electrical resistance of the quench section 40 is larger than the electrical resistance of each of the contact plug 40a, the contact plug 40b, the first wiring 41, the third wiring 43, and the protective resistor 45. The electrical resistance of the quench section 40 is preferably greater than 50 kΩ and less than 6 MΩ. The electrical resistance of the protective resistor 45 is larger than the electrical resistance of each of the contact plug 40a, the contact plug 40b, the first wiring 41, and the third wiring 43. The electrical resistance of the protective resistor 45 is preferably larger than 0.1 times and smaller than 0.5 times the electrical resistance of the quenching part 40. More preferably, the electrical resistance of the protective resistor 45 is greater than 0.1 times and less than 0.2 times the electrical resistance of the quench section 40.

At least a portion of the quench portion 40 or at least a portion of the protection resistor 45 is located above the p ⁻ type semiconductor region 23. Preferably, the quench section 40 and the protection resistor 45 are not provided on the first element section 10. Thereby, the light traveling toward the first element section 10 can be prevented from being blocked by the quench section 40 or the protective resistor 45.

As shown in FIGS. 1 to 3, a plurality of first element sections 10 are provided in the X direction and the Y direction. A plurality of insulating sections 30 are provided around the plurality of first element sections 10, respectively. As shown in FIGS. 2 and 3, one second element section 20 is located between adjacent first element sections 10 in the X direction. The first element section 10 and the second element section 20 are provided alternately in the X direction.

As shown in FIGS. 1 to 4, the second wiring 42 and the common wiring 51 extend along the X direction. One common wiring 51 is electrically connected to a plurality of n ⁺ type semiconductor regions 12 arranged in the X direction. One second wiring 42 is electrically connected to a plurality of n ⁺ type semiconductor regions 26 aligned in the X direction.

As shown in FIG. 6, the insulating layer 35 is provided on the first element section 10, the second element section 20, and the insulating section 30. The insulating layer 35 is optically transparent. The quench section 40 , the first wiring 41 , the second wiring 42 , the third wiring 43 , the protective resistor 45 , and the like are provided in the insulating layer 35 . The insulating layer 35 may have a stacked structure of a plurality of insulating films.

7 and 8 are schematic diagrams for explaining the operation of the photodetector according to the embodiment.
P ^- type semiconductor region 11 is electrically connected to semiconductor layer 31. The n ⁺ type semiconductor region 12 is electrically connected to the first pad 61 via the first wiring 41 and the common wiring 51. By controlling the potential of the semiconductor layer 31 (or back electrode 32) and the potential of the first pad 61, a voltage is applied between the p ⁻ type semiconductor region 11 and the n ⁺ type semiconductor region 12. .

As shown in FIG. 7, when light L enters the first element section 10 from above, the light L is photoelectrically converted in the first element section 10, and carriers (electron-hole pairs) are generated. The carrier moves according to the voltage applied to the first element section 10. Due to the movement of carriers, a current i1 flows through the first wiring 41. By detecting the current i1, the incidence of the light L on the first element section 10 can be detected.

In the second element section 20, the p ^- type semiconductor region 23 is electrically connected to the semiconductor layer 31 similarly to the p ^- type semiconductor region 11. That is, the potential of the p ^- type semiconductor region 23 is substantially the same as the potential of the p ^- type semiconductor region 11. The n-type semiconductor region 24 is electrically connected to the second pad 62 via the n ⁺ -type semiconductor region 26 and the second wiring 42 . By controlling the potential of the semiconductor layer 31 and the potential of the second pad 62, a voltage is applied between the p ^- type semiconductor region 23 and the n-type semiconductor region 24.

A negative voltage is applied to the semiconductor layer 31 with respect to the first pad 61 and the second pad 62 . As a result, a reverse voltage is applied between the p ⁻ type semiconductor region 11 and the n ⁺ type semiconductor region 12 and between the p ⁻ type semiconductor region 23 and the n type semiconductor region 24 . For example, the first element section 10 functions as an avalanche photodiode (APD).

A reverse voltage exceeding the breakdown voltage may be applied between the p ⁻ type semiconductor region 11 and the n ⁺ type semiconductor region 12. That is, the APD of the first element section 10 may operate in Geiger mode. By operating in Geiger mode, a pulse-like signal is output with a high multiplication factor (in other words, a high gain). Thereby, the light receiving sensitivity of the photodetector 1 can be improved. The first element section 10 can function as a single photon avalanche diode for detecting weak light.

A positive voltage is applied to the second pad 62 with respect to the first pad 61 . This makes it easier for avalanche breakdown to occur near the pn junction J2 of the second element section 20. In the photodetector 1, in order to suppress the occurrence of avalanche breakdown near the p-n junction J2, the difference between the p-type impurity concentration of the p ^- type semiconductor region 23 and the n-type impurity concentration of the third portion 24c is This is smaller than the difference between the p-type impurity concentration of the portion 11b and the n-type impurity concentration of the n ⁺ -type semiconductor region 12. As a result, even when the first element section 10 functions as an APD, occurrence of avalanche breakdown near the pn junction J2 can be suppressed.

The depletion layer DL2 due to the pn junction J2 spreads farther than the depletion layer DL1 due to the pn junction J1. For example, the depletion layer DL2 passes through the region below the insulating section 30 and extends to the bottom of the p ^- type semiconductor region 11. Some of the carriers generated in the first element section 10 flow to the n-type semiconductor region 24 through the depletion layer DL2. Due to the flow of carriers, a current i2 flows through the n ⁺ type semiconductor region 26 and the second wiring 42. Current i2 is taken out from second pad 62.

The third wiring 43 is electrically connected to the first wiring 41 via a protective resistor 45. When the photodetector 1 is not detecting light, the potential of the third wiring 43 is substantially the same as the potential of the first wiring 41. Voltages in opposite directions are applied between the n-type semiconductor region 24 and the p ⁺ -type semiconductor region 25.

When light L enters the p ^- type semiconductor region 23 or the n type semiconductor region 24 from above, the light L is absorbed and photoelectrically converted near the pn junction J2, and carriers are generated. The holes flow to the semiconductor layer 31. Electrons flow to pn junction J3 and n ⁺ type semiconductor region 26. Breakdown occurs near the pn junction J3 due to the electrons flowing near the pn junction J3. Electrons generated by breakdown flow to the n ⁺ type semiconductor region 26 and the second wiring 42 as a current i2. The holes flow into the third wiring 43 as a current i3. The current i3 flows to the first wiring 41 through the protective resistor 45. For example, the n-type semiconductor region 24 and the p ⁺ -type semiconductor region 25 function as a Zener diode or APD. Preferably, the diode including the n-type semiconductor region 24 and the p ⁺ -type semiconductor region 25 is an APD and operates in Geiger mode.

When the light L enters the first element section 10 and avalanche breakdown occurs in the first element section 10, a secondary photon SP is generated near the pn junction J1. The secondary photon SP passes through the insulating section 30 and is photoelectrically converted in the depletion layer extending from the pn junction J2 or the depletion layer extending from the pn junction J3, and electron-hole pairs are generated. Electrons generated in the depletion layer extending from the pn junction J2 move upward. Some of the electrons are injected into pn junction J3. Carriers generated or injected near the pn junction J3 cause avalanche breakdown near the pn junction J3.

Similarly, when light L enters the second element section 20 and avalanche breakdown occurs near the pn junction J3, secondary photons SP are generated near the pn junction J3. The secondary photon SP passes through the insulating section 30 and is photoelectrically converted in the depletion layer extending from the pn junction J1, thereby generating electron-hole pairs. Electrons move upward and are injected into pn junction J1. Carriers generated or injected near the pn junction J1 cause avalanche breakdown near the pn junction J1.

The quench section 40 is provided to suppress continuation of avalanche breakdown when avalanche breakdown occurs in the first element section 10 or the second element section 20. When avalanche breakdown occurs and current flows through the quench section 40, a voltage drop occurs depending on the electrical resistance of the quench section 40. The voltage drop reduces the potential difference across the APD and stops avalanche breakdown. As a result, the first element section 10 or the second element section 20 can respond quickly with a short time constant, and can detect the next light incident on the first element section 10 or the second element section 20.

Further, in order to protect the first wiring 41 and the third wiring 43, it is preferable that a protective resistor 45 is provided. If there is no protective resistor 45 or if the electrical resistance of the protective resistor 45 is not high enough, the current flowing through the first wiring 41 and the third wiring 43 will increase rapidly when avalanche breakdown occurs near the pn junction J3. do. Due to the sudden increase in current, LC resonance may occur due to the parasitic inductance and parasitic capacitance of the first wiring 41 or the third wiring 43.

FIG. 8 shows a circuit configuration including one first element section 10 and one second element section 20. The potential P0 of the semiconductor layer 31 (back electrode 32) is lower than the potential P1 of the common wiring 51 and lower than the potential P2 of the second wiring 42. Potential P1 is smaller than potential P2. Therefore, a diode D1 including a p ^- type semiconductor region 11 and an n ⁺ type semiconductor region 12, a diode D2 including a p ^- type semiconductor region 23 and an n type semiconductor region 24, and a diode D2 including an n type semiconductor region 24 and a p ⁺ type semiconductor region A voltage in the opposite direction is applied to each of the diodes D3 including the diode D25.

An electrical resistance R1 of a protective resistor 45 is inserted between the first wiring 41 and the third wiring 43. An electric resistance R2 of the quench section 40 is inserted between the first wiring 41 and the common wiring 51. Electrical resistance R2 is larger than electric resistance R1. The resistivity of the electrical resistance R2 may be the same as the resistivity of the electrical resistance R1.

One aspect of the advantage of the first embodiment will be explained.
As described above, in the photodetector 1, when avalanche breakdown occurs near the pn junction J1 of the first element section 10, the current i1 flows through the first wiring 41. When avalanche breakdown occurs near the pn junction J3 of the second element section 20, a current i3 flows through the third wiring 43. The current i1 is an electron current. Current i3 is a hole current. That is, the polarity of carriers flowing through the third wiring 43 is opposite to the polarity of carriers flowing through the first wiring 41. A portion of the holes flowing through the third wiring 43 are injected into the n ⁺ -type semiconductor region 12 undergoing avalanche breakdown. This suppresses the continuation of avalanche breakdown. The time required for avalanche surrender to stop after avalanche surrender occurs can be shortened. According to the embodiment, the time constant of the first element section 10 can be made shorter.

Another aspect of the advantages of embodiments will now be described.
When light L is incident on the first element section 10 and carriers are generated, the carriers in the depletion layer DL1 move along the electric field of the depletion layer DL1. For example, as shown in FIG. 7, the depletion layer DL1 does not reach the lower part of the p ^- type semiconductor region 11. When the second element section 20 is not provided, carriers generated under the p ^- type semiconductor region 11 move to the depletion layer DL1 over time, and then move along the electric field of the depletion layer DL1. Here, carriers discharged from the first element section 10 over such a long period of time are referred to as "delayed carriers." The delayed carriers cause breakdown at the pn junction J1 later than the timing at which the light L is incident. For example, when the photodetector 1 is used in a ranging device such as a lidar (Laser Imaging Detection and Ranging), the delay carrier increases the time fluctuation (jitter) of the pulse signal. An increase in jitter widens the dispersion of the distance histogram in optical time of flight (ToF) and degrades the accuracy of the measured distance.

Regarding this problem, in the photodetector 1 according to the embodiment, the second element section 20 includes a p ⁻ type semiconductor region 23 and an n type semiconductor region 24 . The pn junction J2 between the p ^- type semiconductor region 23 and the n type semiconductor region 24 is located below the pn junction J1 between the p ^- type semiconductor region 11 and the n ⁺ type semiconductor region 12. As shown in FIG. 7, the depletion layer DL2 extending from the pn junction J2 extends below the depletion layer DL1 extending from the pn junction J1. Therefore, delayed carriers generated under the p ^- type semiconductor region 11 move along the electric field of the depletion layer DL2 and are discharged through the second wiring 42. According to the embodiment, delayed carriers can be discharged more quickly. For example, jitter can be reduced and the accuracy of distance obtained in ToF can be improved.

Further aspects of the advantages of the embodiments will be described.
As described above, when the light L enters the second element section 20, a secondary photon SP is generated near the pn junction J3. The secondary photon SP passes through the insulating section 30 from the second element section 20 to the first element section 10 . Then, carriers are generated in the first element section 10 by the secondary photons SP. That is, according to the embodiment, light that has entered not only the first element section 10 but also the second element section 20 can be detected. According to the embodiment, the area of the region where light can be detected can be made larger, and the light detection efficiency of the photodetector 1 can be improved.

An example of the material of each element will be explained.
Each semiconductor region, such as the p ^- type semiconductor region 11, the n ⁺ type semiconductor region 12, the p ^- type semiconductor region 23, the n type semiconductor region 24, the p ⁺ type semiconductor region 25, and the n ⁺ type semiconductor region 26, is made of silicon, carbide, etc. It includes at least one semiconductor material selected from the group consisting of silicon, gallium arsenide, and gallium nitride. When these semiconductor regions contain silicon, phosphorus, arsenic, or antimony are used as n-type impurities. Boron or boron fluoride is used as the p-type impurity.

The p-type impurity concentration of each of the first portion 11a and the p ^- type semiconductor region 23 is higher than 1.0×10 ¹³ atoms/cm ³ and lower than 1.0×10 ¹⁶ atoms/cm ³ . The p-type impurity concentration of the second portion 11b is greater than 1.0×10 ¹⁶ atoms/cm ³ and less than 1.0×10 ¹⁸ atoms/cm ³ . The n-type impurity concentration of the third portion 24c is higher than 1.0×10 ¹⁶ atoms/cm ³ and lower than 1.0×10 ¹⁷ atoms/cm ³ . The n-type impurity concentration of the fourth portion 24d is greater than 1.0×10 ¹⁷ atom/cm ³ and less than 1.0×10 ¹⁸ atom/cm ³ . The p type impurity concentration of the p ⁺ type semiconductor region 25 is greater than 1.0×10 ¹⁹ atoms/cm ³ and less than 1.0×10 ²⁰ atoms/cm ³ . The n ^- type impurity concentration of each of the n + type semiconductor region 12 and the n ⁺ type semiconductor region 26 is larger than 1.0×10 ¹⁸ atom/cm ³ and smaller than 1.0×10 ¹⁹ atom/cm ³ .

The semiconductor layer 31 is, for example, at least a portion of a p-type semiconductor substrate. Semiconductor layer 31 includes the semiconductor material described above. The p-type impurity concentration of the semiconductor layer 31 is higher than 1.0×10 ¹⁷ atoms/cm ³ and lower than 1.0×10 ²¹ atoms/cm ³ .

The insulating portion 30 and the insulating layer 35 include an insulating material such as silicon oxide, silicon nitride, or silicon oxynitride. Quench section 40 and protection resistor 45 include polysilicon. The quench portion 40 and the protective resistor 45 may be doped with an n-type impurity or a p-type impurity.

Contact plugs 40a, 40b, 41a, 42a, 43a, 45a, and 45b contain a metal material. For example, the metal material is one or more selected from the group consisting of titanium, tungsten, copper, and aluminum. These contact plugs may include nitride or silicide of the metal material.

The first wiring 41, the second wiring 42, the third wiring 43, the common wiring 51, the first pad 61, and the second pad 62 include at least one selected from the group consisting of copper and aluminum.

FIGS. 9(a) to 21(b) are schematic diagrams illustrating the manufacturing process of the photodetector according to the embodiment.
9(a) to 21(a) respectively show the A1-A2 cross section of FIG. 9(b) to FIG. 21(b). An example of the manufacturing process of the photodetector according to the embodiment will be described with reference to FIGS. 9(a) to 21(b).

As shown in FIGS. 9A and 9B, a substrate including a silicon substrate 100a and a p-type silicon epitaxial layer 101 is prepared. The direction from the silicon substrate 100a toward the silicon epitaxial layer 101 corresponds to the Z direction. The silicon epitaxial layer 101 is formed by epitaxially growing silicon on the silicon substrate 100a. Silicon substrate 100a and silicon epitaxial layer 101 include single crystal p-type silicon doped with boron. The boron concentration in the silicon substrate 100a is 4.0×10 ¹⁸ cm ⁻³ . The boron concentration in the silicon epitaxial layer 101 is 1.0×10 ¹⁵ cm ⁻³ . The thickness of the silicon epitaxial layer 101 is 10 μm.

As shown in FIGS. 10(a) and 10(b), the surface of the silicon epitaxial layer 101 is oxidized to form a silicon oxide film 102 with a thickness of 100 nm. A 150 nm thick silicon nitride film 103 is deposited on the silicon oxide film 102 by low pressure thermal CVD. A silicon oxide film 1031 is deposited to a thickness of 1 μm on the silicon nitride film 103 by low pressure thermal CVD. A resist 105 defining an element isolation region 104 is formed by a lithography process. The silicon oxide film 1031, silicon nitride film 103, and silicon oxide film 102 are etched through the openings of the resist 105 by reactive ion etching (RIE). The width of the element isolation region 104 is 1.8 μm.

As shown in FIGS. 11(a) and 11(b), the resist 105 is peeled off. The silicon epitaxial layer 101 in the element isolation region 104 is etched using the silicon oxide film 1031 as a mask. As a result, the first trench 106 is formed. At this time, the depth of etching is determined by the thickness of the silicon epitaxial layer 101 and the amount of boron contained in the silicon substrate 100a diffused into the silicon epitaxial layer 101. The amount of diffusion is determined by taking into account the thermal steps throughout the process. The etching depth is, for example, 9 μm. When forming the first trench 106, it is preferable to have a taper angle of about 2 degrees. The taper angle is the inclination of the side surface of the first trench 106 with respect to the Z direction. This makes it possible to suppress the generation of voids during later embedding of the oxide film.

As shown in FIGS. 12(a) and 12(b), the surface of the first trench 106 is oxidized to form a silicon oxide film 1061 with a thickness of 50 nm. The implanted region 1062 may be formed at the bottom of the first trench 106 by performing ion implantation over the entire surface of the substrate. The implanted region 1062 is formed by ion implantation of boron at an implantation acceleration voltage of 40 keV, an implantation dose of 2.5×10 ¹² cm ⁻² , and an angle of 0 degrees with respect to the vertical direction of the substrate. At this time, if the angle is ±30 degrees, the implanted region 1062 is also formed on the bottom side surface of the first trench 106, as shown in FIG. 12(a). When forming the first trench 106 by RIE, crystal defects occur in the silicon epitaxial layer 101. By forming the implanted region 1062 on the bottom side surface of the first trench 106, noise components caused by defects can be suppressed.

As shown in FIGS. 13(a) and 13(b), an oxide film 1063 is deposited to a thickness of 1.2 μm by plasma chemical vapor deposition (CVD). Nitrogen annealing at 1000° C. is performed to densify the structure of the oxide film 1063. The oxide film 1063 was planarized by chemical mechanical polishing (CMP) using the silicon nitride film 103 as a stopper.

As shown in FIGS. 14(a) and 14(b), the silicon nitride film 103 is removed by hot phosphoric acid treatment. The silicon oxide film 102 is removed by hydrofluoric acid treatment. An n ^- type diode layer 109a is formed around the oxide film 1063. For example, the n ^- type diode layer 109a is formed by two ion implantations. First, phosphorus ions are implanted by setting an implantation acceleration voltage of 3 MeV and an implantation dose of 4.0×10 ¹² cm ⁻² . Next, phosphorus ions are implanted by setting an implantation acceleration voltage of 0.7 MeV and an implantation dose of 3.0×10 ¹² cm ⁻² . After implanting phosphorus, annealing is performed to activate the n ^- type diode layer 109a.

As shown in FIGS. 15(a) and 15(b), the surface of the silicon epitaxial layer 101 is oxidized to form a silicon oxide film 107 with a thickness of 50 nm. A polysilicon film with a thickness of 0.2 μm is formed by low pressure thermal CVD. The silicon oxide film 107 and the polysilicon film are processed into a predetermined shape by a lithography process and an RIE process to form a quench resistor 112a and a protection resistor 112b. In order to adjust the resistances of the quench resistor 112a and the protection resistor 112b, for example, 1.0×10 ¹⁵ cm ⁻² of boron is implanted at an implantation acceleration voltage of 20 keV, and activation annealing is performed.

As shown in FIGS. 16A and 16B, a p-type avalanche layer 113a is patterned in the element region 108 by a lithography process and an ion implantation process. In subsequent FIGS. 16(b) to 22(b), illustration of the silicon oxide film 107 is omitted. The p-type avalanche layer 113a is formed by boron ion implantation. The p-type avalanche layer 113a is formed so that the peak depth of boron is 0.8 μm and the peak concentration is 1.0×10 ¹⁷ cm ⁻³ . An n ^- type avalanche layer 109b and a p ⁺ -type avalanche layer 109c are formed on the surface of the n-type diode layer 109a. For example, the n-type avalanche layer 109b is formed by ion-implanting phosphorus at an implantation acceleration voltage of 600 keV and an implantation dose of 5.0×10 ¹² to 1.0×10 ¹⁴ cm ⁻² . By setting an implantation acceleration voltage of 70 keV and an implantation dose of 1.0×10 ¹⁵ cm ⁻² and implanting boron ions, a p ⁺ type avalanche layer 109c is formed. After the ion implantation, an annealing process is performed to activate the n-type avalanche layer 109b and the p ⁺ -type avalanche layer 109c.

As shown in FIGS. 17A and 17B, the n ⁺ type anode layer 109d and the n ⁺ type avalanche layer 113b are patterned by a lithography process and an ion implantation process. The n ⁺ type anode layer 109d is formed on the n type avalanche layer 109b and away from the p ⁺ type avalanche layer 109c. The n ⁺ type avalanche layer 113b is formed within the element region 108. The n ⁺ type anode layer 109d and the n ⁺ type avalanche layer 113b also serve as an ohmic electrode between the metal-containing wiring and the semiconductor region. The n ⁺ type anode layer 109d and the n ⁺ type avalanche layer 113b are formed by ion implantation of phosphorus. The n ⁺ type anode layer 109d and the n ⁺ type avalanche layer 113b are formed so that the peak of phosphorus is located on the surface of the substrate and the peak concentration is 1.5×20 cm ⁻³ . In order to activate the n ⁺ type anode layer 109d and the n ⁺ type avalanche layer 113b, annealing treatment is performed in an N2 atmosphere.

As shown in FIGS. 18(a) and 18(b), an insulating film 114 with a thickness of 0.5 um is formed by CVD.

As shown in FIGS. 19(a) and 19(b), an insulating film 118 with a thickness of 0.3 μm is formed by CVD. A plurality of contact holes 119 are formed in the insulating film 118, the insulating film 114, and the silicon oxide film 107 by a lithography process and an RIE process. Through the plurality of contact holes 119, a part of the p ⁺ type avalanche layer 109c, a part of the n ⁺ type anode layer 109d, a part of the quench resistor 112a, a part of the protection resistor 112b, and a part of the n ⁺ type avalanche layer 113b. is exposed. Note that illustration of the insulating film 118 is omitted in FIGS. 19(b) to 22(b).

As shown in FIGS. 20(a) and 20(b), a titanium film 120 and a titanium nitride film 121 are each formed to a thickness of 10 nm by sputtering. A tungsten film 122 is formed to a thickness of 0.3 μm using the CVD method. Using the insulating film 118 as a stopper, the tungsten film 122, titanium nitride film 121, and titanium film 120 were planarized by CMP, and the contact hole 119 was filled.

As shown in FIGS. 21(a) and 21(b), an aluminum layer 123 with a thickness of 0.5 um is formed by sputtering. The aluminum layer 123 is processed into a predetermined shape by a lithography process and an RIE process. As the passivation film 124, a silicon nitride film with a thickness of 0.3 μm is formed by CVD. An opening is formed in the passivation film 124 by RIE to expose the pad. The back surface of the silicon substrate 100a is polished until the thickness of the silicon substrate 100a becomes 600 μm. A Ti film and an Au film are formed as the back electrode 125. Through the above steps, the photodetector 1 according to the embodiment is manufactured.

The back electrode 125 manufactured by the manufacturing process described above corresponds to the back electrode 32 of the photodetector 1. The silicon substrate 100a corresponds to the semiconductor layer 31. A portion of the silicon epitaxial layer 101 corresponds to the first portion 11a and the p ⁻ type semiconductor region 23. The n ^- type diode layer 109a corresponds to the third portion 24c. The n-type avalanche layer 109b corresponds to the fourth portion 24d. The p ⁺ type avalanche layer 109c corresponds to the p ⁺ type semiconductor region 25. The n ⁺ type anode layer 109d corresponds to the n ⁺ type semiconductor region 26. The p-type avalanche layer 113a corresponds to the second portion 11b. The n ⁺ type avalanche layer 113b corresponds to the n ⁺ type semiconductor region 12. The silicon oxide film 1061 and the oxide film 1063 correspond to the insulating section 30. The insulating films 114 and 118 and the passivation film 124 correspond to the insulating layer 35. Quench resistor 112a corresponds to quench section 40. The protective resistor 112b corresponds to the protective resistor 45. The titanium film 120, the titanium nitride film 121, and the tungsten film 122 correspond to contact plugs. The aluminum layer 123 corresponds to the first wiring 41 , the second wiring 42 , the third wiring 43 , the common wiring 51 , the first pad 61 , or the second pad 62 .

22 and 23 are schematic plan views illustrating a part of the photodetector according to the embodiment.
For example, the insulating section 30 is a polygon with five or more sides when viewed from the Z direction. In the example shown in FIG. 22, the insulating section 30 has an octagonal shape when viewed from the Z direction. Specifically, the insulating section 30 includes a pair of first extending portions 30a extending along the X direction, a pair of second extending portions 30b extending along the Y direction, and a plurality of connecting portions 30c. The first element section 10 is provided between the pair of first extending portions 30a in the Y direction. The first element section 10 is provided between the pair of second extending portions 30b in the X direction. Each connecting portion 30c connects one end of the first extending portion 30a and one end of the second extending portion 30b.

The length of the first extending portion 30a in the X direction is longer than the length of the connecting portion 30c in the X direction. The length of the second extending portion 30b in the Y direction is longer than the length of the connecting portion 30c in the Y direction. For example, when viewed from the Z direction, the connecting portion 30c is linear. The angle θ1 between the first extending portion 30a and the connecting portion 30c is preferably 135 degrees or more. The angle θ2 between the second extending portion 30b and the connecting portion 30c is preferably 135 degrees or more.

It is preferable that the length L1 of the connecting portion 30c in the X direction and the length L2 of the connecting portion 30c in the Y direction are each 1 μm or more.

Alternatively, as shown in FIG. 23, the corners of the insulating section 30 may be curved when viewed from the Z direction. That is, the connecting portion 30c may be curved when viewed from the Z direction. In the example shown in FIG. 23, the insulating section 30 has a rectangular shape with rounded corners when viewed from the Z direction. For example, one end of the connecting portion 30c connected to the first extending portion 30a extends along the X direction. The other end of the connecting portion 30c connected to the second extending portion 30b extends in the Y direction. Thereby, the connecting portion 30c is smoothly connected to the first extending portion 30a and the second extending portion 30b.

FIG. 24 is a schematic plan view illustrating a part of a photodetector according to a reference example.
In the photodetector 1r according to the reference example shown in FIG. 24, the insulating parts 30 are provided in a grid pattern. Specifically, a portion of the insulating section 30 extends along the X direction. Another part of the insulating section 30 extends along the Y direction. The angle of the first element portion 10 is approximately 90 degrees near the intersection CP of the portion of the insulating portion 30 extending along the X direction and the portion extending along the Y direction. Due to the protrusion of the corners of the first element part 10, a larger stress is generated between the first element part 10 and the insulating part 30 near the intersection CP than in other parts.

As shown in FIG. 22, when the insulating part 30 is a polygon with five or more sides when viewed from the Z direction, the internal angles of the insulating part 30 can be made larger. For example, according to the structure shown in FIG. 22, the inner angle between the first extending portion 30a and the connecting portion 30c and the inner angle between the second extending portion 30b and the connecting portion 30c are set to 135. I can do it more than once. Alternatively, if the insulating section 30 is a polygon with rounded corners when viewed from the Z direction as shown in FIG. 23, the corners of the insulating section 30 can be curved. According to these structures, the stress applied between the first element section 10 and the insulating section 30 at the corner of the insulating section 30 can be alleviated. For example, by relaxing the stress, it is possible to suppress the occurrence of cracks in the first element section 10 and the insulating section 30. Malfunctions caused by cracks can be suppressed.

Furthermore, if a crack occurs in the silicon epitaxial layer 101, silicon oxide film 1061, or oxide film 1063 during the formation of the silicon oxide film 1061 and oxide film 1063 corresponding to the insulating part 30, the resist will crack in the subsequent photolithography process. There is a possibility of it getting into. If the resist enters the crack, a residual amount of resist will be generated within the crack when the resist is peeled off. Residual residues cause organic contamination of the oxidation furnace during subsequent oxidation and other thermal steps. By relaxing the stress on the silicon epitaxial layer 101, the silicon oxide film 1061, and the oxide film 1063, generation of cracks can be suppressed and the yield of the photodetector 1 can be improved.

Further, in the structure of the insulating portion 30 shown in FIG. 24, the dimension Di2 of the intersection portion CP in the diagonal direction is approximately 1.4 times the dimension Di1 of the intersection portion CP in the X direction or the Y direction. The diagonal direction is perpendicular to the Z direction and inclined with respect to the X and Y directions. In other words, when manufacturing the structure shown in FIG. 24, in the step corresponding to FIG. 12, in the portion where the intersection portion CP is formed, the dimension in the diagonal direction of the first trench 106 is equal to the dimension Di1 in the X direction or the Y direction. This is approximately 1.4 times as large. Due to this dimensional difference, when the oxide film 1063 is formed in the first trench 106, the first trench 106 is not completely filled in at the intersection CP, and voids are generated in the oxide film 1063. Similar to cracks, voids cause resist to enter the voids and resist residuals in the voids. According to the structures shown in FIGS. 22 and 23, it is possible to avoid a local increase in the dimensions of the first trench 106, and to suppress the generation of voids.

In the examples shown in FIGS. 22 and 23, the lengths of the connecting portion 30c in the X direction and the Y direction are preferably 1 μm or more. Thereby, the stress generated in the vicinity of the connecting portion 30c can be effectively alleviated.

Here, an example has been described in which the insulating section 30 includes a pair of first extending portions 30a, a pair of second extending portions 30b, and a plurality of connecting portions 30c. The insulating portion 30 may include at least one first extending portion 30a, one second extending portion 30b, and one connecting portion 30c that are connected to each other. Thereby, stress near the region where one first extending portion 30a, one second extending portion 30b, and one connecting portion 30c are provided can be alleviated.

(First Modification)
Fig. 25 is a schematic plan view showing a part of a photodetector according to a first modified example of the embodiment, and Fig. 26 is a cross-sectional view taken along line A1-A2 of Fig. 25.
25 and 26 , the photodetector 1a according to the first modified example further includes a lens 55 compared to the photodetector 1. The lens 55 is provided on the insulating layer 35 and is located above the first element portions 10. One lens 55 is provided corresponding to one first element portion 10. No lens is provided corresponding to the second element portion 20.

The upper surface of the lens 55 is curved in a convex shape. The lens 55 collects light toward the first element section 10. For example, the width of the lens 55 is wider than the width of the first element section 10. The width is the length in the X direction or the Y direction. A portion of the lens 55 may be located above the second element section 20. Lens 55 includes a light-transmissive inorganic or organic material.

Providing the lens 55 makes it easier for light to enter the first element section 10. Thereby, the light detection efficiency of the photodetector 1a can be improved.

(Second modification)
FIG. 27 is a schematic plan view showing a part of a photodetector according to a second modification of the embodiment.
A photodetector 1b according to the second modification shown in FIG. 27 includes a larger lens 55 than the photodetector 1a. A portion of the lens 55 is located above the second element section 20, above the second wiring 42, etc. As illustrated, adjacent lenses 55 may be in contact with each other in the X direction or the Y direction, or may partially overlap.

(Third modification)
FIG. 28 is a schematic cross-sectional view showing a part of a photodetector according to a third modification of the embodiment.
The photodetector 1c according to the third modified example shown in FIG. 28 further includes a light shielding film 56 compared to the photodetector 1a. The light shielding film 56 is provided on the insulating layer 35 and located above the second element section 20. The light shielding film 56 reflects or absorbs light. The light transmittance of the light shielding film 56 is lower than that of the insulating layer 35, the lens 55, and the like.

For example, the light shielding film 56 includes an infrared light cutting material (IR absorbent) and does not substantially transmit infrared light. Lens 55 transmits infrared light.

(Fourth modification)
FIG. 29 is a schematic cross-sectional view showing a part of a photodetector according to a fourth modification of the embodiment.
The photodetector 1d according to the fourth modification shown in FIG. 29 further includes a metal part 33 compared to the photodetector 1a. The metal part 33 is provided inside the insulating part 30. The insulating section 30 is located between the first element section 10 and the metal section 33 and between the second element section 20 and the metal section 33. The metal part 33 is electrically isolated from the first element part 10 and the second element part 20.

The metal part 33 reflects or absorbs light. The light transmittance of the metal part 33 is lower than that of the insulating part 30. Therefore, secondary photons generated in one of the first element part 10 and the second element part 20 can be suppressed from traveling to the other of the first element part 10 and the second element part 20.

(Fifth modification)
FIG. 30 is a schematic plan view showing a part of a photodetector according to a fifth modification of the embodiment.
A photodetector 1e according to the fifth modification shown in FIG. 30 differs from the photodetector 1 in the configurations of the first element section 10, the second element section 20, and the insulating section 30.

In the photodetector 1e, the first element section 10 and the second element section 20 are arranged alternately in the X direction and the Y direction. One insulating section 30 is provided around each first element section 10 and around each second element section 20. The area of one second element section 20 in the photodetector 1e is larger than the area of one second element section 20 in the photodetector 1.

Regarding the quench section 40, the first wiring 41, the second wiring 42, the third wiring 43, the protective resistor 45, the common wiring 51, the first pad 61, and the second pad 62 in the photodetector 1e, These components are similarly provided. The A1-A2 sectional view in FIG. 30 is the same as that in FIG. 6.

Similar to the photodetector 1, in the photodetector 1e according to the fifth modification, the polarity of the carriers flowing through the third wiring 43 is opposite to the polarity of the carriers flowing through the first wiring 41. Therefore, the time from when avalanche breakdown occurs in the first element section 10 to when avalanche breakdown stops can be shortened.

Delayed carriers generated in the lower part of the p ^- type semiconductor region 11 move along the electric field of the depletion layer generated in the second element section 20 and are discharged through the second wiring 42 . According to the fifth modification, the jitter of the photodetector 1e can be reduced. According to the fifth modification, the area of the region where light can be detected can be made larger, and the light detection efficiency of the photodetector 1e can be improved.

Alternatively, as shown in FIG. 30, a light shielding film 56 may be provided above the second element section 20. A lens 55 may be provided above the first element section 10.

FIG. 31 is a schematic diagram showing a photodetection system according to an embodiment.
The photodetection system 2 according to the embodiment includes a photodetector 1, a first counter 71, a second counter 72, a synchronization circuit 73, a determiner 74, and an output terminal 75. The first counter 71 is electrically connected to the first pad 61. The second counter 72 is electrically connected to the second pad 62. The synchronization circuit 73 is electrically connected to the first counter 71 and the second counter 72.

The first counter 71 counts the output signal from the first wiring 41. When avalanche breakdown occurs in the first element section 10, a current pulse flows through the first wiring 41. The first counter 71 counts these current pulses.

The second counter 72 counts the output signal from the second wiring 42. When avalanche breakdown occurs in the second element section 20, a current pulse flows through the second wiring 42. The second counter 72 counts these current pulses.

The synchronization circuit 73 is electrically connected to the first counter 71 and the second counter 72. The synchronization circuit 73 is an AND circuit, and outputs the presence or absence (AND) of simultaneous pulse outputs of the outputs of the first counter 71 and the second counter 72. The determiner 74 reads the output signal from the first pad 61 and calculates the amount of light incident on the photodetector 1 based on the output signal. Further, the determiner 74 receives the result of the count by the first counter 71 and the result of the count by the second counter 72.

The determiner 74 determines whether crosstalk has occurred in the photodetector 1 based on the count result by the first counter 71 and the count result by the second counter 72. Crosstalk is a phenomenon in which a secondary photon SP generated in one element section enters another element section, causing avalanche breakdown. When crosstalk occurs, the amount of light detected by the photodetector 1 becomes larger than the actual amount of light.

Specifically, if the first counter 71 counts the output signal and the second counter 72 does not count the output signal, the determiner 74 determines that crosstalk is not occurring. When the first counter 71 counts the output signal and the second counter 72 counts the output signal, the determiner 74 determines that crosstalk has occurred. If it is determined that crosstalk has occurred, the determiner 74 corrects the readout amount of light. For example, the determiner 74 reduces the readout amount of light by half. Alternatively, if it is determined that crosstalk has occurred, the readout result of the current pulse at that time may be ignored. For example, a more accurate light amount can be obtained by creating a histogram for calculating the light amount while ignoring the readout result when crosstalk occurs.

The synchronization circuit 73 and the determiner 74 are incorporated into the control circuit CC, for example. The synchronization circuit 73 and the determiner 74 may be provided separately. Instead of photodetector 1, any one of photodetectors 1a to 1e may be provided.

When the occurrence of crosstalk is determined, the photodetector 1b, the photodetector 1d, or the photodetector 1e provided with the light shielding film 56 is suitable. In these photodetectors, the incidence of light into the second element section 20 is suppressed. Therefore, the occurrence of crosstalk can be determined more accurately based on the results of counting by the first counter 71 and the second counter 72.

When the photodetector 1d is provided instead of the photodetector 1, the current pulse read out by the second pad 62 may be ignored. For example, the optical detection system 2 is used in a lidar. A laser beam is irradiated onto the object to be measured, and the photodetector 1d detects the reflected light. At this time, in addition to the reflected light of the laser beam, sunlight and the like are incident on the photodetector 1d. Generally, reflected light of the laser beam travels along the Z direction toward the photodetector 1d. The reflected light is focused toward the first element section 10 by the lens 55. On the other hand, background noise such as sunlight is incident on the photodetector 1d in a random direction. Therefore, the light that has passed through the lens 55 can enter the second element section 20.

When the metal part 33 is provided, the occurrence of crosstalk between the first element part 10 and the second element part 20 can be suppressed. Therefore, the current pulse read out by the first pad 61 can be considered to be caused by the laser beam, and the current pulse read out by the second pad 62 can be considered to be caused by background noise.

FIG. 32 is a table showing conditions and results of determination by the determiner.
In the table 200 shown in FIG. 32, the first output 201 indicates the output from the first counter 71. Second output 202 indicates the output from second counter 72. For the first output 201 and the second output 202, "0" indicates that no current pulses were counted. A "1" indicates that current pulses were counted. The third output 203 indicates the output from the synchronization circuit 73, and is the AND of the first output 201 and the second output 202. A determination result 204 indicates a determination result by the determiner 74.

The determination result 204a is mainly caused by background light (noise) that enters the photodetector 1d from random directions. The determination result 204b is mainly caused by light entering the photodetector 1d from a shallow angle. This light is mainly noise. A shallow angle refers to an inclination of less than 45 degrees with respect to the XY plane. The determination result 204c is mainly caused by the reflected light of the laser beam. The determination result 204d is a state in which no incident light is detected.

Here, the signal corresponding to the determination result 204a is assumed to be S1. The signal corresponding to the determination result 204b is assumed to be S2. The signal corresponding to the determination result 204c is assumed to be S3. The signal corresponding to the determination result 204d is assumed to be S4. When the reflected light of the laser beam and the background noise cannot be distinguished, the PDE is expressed by the following equation (1).
PDE=(S1+S3)/(S1+S2+S3+S4)...(1)

If the reflected light of the laser beam and the background noise can be distinguished, the readout result from the second pad 62 can be ignored. In this case, PDE is expressed by the following equation (2).
PDE=S3/(S3+S4)...(2)

As can be seen from the comparison between Equation (1) and Equation (2), the noise component can be excluded from the denominator that is the basis of PDE. As a result, PDE can be increased.

FIG. 33 is a schematic diagram illustrating an active quench circuit.
In the photodetector 1 or 1a according to the embodiment described above, a resistor that causes a large voltage drop is provided as the quench section 40. In the photodetector, a control circuit and a switching element may be provided in place of the resistor. That is, an active quench circuit for cutting off the current is provided as the quench section 40.

The active quench circuit includes a control circuit CC and a switching array SWA, as shown in FIG. 33. The control circuit CC includes a comparator, a control logic section, and the like. Switching array SWA includes a plurality of switching elements SW. For example, at least some of the circuit elements included in the control circuit CC and the switching element SW may be provided on the semiconductor layer 31 or may be provided on a circuit board different from the semiconductor layer 31.

As shown in FIG. 33, one switching element SW may be provided for one first element section 10, or one switching element SW may be provided for a plurality of first element sections 10. . For example, one switching element SW is provided between one n ⁺ type semiconductor region 12 and the common wiring 51. Alternatively, the common wiring 51 may be provided with a switching element SW.

FIG. 34 is a schematic diagram illustrating a lidar device according to an embodiment.
This embodiment is configured with a line light source and a lens, and can be applied to a long-distance object detection system (LIDAR). The lidar device 5001 includes a light projecting unit T that projects a laser beam onto an object 411, and a light projecting unit T that receives the laser beam from the object 411, measures the time it takes for the laser beam to travel back and forth to the object 411, and calculates the distance. A light receiving unit R (also referred to as a light detection system) is provided.

In the light projection unit T, the light source 404 emits light. For example, the light source 404 includes a laser beam oscillator and oscillates a laser beam. A drive circuit 403 drives a laser beam oscillator. The optical system 405 extracts a portion of the laser beam as a reference beam and irradiates the other laser beam onto the object 411 via a mirror 406. Mirror controller 402 controls mirror 406 to project laser light onto target object 411 . Here, projecting light means applying light.

In the light receiving unit R, a reference light photodetector 409 detects the reference light extracted by the optical system 405. Photodetector 410 receives reflected light from target object 411 . The distance measurement circuit 408 measures the distance to the object 411 based on the reference light detected by the reference light photodetector 409 and the reflected light detected by the photodetector 410. The image recognition system 407 recognizes the object 411 based on the result measured by the distance measurement circuit 408.

The lidar device 5001 employs a time-of-flight (ToF) method that measures the time it takes for a laser beam to travel back and forth to the object 411 and converts it into a distance. The lidar device 5001 is applied to in-vehicle drive-assist systems, remote sensing, and the like. When the photodetector of the embodiment described above is used as the photodetector 410, particularly good sensitivity is exhibited in the near-infrared region. Therefore, the lidar device 5001 can be applied as a light source for a wavelength band that is invisible to humans. The lidar device 5001 can be used, for example, to detect obstacles for moving objects.

FIG. 35 is a diagram for explaining detection of a detection target by the lidar device.
Light source 3000 emits light 412 to object 600 to be detected. A photodetector 3001 detects light 413 that is transmitted, reflected, or diffused by the object 600.

For the photodetector 3001, for example, if the photodetector according to the present embodiment described above is used, highly sensitive detection can be realized. Note that it is preferable to provide a plurality of sets of photodetectors 410 and light sources 404, and set the arrangement relationship in advance in software (a circuit can also be substituted). It is preferable that the sets of photodetectors 410 and light sources 404 are arranged at regular intervals, for example. Thereby, by complementing the output signals of each photodetector 410, an accurate three-dimensional image can be generated.

FIG. 36 is a schematic top view of a moving body equipped with a lidar device according to an embodiment.
In the example of FIG. 36, the moving object is a car. The vehicle 700 according to this embodiment includes lidar devices 5001 at four corners of the vehicle body 710. The vehicle according to this embodiment is equipped with lidar devices at four corners of the vehicle body, so that the lidar device can detect the environment in all directions of the vehicle.

In addition to the car shown in FIG. 36, the moving object may be a drone, a robot, or the like. The robot is, for example, an automated guided vehicle (AGV). By providing lidar devices at the four corners of these moving bodies, the environment in all directions of the moving body can be detected by the lidar devices.

Embodiments may include the following configurations.
(Configuration 1)
a first element portion including a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type provided on the first semiconductor region;
A second element portion aligned with the first element portion in a second direction perpendicular to the first direction from the first semiconductor region to the second semiconductor region,
a third semiconductor region of a first conductivity type;
a fourth semiconductor region of a second conductivity type provided on the third semiconductor region;
a fifth semiconductor region of a first conductivity type provided on the fourth semiconductor region;
the second element section including;
an insulating section provided between the first element section and the second element section;
a first wiring electrically connected to the second semiconductor region;
a second wiring electrically connected to the fourth semiconductor region;
a third wiring electrically connected to the fifth semiconductor region and electrically connected to the first wiring;
, a photodetector.
(Configuration 2)
The photodetector according to configuration 1, wherein the pn junction between the third semiconductor region and the fourth semiconductor region is located below the pn junction between the first semiconductor region and the second semiconductor region.
(Configuration 3)
The impurity concentration of the second conductivity type in the fourth semiconductor region is higher than the impurity concentration of the first conductivity type in the third semiconductor region,
The photodetector according to configuration 1 or 2, wherein the impurity concentration of the fourth semiconductor region is lower than the impurity concentration of the first conductivity type of the fifth semiconductor region.
(Configuration 4)
4. The photodetector according to any one of configurations 1 to 3, wherein the impurity concentration of the second conductivity type in the third semiconductor region is lower than the impurity concentration of the second conductivity type in the fifth semiconductor region.
(Configuration 5)
The plurality of first element parts are arranged along the second direction and a third direction intersecting a plane along the first direction and the second direction,
The plurality of insulating parts are respectively provided around the plurality of first element parts,
The third semiconductor region, the fourth semiconductor region, and the fifth semiconductor region have any one of configurations 1 to 4, wherein the third semiconductor region, the fourth semiconductor region, and the fifth semiconductor region are provided between the insulating parts adjacent to each other in the second direction or the third direction. The photodetector according to one.
(Configuration 6)
Each includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type provided on the first semiconductor region, and extends in a second direction and a third direction intersecting each other. a plurality of first element portions arranged at first intervals along the
a plurality of insulating parts each provided around the plurality of first element parts;
A second element portion provided between the insulating portions adjacent in the second direction or the third direction,
a third semiconductor region of a first conductivity type;
a fourth semiconductor region of a second conductivity type provided on the third semiconductor region;
a fifth semiconductor region of a first conductivity type provided on the fourth semiconductor region;
the second element section including;
, a photodetector.
(Configuration 7)
a common wiring electrically connected to the plurality of second semiconductor regions;
a second wiring electrically connected to the plurality of fourth semiconductor regions;
a first electrode electrically connected to the common wiring;
a second electrode electrically connected to the second wiring;
The photodetector according to configuration 5 or 6, further comprising:
(Configuration 8)
The photodetector according to configuration 5 or 6, wherein the third semiconductor region and the fourth semiconductor region are in contact with each of the adjacent insulating parts.
(Configuration 9)
9. The photodetector according to any one of configurations 1 to 8, wherein the fourth semiconductor region and the fifth semiconductor region configure a Zener diode or an avalanche photodiode.
(Configuration 10)
further comprising a quench section electrically connected to the first wiring,
the first wiring is electrically connected between the quench section and the third wiring,
6. The photodetector according to any one of configurations 1 to 5, wherein the first semiconductor region and the second semiconductor region configure an avalanche photodiode.
(Configuration 11)
11. The photodetector according to configuration 10, wherein the avalanche photodiode operates in Geiger mode.
(Configuration 12)
The photodetector according to configuration 10 or 11, further comprising a resistor electrically connected between the first wiring and the third wiring.
(Configuration 13)
The quench section includes a quench resistor,
13. The photodetector according to configuration 12, wherein the electrical resistance of the resistor is smaller than the electrical resistance of the quench resistor.
(Configuration 14)
14. The photodetector according to any one of configurations 1 to 13, wherein the insulating section is optically transparent.
(Configuration 15)
15. The photodetector according to any one of configurations 1 to 14, further comprising a light reflecting member provided in the insulating section.
(Configuration 16)
The photodetector according to any one of configurations 1 to 15,
a first counter that counts output signals from the first wiring;
a second counter that counts output signals from the second wiring;
a synchronization circuit that is electrically connected to the first counter and the second counter and synchronizes the operation of the first counter and the operation of the second counter;
Optical detection system with.
(Configuration 17)
The photodetector according to any one of configurations 1 to 15,
a distance measuring circuit that calculates the flight time of light from the output signal of the photodetector;
Optical detection system with.
(Configuration 18)
a light source that irradiates light onto an object;
The light detection system according to configuration 16 or 17, which detects light reflected by the object;
A lidar device equipped with
(Configuration 19)
19. The lidar device according to configuration 18, further comprising an image recognition system that generates a three-dimensional image based on the arrangement relationship between the light source and the photodetector.
(Configuration 20)
20. A mobile body comprising the lidar device according to configuration 18 or 19.

According to each of the embodiments described above, a photodetector, a photodetection system, a lidar device, or a moving object that can shorten the time constant, reduce jitter, or improve photodetection efficiency is provided.

In addition, in this specification, "perpendicular" and "parallel" are not only strictly perpendicular and strictly parallel, but also include variations in the manufacturing process, for example, and include substantially perpendicular and substantially parallel. Good.

The embodiments of the present invention have been described above with reference to specific examples. However, embodiments of the present invention are not limited to these specific examples. For example, a person skilled in the art can appropriately select the specific configuration of each element, such as the first magnetic section, reading section, writing section, first electrode, and second electrode, included in the magnetic memory element from a known range. As long as the present invention can be carried out in the same manner and similar effects can be obtained, the invention is included within the scope of the present invention.

Further, a combination of any two or more elements of each specific example to the extent technically possible is also included within the scope of the present invention as long as it encompasses the gist of the present invention.

In addition, all other magnetic memory elements and magnetic memories that can be implemented with appropriate design changes by those skilled in the art based on the magnetic memory elements and magnetic memories described above as embodiments of the present invention also encompass the gist of the present invention. within the scope of the present invention.

In addition, it is understood that various changes and modifications can be made by those skilled in the art within the scope of the idea of the present invention, and these changes and modifications also fall within the scope of the present invention. .

Although several embodiments of the invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included within the scope and gist of the invention, as well as within the scope of the invention described in the claims and its equivalents.

1, 1a to 1e, 1r: photodetector, 2: photodetection system, 10: first element portion, 11: p ⁻ type semiconductor region, 11a: first portion, 11b: second portion, 12: n ⁺ type semiconductor region, 20: second element portion, 23: p ⁻ type semiconductor region, 24: n type semiconductor region, 24c: third portion, 24d: fourth portion, 25: p ⁺ type semiconductor region, 26: n ⁺ type Semiconductor region, 30: Insulating part, 30a: First extending part, 30b: Second extending part, 30c: Connecting part, 31: Semiconductor layer, 32: Back electrode, 33: Metal part, 35: Insulating layer, 40 : Quench part, 40a, 40b: Contact plug, 41: First wiring, 41a: Contact plug, 42: Second wiring, 42a: Contact plug, 43: Third wiring, 43a: Contact plug, 45: Protective resistor, 45a , 45b: Contact plug, 51: Common wiring, 55: Lens, 56: Light shielding film, 61: First pad, 62: Second pad, 71: First counter, 72: Second counter, 73: Synchronous circuit, 74 : Determiner, 75: Output terminal, 100a: Silicon substrate, 101: Silicon epi layer, 102: Silicon oxide film, 103: Silicon nitride film, 1031: Silicon oxide film, 104: Element isolation region, 105: Resist, 106: First trench, 1061: silicon oxide film, 1062: implanted region, 1063: oxide film, 107: silicon oxide film, 108: element region, 109a: n ^- type diode layer, 109b: n-type avalanche layer, 109c: p ⁺ type avalanche layer, 109d: n ⁺ type anode layer, 112a: quench resistance, 112b: protection resistor, 113a: p type avalanche layer, 113b: n ⁺ type avalanche layer, 114: insulating film, 115: titanium film, 118: Insulating film, 119: Contact hole, 120: Titanium film, 121: Titanium nitride film, 122: Tungsten film, 123: Aluminum layer, 124: Passivation film, 125: Back electrode, 200: Table, 201: First output, 202 : Second output, 203: Third output, 204, 204a to 204d: Judgment result, 402: Mirror controller, 403: Drive circuit, 404: Light source, 405: Optical system, 406: Mirror, 407: Image recognition system, 408 : Distance measurement circuit, 409: Reference light photodetector, 410: Photodetector, 411: Target object, 412: Light, 413: Light, 600: Object, 700: Vehicle, 710: Vehicle body, 3000: Light source, 3001 : photodetector, 5001: lidar device, CC: control circuit, CP: intersection, D1 to D3: diode, DL1, DL2: depletion layer, Di1, Di2: dimensions, J1 to J3: pn junction, L: light, P0 to P2: potential, R: light receiving unit, R1, R2: electrical resistance, SP: secondary photon, SW: switching element, SWA: switching array, T: light emitting unit, i1 to i3: current, θ1, θ2: angle

Claims (20)

a first element portion including a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type provided on the first semiconductor region;
A second element portion aligned with the first element portion in a second direction perpendicular to the first direction from the first semiconductor region to the second semiconductor region,
a third semiconductor region of a first conductivity type;
a fourth semiconductor region of a second conductivity type provided on the third semiconductor region;
a fifth semiconductor region of a first conductivity type provided on the fourth semiconductor region;
the second element section including;
an insulating section provided between the first element section and the second element section;
a first wiring electrically connected to the second semiconductor region;
a second wiring electrically connected to the fourth semiconductor region;
a third wiring electrically connected to the fifth semiconductor region and electrically connected to the first wiring;
, a photodetector. 2. The photodetector according to claim 1, wherein a pn junction between the third semiconductor region and the fourth semiconductor region is located below a pn junction between the first semiconductor region and the second semiconductor region. The impurity concentration of the second conductivity type in the fourth semiconductor region is higher than the impurity concentration of the first conductivity type in the third semiconductor region,
2. The photodetector according to claim 1, wherein the impurity concentration in the fourth semiconductor region is lower than the impurity concentration of the first conductivity type in the fifth semiconductor region. 4. The photodetector according to claim 1, wherein the impurity concentration of the second conductivity type in the third semiconductor region is lower than the impurity concentration of the second conductivity type in the fifth semiconductor region. The plurality of first element parts are arranged along the second direction and a third direction intersecting a plane along the first direction and the second direction,
The plurality of insulating parts are respectively provided around the plurality of first element parts,
The photodetector according to claim 1, wherein the third semiconductor region, the fourth semiconductor region, and the fifth semiconductor region are provided between the insulating parts adjacent to each other in the second direction or the third direction. vessel. Each includes a first semiconductor region of a first conductivity type and a second semiconductor region of a second conductivity type provided on the first semiconductor region, and extends in a second direction and a third direction intersecting each other. a plurality of first element portions arranged at first intervals along the
a plurality of insulating parts each provided around the plurality of first element parts;
A second element portion provided between the insulating portions adjacent in the second direction or the third direction,
a third semiconductor region of a first conductivity type;
a fourth semiconductor region of a second conductivity type provided on the third semiconductor region;
a fifth semiconductor region of a first conductivity type provided on the fourth semiconductor region;
the second element section including;
, a photodetector. a common wiring electrically connected to the plurality of second semiconductor regions;
a second wiring electrically connected to the plurality of fourth semiconductor regions;
a first electrode electrically connected to the common wiring;
a second electrode electrically connected to the second wiring;
The photodetector according to claim 6, further comprising: The photodetector according to claim 5 or 6, wherein the third semiconductor region and the fourth semiconductor region are in contact with each of the adjacent insulating parts. The photodetector according to claim 1 or 6, wherein the fourth semiconductor region and the fifth semiconductor region constitute a Zener diode or an avalanche photodiode. further comprising a quench section electrically connected to the first wiring,
the first wiring is electrically connected between the quench section and the third wiring,
The photodetector according to claim 1, wherein the first semiconductor region and the second semiconductor region constitute an avalanche photodiode. 11. The photodetector of claim 10, wherein the avalanche photodiode operates in Geiger mode. The photodetector according to claim 10, further comprising a resistor electrically connected between the first wiring and the third wiring. The quench section includes a quench resistor,
The photodetector according to claim 12, wherein the electrical resistance of the resistor is smaller than the electrical resistance of the quench resistor. The photodetector according to any one of claims 1 to 3, 5, and 6, wherein the insulating section is optically transparent. The photodetector according to claim 14, further comprising a light reflecting member provided in the insulating section. A photodetector according to any one of claims 1 to 3 and 5,
a first counter that counts output signals from the first wiring;
a second counter that counts output signals from the second wiring;
a synchronization circuit that is electrically connected to the first counter and the second counter and synchronizes the operation of the first counter and the operation of the second counter;
Optical detection system with. A photodetector according to any one of claims 1 to 3 and 5,
a distance measuring circuit that calculates the flight time of light from the output signal of the photodetector;
Optical detection system with. a light source that irradiates light onto an object;
The light detection system according to claim 16, which detects light reflected by the object;
A lidar device equipped with The lidar device according to claim 18, further comprising an image recognition system that generates a three-dimensional image based on the arrangement relationship between the light source and the photodetector. A moving body comprising the lidar device according to claim 18.

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