JP2024030445A - Rfid tag and method for manufacturing substrate for rfid tag - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an RFID tag that can increase an electromagnetic field coupling power and can be reduced in size, and a method for manufacturing a substrate for an RFID tag by which multiple substrates for an RFID tag can be taken from one large-sized substrate without waste.

SOLUTION: The positional relationship between a spiral coil 7 provided on a substrate 3 and a substrate in a pentagonal or more polygonal shape is determined, so that a corner part 3a at 90 degrees of the substrate 3 is located outside one side 7d of the spiral coil 7. A through-hole part 13 electrically connecting a circuit on a rear face of the substrate 3 and a coil pattern on a front face of the substrate 3 is provided between the spiral coil 7 and the corner part 3a at 90 degrees of the substrate 3.

SELECTED DRAWING: Figure 1

COPYRIGHT: (C)2024,JPO&INPIT

Description

The present invention relates to an RFID (Radio Frequency Identification) tag that can transmit and receive information in a non-contact manner, and a method for manufacturing an RFID tag substrate.

Japanese Patent No. 4697332 discloses a first antenna formed of a conductive material on a substrate, a wireless IC chip that is electrically connected to the first antenna and processes transmitted and received signals, and a wireless IC chip formed by bending a metal wire. A conventional wireless IC device (RFID tag) is disclosed, which includes a second antenna formed by the antenna and coupled to the first antenna via an electromagnetic field. The typical first antenna in a conventional RFID tag is a spiral coil with a rectangular outline, and the second antenna has a U-shaped part located outside the first antenna and a U-shaped part located outside the first antenna. It has two linear parts extending from the shaped part.

Patent No. 4697332

In a conventional RFID tag, in order to make the second antenna easier to manufacture and increase the number of turns in the electromagnetic field coupling part, the electromagnetic field coupling part of the second antenna should be formed into a circular loop part with one or more turns. It is desirable that Further, when a second antenna having such a shape is used, and a first antenna having a spiral coil having a rectangular outline as in the conventional antenna is used, a problem arises in that the electromagnetic field coupling force becomes weak. Furthermore, if the first antenna is a spiral coil with a rectangular outline, if you try to provide a through hole for connecting the circuit on the back side of the board and the first antenna, you will have to increase the size of the board. This results in an obstacle to miniaturization.

An object of the present invention is to strengthen the electromagnetic coupling force of an RFID tag equipped with a second antenna having at least one turn or more of an annular loop portion coupled to a first antenna via an electromagnetic field. An object of the present invention is to provide an RFID tag that can be made smaller.

Another object of the present invention is to provide a method for manufacturing an RFID tag substrate that can efficiently produce a large number of RFID tag substrates from one large substrate.

The present invention includes a first antenna formed of a conductive material on the surface of a substrate, a wireless IC chip that is electrically connected to the first antenna and processes transmitted and received signals, and a wireless IC chip formed by bending a metal wire. The present invention is directed to an RFID tag equipped with a second antenna having at least one turn or more of an annular loop portion that is connected to the first antenna via an electromagnetic field.

The first antenna consists of a spiral coil that faces the inner space of the annular loop portion of the second antenna or is located within the inner space and extends along the annular loop portion. Further, the substrate is a polygonal substrate having a pentagonal shape or more including one 90-degree corner.

A through-hole portion for electrically connecting the circuit on the back side of the polygonal board having a pentagonal shape or more and the spiral coil is provided between the spiral coil and a 90 degree corner of the polygonal board having a pentagonal shape or more. There is.

If the through-hole section is installed between the spiral coil and the 90-degree corner of a pentagonal or larger polygonal board in this way, there is no need to increase the size of the board, so it is possible to downsize the board. can be achieved. Moreover, since the installation position space of the through-hole portion can be secured, the spiral coil can be formed large and the electromagnetic field coupling force can be strengthened. Note that the through-hole portion has a structure in which a conductive portion for connection is formed inside the through-hole.

The shape of the spiral coil may be circular, but it may be a polygonal spiral of pentagon or more that faces the inner space of the annular loop portion of the second antenna or is located within the inner space and extends along the annular loop portion. It may also be formed from a coil. In this case, the corner of the polygonal spiral coil of pentagonal or larger shape and the polygonal shape of pentagonal or larger polygonal shape are arranged so that the 90 degree corner is located outside one side of the spiral coil of polygonal shape of pentagonal or larger shape. The positional relationship of the substrates is determined. Furthermore, a through-hole portion that electrically connects the circuit on the back side of the polygonal board having a pentagonal shape or more and the polygonal spiral coil having a pentagonal shape or more is connected to one side of the polygonal spiral coil having a pentagonal shape or more. It is provided between the 90 degree corner of the above polygonal substrate. Note that the circuit on the back surface may be a spiral coil that forms the first antenna in cooperation with a polygonal spiral coil of pentagon or more provided on the front surface of the substrate.

In this way, if the through-hole section is installed between the pentagonal or larger polygonal spiral coil and the 90-degree corner of the pentagonal or larger polygonal board, there is no need to increase the size of the board. Therefore, the size of the substrate can be reduced. Moreover, since the installation position space of the through-hole portion can be secured, the polygonal spiral coil can be formed in a large size, and the electromagnetic field coupling force can be strengthened.

Note that the polygonal substrate having a pentagonal shape or more is preferably hexagonal or heptagonal for ease of design. Further, when the polygonal spiral coil having a pentagonal shape or more is an octagonal spiral coil, the polygonal substrate having a pentagonal shape or more can be a heptagonal polygonal substrate.

When manufacturing a hexagonal polygonal substrate including one 90 degree corner for use in an RFID tag from a single multi-piece substrate, the following procedure is performed. In order to facilitate understanding, the reference numerals used in the drawings are also used in the following description.

A plurality of parallel vertical cut lines VC extending in the vertical direction, a plurality of parallel horizontal cut lines LC extending in the horizontal direction and orthogonal to the plurality of parallel vertical cut lines VC, and a plurality of parallel horizontal cut lines LC extending in the diagonal direction are formed on a multi-piece substrate. a plurality of first diagonal parallel cut lines TC1 that intersect the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC; The multi-piece substrate is cut so as to draw a cut line LC and a plurality of second diagonally parallel cut lines TC2 that intersect with the plurality of first diagonally parallel cut lines TC1. In this case, the plurality of parallel vertical cut lines VC are lined up at equal intervals, and the plurality of parallel horizontal cut lines LC are lined up at equal intervals. and a position that bisects the portion of the plurality of parallel vertical cut lines VC located between the n-th (n is an integer greater than or equal to 1) parallel horizontal cut line LC and the n+1-th parallel horizontal cut line LC, and the n+2-th parallel horizontal cut line LC. A virtual point P1 is determined at a position that bisects a portion of a plurality of parallel vertical cut lines VC located between the parallel horizontal cut line LC and the (n+3)th parallel horizontal cut line LC. The plurality of first diagonally parallel cut lines TC1 pass through every other virtual point P1 arranged in the horizontal direction, and the plurality of second diagonally parallel cut lines TC2 pass through the virtual points P1 arranged in the horizontal direction, respectively. shall pass through. If a multi-piece substrate is cut by dicing, for example, along the cut lines as described above, a hexagonal polygonal substrate with one corner at 90 degrees can be manufactured with a high yield. Note that an adhesive sheet is pasted on one side of the multi-chip board, and a cut is made from the other side of the multi-chip board by dicing. If the depth is set so that it does not cut, the cut pieces will not fall apart.

Further, in the case of manufacturing a seven-sided polygonal substrate including one 90-degree corner for use in an RFID tag from one multi-piece substrate, the following procedure is performed. In order to facilitate understanding, the reference numerals used in the drawings are also used in the following description.

A plurality of parallel vertical cut lines VC extending in the vertical direction, a plurality of parallel horizontal cut lines LC extending in the horizontal direction and perpendicular to the plurality of parallel vertical cut lines VC, and a plurality of parallel horizontal cut lines LC extending in the diagonal direction with respect to the multi-piece substrate. A plurality of first diagonal parallel cut lines TC1 extend and intersect the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC; The multi-piece substrate is cut so as to draw a horizontal cut line LC and a plurality of second diagonally parallel cut lines TC2 intersecting with the plurality of first diagonally parallel cut lines TC1. The plurality of parallel vertical cut lines VC are lined up at equal intervals L, the plurality of parallel horizontal cut lines LC are lined up at equal intervals L, and the intersection of the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC is is defined as the intersection (P2, P2'). Then, the n-th (n is an odd number of 1 or more) first diagonally parallel cut line TC1 and the n+1-th first diagonally parallel cut line TC1 are arranged between every other intersection point P2 in the horizontal direction. It intersects the parallel vertical line VC at a position L/(2+2 ^1/2 ) apart in both vertical directions. Further, the n-th first diagonally parallel cut line TC1 and the n+1-th first diagonally parallel cut line TC1 are arranged in both horizontal directions by L/( 2+2 ^1/2 ) Intersect the parallel horizontal cut line LC at a distant position. Further, the second diagonally parallel cut line TC2 intersects the n+1th first diagonally parallel cut line TC1 and the parallel longitudinal line VC from the remaining every other intersection P2' adjacent to every other intersection P2. A parallel longitudinal line VC is formed at a position L/(2+2 ^1/2 ) away from the direction in which the point is located and the direction in which the n+2 first diagonally parallel cut line TC1 and the parallel horizontal cut line LC intersect. and intersect with the parallel horizontal cut line LC. If a multi-piece substrate is cut by dicing, for example, along the cut lines as described above, it is possible to manufacture a heptagonal polygonal substrate with one corner of 90 degrees at a high yield.

Further, in the case of manufacturing a seven-sided polygonal substrate including one 90-degree corner used in an RFID tag from one multi-piece substrate, the following may be used. In order to facilitate understanding, the reference numerals used in the drawings are also used in the following description. In this case, a plurality of parallel vertical cut lines VC extending in the vertical direction and a plurality of parallel horizontal cut lines LC extending in the horizontal direction and orthogonal to the plurality of parallel vertical cut lines VC are formed on the multi-piece substrate. , a plurality of first diagonal parallel cut lines TC1 extending in a diagonal direction and intersecting a plurality of parallel vertical cut lines VC and a plurality of parallel horizontal cut lines LC, a plurality of parallel vertical cut lines VC extending in a diagonal direction, The substrate for multi-piece production is cut so as to draw parallel horizontal cut lines LC and a plurality of second diagonally parallel cut lines TC2 that intersect with the plurality of first diagonally parallel cut lines TC1.

The plurality of parallel vertical cut lines VC are the n+1th parallel vertical cut line when the interval dimension between the nth (n is an odd number of 1 or more) parallel vertical cut line and the n+1th parallel vertical cut line VC1 is L. It is assumed that the interval dimension between VC1 and the n+2-th parallel vertical cut line VC2 is 2 ^1/2 L/(2+2 ^1/2 ). The plurality of parallel horizontal cut lines LC are the m+1th parallel horizontal cut line LC, where L is the interval between the mth (m is an odd number of 1 or more) parallel horizontal cut line LC1 and the m+1th parallel horizontal cut line LC2. It is assumed that the distance between the cut line LC2 and the m+2-th parallel horizontal cut line LC3 is 2 ^1/2 L/(2+2 ^1/2 ). Furthermore, the centers of the regions R located between the n+1st parallel vertical cutline VC1 and the n+2nd parallel vertical cutline VC2 and between the mth parallel horizontal cutline LC1 and the m+1th parallel horizontal cutline LC2 are respectively When the virtual center point P3 is determined, it is assumed that the plurality of first diagonally parallel cut lines TC1 each pass through every other center point P3 lined up in the horizontal direction. Further, it is assumed that the plurality of second diagonally parallel cut lines TC2 each pass through a plurality of center points P3 lined up in the horizontal direction. Even if a cut line is drawn in this manner, if a multi-piece substrate is cut by dicing, for example, a heptagonal polygonal substrate with one corner at 90 degrees can be manufactured with a high yield.

FIG. 1 is a plan view of an RFID tag according to an embodiment of the present invention. 2 is a cross-sectional view of the RFID tag of FIG. 1. FIG. FIG. 2 is a schematic diagram showing an example of cut lines used to cut a multi-piece substrate when manufacturing a heptagonal polygonal substrate of the RFID tag of FIG. 1. FIG. FIG. 7 is a schematic diagram showing another example of cut lines for cutting a multi-piece substrate for manufacturing a heptagonal polygonal substrate. It is a schematic diagram which shows the example of the cut line which cuts the multi-piece board|substrate for manufacturing a hexagonal polygonal board|substrate.

Embodiments of the RFID tag of the present invention will be described in detail below with reference to the drawings. FIG. 1 is a plan view of an RFID tag according to an embodiment of the present invention, and FIG. 2 is a schematic cross-sectional view of the RFID tag 1 of FIG. 1. The RFID tag 1 of this embodiment includes a substrate 3, an antenna coil 5, a spiral coil 7, a wireless IC chip 9, and a case 11 made of resin or ceramic.

The substrate 3 is made of, for example, a woven glass fabric made of glass fibers impregnated with epoxy resin, and is made of an FR4 substrate, which is a material that is both flame retardant and has low conductivity. As shown in FIG. 1, the substrate 3 of this embodiment has a heptagonal shape with one corner 3a having an angle of 90 degrees. Specifically, the substrate 3 of this embodiment includes a pair of linear first sides 3b forming a 90-degree corner 3a and a linear pair connecting the pair of first sides 3b. It has a heptagonal shape with five second sides 3c. In this embodiment, the pair of first sides 3b have the same length. Further, in this embodiment, the five second sides 3c have the same length. In particular, in this embodiment, the six corners 3d other than the 90 degree corner 3a have the same angle of 135 degrees. In this embodiment, the substrate 3 is fixed to the inner bottom surface of the case 11 with an insulating adhesive. Although not shown, the inside of the case 11 is filled with an epoxy filler. The case 11 has a recess 11A in the center in which the board 3 is accommodated, and a peripheral wall 11B surrounding the recess 11A.

The antenna coil 5 is formed by bending a metal wire, and has an annular loop portion 5a having one turn or more and a pair of straight portions 5b and 5c connected to the annular loop portion 5a. In this embodiment, the antenna coil 5 constitutes the second antenna of the present invention. In this embodiment, the antenna coil 5 is formed by bending stainless steel wire. The pair of linear parts 5b and 5c are fitted into grooves 11C and 11D formed in the peripheral wall part 11B of the case 11, and extend to the outside of the case 11. The annular loop portion 5a is magnetically coupled to the spiral coil 7 via an electromagnetic field. The antenna coil 5 of this embodiment is arranged in the case 11 so that the inner space of the annular loop portion 5a faces the spiral coil 7 on the substrate 3, or the spiral coil 7 is located in the inner space. ing.

On the surface 3e of the substrate 3, a coil pattern of an octagonal polygonal spiral coil 7 is formed. In this embodiment, substantially octagonal spiral coils 7 are formed on the front surface 3e and the back surface of the substrate. Further, a coil pattern (not shown) is provided on the back surface of the substrate 3, and the spiral coil on the front surface 3e and the spiral coil on the back surface are connected via a through-hole portion 13. In this embodiment, the spiral coil 7 constitutes the first antenna of the present invention. The spiral coil 7 is formed by printing copper foil or conductive paste on the substrate 3. A wireless IC chip 9 is electrically connected to the spiral coil 7. The wireless IC chip 9 includes a clock circuit, a logic circuit, a memory circuit, etc., and processes transmitted and received signals of a predetermined frequency based on information stored by these circuits.

The spiral coil 7 is located within the internal space of the annular loop portion 5a of the antenna coil 5, and extends along the annular loop portion 5a. The spiral coil 7 of this embodiment includes six corners 7a and five first linear sides 7b extending linearly between the two corners 7a. Further, in the spiral coil 7 of this embodiment, the positions of the six corners 7a are bent so as to correspond to the positions of the six corners 3d of the substrate 3. Therefore, in the spiral coil 7 of this embodiment, the five first linear sides 7b extend along the five second sides 3c of the substrate. Further, the spiral coil 7 of this embodiment has a pair of second linear sides 7c extending from the two corners 7a along the pair of first sides 3b of the substrate 3, and a second linear side. 7c and one deformed side 7d. In the present embodiment, the corner of the polygonal spiral coil and the polygonal board of pentagon or more are arranged so that the 90 degree corner 3a of the board 3 is located outside one side 7d of the spiral coil 7. The positional relationship is determined. A through-hole portion 13 that electrically connects the coil pattern on the back side of the substrate 3 and the coil pattern on the front side of the substrate is provided between one side 7d of the spiral coil 7 and the 90-degree corner 3a of the substrate 3. It is provided. In this embodiment, the circuit provided on the back surface of the substrate 3 is a spiral coil that cooperates with the spiral coil 7 on the front surface of the substrate 3 to configure the first antenna. The through hole portion 13 has a structure in which a conductive portion for connection is formed inside a through hole that penetrates the substrate. This conductive portion may be formed from a conductive paste or may be formed by plating.

If the through-hole portion 13 is provided between the spiral coil 7 and the 90-degree corner 3a of the substrate 3 in this way, the through-hole portion 13 will not interfere with the spiral coil 7, and there will be no need to increase the size of the substrate. Therefore, the size of the board can be reduced. Moreover, since the installation position space of the through-hole portion 13 can be secured, the polygonal spiral coil can be formed large and the electromagnetic coupling force can be strengthened.

In the above embodiment, the pair of first sides 3b of the substrate 3 have the same length. However, the pair of first sides may have different lengths. Similarly, in this embodiment, the five second sides 3c of the substrate 3 have the same length, but the second sides may have different lengths. Furthermore, in this embodiment, the six corners 3d other than the 90-degree corner 3a have the same size, but the six corners 3d may have angles of different sizes.

In this embodiment, as described above, a spiral coil similar to that on the front surface 3e is formed on the back surface of the substrate 3, but the coil pattern formed on the back surface may have a different pattern from the front surface 3e. Of course it's good.

In this embodiment, the spiral coil 7 includes a pair of sides 7c extending on the front surface 3e of the substrate 3 along the pair of first sides 3b of the substrate 3, and a deformed one connecting the pair of sides 7c. Although the deformed side 7d is deformed along the through-hole portion 13, it does not have to be along the through-hole portion.

In the embodiment described above, the spiral coil 7 is formed from a polygonal spiral coil having a pentagonal shape or more, but it goes without saying that the spiral coil 7 may be circular.

Next, a method for manufacturing the RFID tag of this embodiment will be described. First, the substrate 3 is produced by cutting a multi-chip substrate on which a plurality of circuit patterns including coil patterns and through-hole portions are formed on the front and back surfaces. Next, the board 3 on which the IC 9 is mounted is fixed to the inner bottom surface of the resin case 11 using an insulating adhesive. Of course, the IC 9 may be mounted after the cut board 3 is fixed to the inner bottom surface of the case 11 with an adhesive.

Next, the antenna coil 5 processed to have an annular loop portion is installed in the case 11, and resin is injected into the recess 11A in the case 11 so that the annular loop portion is fixed to the inner surface of the case 11. do.

FIG. 3 is a schematic diagram showing cut lines for cutting the multi-piece substrate SB for manufacturing the polygonal substrate 3 of this embodiment. In this manufacturing method, first, a plurality of parallel vertical cut lines VC extending in the vertical direction and arranged at equal intervals L, and a plurality of parallel vertical cuts extending in the horizontal direction and arranged at equal intervals L are first formed on the multi-piece substrate SB. A plurality of parallel horizontal cut lines LC orthogonal to the line VC are defined. Note that the vertical direction and horizontal direction here refer to the vertical direction and horizontal direction on the paper surface of FIG. 3, and in the case of actual manufacturing, the vertical direction and horizontal direction will be aligned with the vertical direction and horizontal direction of dicing. .

In this example, the plurality of parallel vertical cut lines VC are lined up at equal intervals L, and the plurality of parallel horizontal cut lines LC are lined up at equal intervals L. Next, a plurality of first diagonally parallel cut lines TC1 are defined that extend in a diagonal direction and intersect with the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC. Furthermore, a plurality of second diagonally parallel cut lines TC2 are defined that extend in the diagonal direction and intersect with the plurality of parallel vertical cut lines VC, the plurality of parallel horizontal cut lines LC, and the plurality of first diagonally parallel cut lines TC1. At this time, the intersections of the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC are defined as intersection points P2 and P2', and the n-th (n is an odd number of 1 or more) first diagonally parallel cut line TC1 and the (n+1)th first diagonally parallel cut line TC1 are parallel to each other at positions X=L/(2+2 ^1/2 ) apart in both the vertical direction with the intersection point P2 of every other horizontal line in between. It intersects with the vertical line VC. In addition, the n-th first diagonally parallel cut line TC1 and the n+1-th first diagonally parallel cut line TC1 are arranged in both horizontal directions at X=L with every other horizontally lined intersection P2 in between. A first diagonal parallel cut line TC1 is defined so as to intersect the parallel horizontal cut line LC at a position separated by /(2+2 ^1/2 ).

Further, the second diagonally parallel cut line TC2 intersects with the n+1th first diagonally parallel cut line TC1 and the parallel vertical line VC from the remaining every other intersection P2' adjacent to every other intersection P2. Parallel vertically at positions X=L/(2+2 ^1/2 ) apart from the direction in which the point is located and the direction in which the n+2 first diagonally parallel cut line TC1 and the parallel horizontal cut line LC intersect. A second diagonally parallel cut line TC2 is defined so as to intersect the direction line VC and the parallel horizontal cut line LC.

By cutting the multi-piece substrate SB by dicing, for example, using the cut lines defined in this manner, it is possible to manufacture a heptagonal polygonal substrate with one corner at 90 degrees with a high yield. Note that an adhesive sheet is pasted on one side of the multi-chip board, and a cut is made from the other side of the multi-chip board by dicing. If the depth is set so that it does not cut, the cut pieces will not fall apart.

FIG. 4 is a schematic diagram showing another example of cut lines for cutting a multi-piece substrate for producing heptagonal substrates of different shapes. In this manufacturing method, first, a plurality of parallel vertical cut lines VC extending in the vertical direction and a plurality of parallel horizontal cut lines orthogonal to the plurality of parallel vertical cut lines VC extending in the horizontal direction are formed on the multi-piece substrate SB. A cut line LC is determined.

At this time, the plurality of parallel vertical cut lines VC are defined as the n+1th parallel vertical cut line, where L is the interval between the nth (n is an odd number of 1 or more) parallel vertical cut line and the n+1th parallel vertical cut line VC1. A plurality of parallel vertical cut lines VC are determined so that the interval dimension X between the vertical cut line VC1 and the (n+2)th parallel vertical cut line VC2 is 2 ^1/2 L/(2+2 ^1/2 ). In addition, the plurality of parallel horizontal cut lines LC are defined as the m+1th parallel horizontal cut line LC, where L is the interval dimension between the mth (m is an odd number of 1 or more) parallel horizontal cut line LC1 and the m+1th parallel horizontal cut line LC2. A plurality of parallel horizontal cut lines LC are determined so that the interval dimension X between the horizontal cut line LC2 and the m+2th parallel horizontal cut line LC3 is 2 ^1/2 L/(2+2 ^1/2 ).

and a plurality of first diagonal parallel cut lines TC1 extending in a diagonal direction and intersecting the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC, and a plurality of parallel vertical cut lines VC extending in a diagonal direction, A plurality of parallel horizontal cut lines LC and a plurality of second diagonally parallel cut lines TC2 that intersect with the plurality of first diagonally parallel cut lines TC1 are defined.

At this time, at the center of the region R located between the n+1st parallel vertical cut line VC1 and the n+2th parallel vertical cut line VC2 and between the mth parallel horizontal cut line LC1 and the m+1th parallel horizontal cut line LC2. Each virtual center point P3 is determined. Then, a plurality of first diagonally parallel cut lines TC1 are defined so that each of the first diagonally parallel cut lines TC1 passes through every other center point P3 lined up in the horizontal direction. Further, a plurality of second diagonally parallel cut lines TC2 are defined so that each of the second diagonally parallel cut lines TC2 passes through a plurality of center points P3 lined up in the horizontal direction.

By cutting the multi-piece substrate SB along the cut line thus determined, it is possible to increase the number of heptagonal substrates that can be manufactured from one multi-piece substrate SB.

The substrate does not need to be heptagonal as long as it has a polygonal shape of pentagon or more. For example, the substrate can be hexagonal in shape. FIG. 5 is a schematic diagram showing an example of a cut line for cutting a multi-piece substrate for manufacturing a hexagonal substrate. In this manufacturing method, first, a plurality of parallel vertical cut lines VC extending in the vertical direction and arranged at equal intervals are formed on the multi-piece substrate SB, and a plurality of parallel vertical cut lines VC extending in the horizontal direction and arranged at equal intervals. A plurality of parallel horizontal cut lines LC perpendicular to the cut lines LC are defined.

Next, a plurality of first diagonally parallel cut lines TC1 are defined that extend in a diagonal direction and intersect with the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC.

Furthermore, a plurality of second diagonally parallel cut lines TC2 are defined that extend in the diagonal direction and intersect with the plurality of parallel vertical cut lines VC, the plurality of parallel horizontal cut lines LC, and the plurality of first diagonally parallel cut lines TC1.

In this case, the plurality of parallel vertical cut lines VC are lined up at equal intervals, and the plurality of parallel horizontal cut lines LC are lined up at equal intervals. At this time, a virtual point is placed at a position that bisects the portion of the plurality of parallel vertical cut lines VC located between the nth (n is an integer of 1 or more) parallel horizontal cut line LC and the n+1th parallel horizontal cut line LC. Define P1. Similarly, a virtual point P1 is determined at a position that bisects the portion of the plurality of parallel vertical cut lines VC located between the n+2-th parallel horizontal cut line LC and the n+3-th parallel horizontal cut line LC.

The plurality of first diagonally parallel cut lines TC1 are defined so as to pass through every other virtual point P1 arranged in the horizontal direction. Further, the plurality of second diagonally parallel cut lines TC2 are each defined to pass through the virtual points P1 arranged in the horizontal direction.

If a multi-piece substrate is cut by dicing, for example, along the cut lines as described above, a hexagonal polygonal substrate with one corner at 90 degrees can be manufactured with a high yield.

Each of the above examples assumes a plurality of parallel vertical cut lines VC extending in the vertical direction and lined up at equal intervals L, and a plurality of parallel vertical cut lines VC extending in the horizontal direction and lined up at equal intervals L. Although a polygonal substrate is formed in the substrate forming area, it is of course possible to form a polygonal substrate using a substrate forming area other than square.

According to the present invention, the electromagnetic field coupling force of an RFID tag equipped with a second antenna having at least one turn or more of an annular loop portion coupled to a first antenna via an electromagnetic field is strengthened; It is possible to provide an RFID tag that can be made smaller.

Further, according to the present invention, it is possible to provide a method for manufacturing an RFID tag substrate that can efficiently produce a large number of RFID tag substrates from one large substrate.

1 RFID tag 3 Substrate 3a 90 degree corner 3b First side 3c Second side 3d Corner 3e Surface 5 Antenna coil 5a Annular loop portion 7 Spiral coil 9 Wireless IC chip 11 Case 13 Through-hole portion

Claims (6)

a first antenna formed of a conductive material on the surface of the substrate;
a wireless IC chip that is electrically connected to the first antenna and processes transmitted and received signals;
An RFID tag comprising a second antenna formed by bending a metal wire and having an annular loop portion of at least one turn that is coupled to the first antenna via an electromagnetic field,
The first antenna is made of a spiral coil that faces the inner space of the annular loop portion of the second antenna or is located within the inner space and extends along the annular loop portion,
The substrate is a polygonal substrate of pentagon or more including one 90 degree corner,
A through-hole portion for electrically connecting the circuit on the back surface of the polygonal board having a pentagonal shape or more and the spiral coil is between the spiral coil and the 90 degree corner of the polygonal board having a pentagonal shape or more. An RFID tag characterized by being provided in. The RFID tag according to claim 1, wherein the polygonal substrate having a pentagonal shape or more is hexagonal or heptagonal. The spiral coil is composed of a polygonal spiral coil of pentagon or more,
A corner of the pentagon or more polygonal spiral coil and a pentagon or more polygonal substrate such that the 90 degree corner is located outside one side of the pentagon or more polygonal spiral coil. The positional relationship of
A through-hole portion for electrically connecting the circuit on the back surface of the polygonal board having a pentagonal shape or more and the polygonal spiral coil having a pentagonal shape or more is located on one side of the polygonal spiral coil having a pentagonal shape or more. 2. The RFID tag according to claim 1, wherein the RFID tag is provided between the 90-degree corner of the pentagonal or larger polygonal substrate. For multi-chip substrates,
a plurality of parallel vertical cut lines VC extending in the vertical direction;
a plurality of parallel horizontal cut lines LC extending in the horizontal direction and orthogonal to the plurality of parallel vertical cut lines VC;
a plurality of first diagonally parallel cut lines TC1 extending in a diagonal direction and intersecting the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC;
A plurality of second diagonal parallel cut lines TC2 extending in a diagonal direction and intersecting the plurality of parallel longitudinal cut lines VC, the plurality of parallel horizontal cut lines LC, and the plurality of first diagonal parallel cut lines TC1, 2. A method for manufacturing a polygonal substrate used in the RFID tag according to claim 1 by cutting the multi-piece substrate in a pattern,
The plurality of parallel vertical cut lines VC are arranged at equal intervals L,
The plurality of parallel horizontal cut lines LC are arranged at equal intervals L,
A position that bisects a portion of the plurality of parallel vertical cut lines VC located between the n-th (n is an integer of 1 or more) parallel horizontal cut line LC and the n+1-th parallel horizontal cut line LC, and A virtual point P1 is determined at a position that bisects a portion of the plurality of parallel vertical cut lines VC located between the n+2-th parallel horizontal cut line LC and the n+3-th parallel horizontal cut line LC,
The plurality of first diagonally parallel cut lines TC1 each pass through every other plurality of virtual points P1 arranged in the horizontal direction,
The method for manufacturing an RFID tag substrate, wherein each of the plurality of second diagonally parallel cut lines TC2 passes through the virtual points P1 arranged in the horizontal direction. For multi-cavity substrates,
a plurality of parallel vertical cut lines VC extending in the vertical direction;
a plurality of parallel horizontal cut lines LC extending in the horizontal direction and orthogonal to the plurality of parallel vertical cut lines VC;
a plurality of first diagonally parallel cut lines TC1 extending in a diagonal direction and intersecting the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC;
A plurality of second diagonally parallel cut lines TC2 extending in a diagonal direction and intersecting the plurality of parallel longitudinal cut lines VC, the plurality of parallel horizontal cut lines LC, and the plurality of first diagonal parallel cut lines TC1, A method for manufacturing a polygonal substrate for use in the RFID tag according to claim 1, by cutting the multi-piece substrate in a pattern,
The plurality of parallel vertical cut lines VC are arranged at equal intervals L,
The plurality of parallel horizontal cut lines LC are arranged at equal intervals L,
The intersection of the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC is defined as an intersection point (P2, P2'),
The n-th (n is an odd number of 1 or more) first diagonally parallel cut line TC1 and the n+1-th first diagonally parallel cut line TC1 each sandwich every other intersection point P2 arranged in the horizontal direction between them. intersects the parallel vertical cut line VC at a position L/(2+2 ^1/2 ) apart in both the vertical directions,
The n-th first diagonally parallel cut line TC1 and the n+1-th first diagonally parallel cut line TC1 are arranged in both directions in the lateral direction, with the every other intersection point P2 lined up in the lateral direction in between. intersects the parallel horizontal cut line LC at a position L/(2+2 ^1/2 ) away from
The second diagonally parallel cut line TC2 is connected to the (n+1)th first diagonally parallel cut line TC1 and the parallel vertical cut line VC from the remaining every other intersection point P2' adjacent to the every other intersection point P2. At a position L/(2+2 ^1/2 ) apart from the direction in which the point where the n+2 first diagonal parallel cut line TC1 intersects with the parallel horizontal cut line LC is located, respectively. A method for manufacturing an RFID tag substrate, characterized in that the parallel vertical cut lines VC intersect with the parallel horizontal cut lines LC. For multi-cavity substrates,
a plurality of parallel vertical cut lines VC extending in the vertical direction;
a plurality of parallel horizontal cut lines LC extending in the horizontal direction and orthogonal to the plurality of parallel vertical cut lines VC;
a plurality of first diagonally parallel cut lines TC1 extending in a diagonal direction and intersecting the plurality of parallel vertical cut lines VC and the plurality of parallel horizontal cut lines LC;
A plurality of second diagonally parallel cut lines TC2 extending in a diagonal direction and intersecting the plurality of parallel longitudinal cut lines VC, the plurality of parallel horizontal cut lines LC, and the plurality of first diagonal parallel cut lines TC1, A method for manufacturing a polygonal substrate for use in the RFID tag according to claim 1, by cutting the multi-piece substrate in a pattern,
The plurality of parallel vertical cut lines VC are the n+1-th parallel vertical cut lines, where L is the interval between the n-th (n is an odd number of 1 or more) parallel vertical cut lines and the n+1-th parallel vertical cut line VC1. The distance between the cut line VC1 and the n+2th parallel vertical cut line VC2 is 2 ^1/2 L/(2+2 ^1/2 ),
The plurality of parallel horizontal cut lines LC are the m+1-th parallel cut line LC, where L is the interval between the m-th (m is an odd number of 1 or more) parallel horizontal cut line LC1 and the m+1-th parallel horizontal cut line LC2. The interval dimension between the horizontal cut line LC2 and the m+2th parallel horizontal cut line LC3 is 2 ^1/2 L/(2 + 2 ^1/2 ),
The center of a region R located between the n+1st parallel vertical cutline VC1 and the n+2nd parallel vertical cutline VC2 and between the mth parallel horizontal cutline LC1 and the m+1st parallel horizontal cutline LC2. When a virtual center point P3 is determined for each,
The plurality of first diagonally parallel cut lines TC1 each pass through every other center point P3 lined up in the horizontal direction,
The method for manufacturing an RFID tag substrate, wherein the plurality of second diagonally parallel cut lines TC2 each pass through the plurality of center points P3 arranged in the horizontal direction.

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