JP2024019841A - semiconductor module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor module capable of setting a plurality of resistance values with one gate resistor.

SOLUTION: A semiconductor module 10a according to the invention includes a semiconductor chip 2 having a gate electrode 7, a gate control terminal 6 for supplying a gate signal to the gate electrode 7, and a gate resistor 8 connected between the gate electrode 7 and the gate control terminal 6. The gate resistor 8 includes a chip resistor 3, and a plurality of electrodes 4a, 4b, 4c provided on the surface of the chip resistor 3. When the gate electrode 7 or the gate control terminal 6 and one of the plurality of electrodes 4a, 4b, 4c are connected, different resistance values are observed among each of the electrodes.

SELECTED DRAWING: Figure 1

COPYRIGHT: (C)2024,JPO&INPIT

Description

The present invention relates to a semiconductor module.

Power semiconductor devices often include semiconductor elements as switching elements. For example, a gate electrode such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar Transistor) A semiconductor element having the following is used. In particular, semiconductor devices for large capacity (High Power) often have switching elements connected in parallel to each other.

In a semiconductor device, a positive feedback circuit is formed from the parasitic capacitance and stray inductance of semiconductor elements, and as a result, parasitic oscillation may occur, and this parasitic oscillation tends to become more serious in proportion to the number of parallel semiconductor elements. Therefore, a gate resistor is often provided to suppress this parasitic oscillation.

Patent Document 1 is an example of a semiconductor module provided with a gate resistor. Patent Document 1 discloses that a damping adjustment element 140 is provided and electrically connected between the MOSFET 120 and the driver circuit 130, and the output of the driver circuit 130 is adjusted by appropriately adjusting the resistance value of the gate resistance Rg of the damping adjustment element 140. A switching module 100 is disclosed that controls the attenuation rate of a damping voltage (return voltage) Vgs1 with respect to voltage. By changing the thickness H1 and width W1 of the metal member 142 constituting the damping adjustment element 140, the gate of the damping adjustment element 140 is It is disclosed that the resistance Rg can be adjusted. Furthermore, by connecting a gate inductance Lg and a gate capacitor Cg to the gate resistor Rg, changing the inductance value by adjusting the number of turns of the gate inductance Lg, and changing the area and spacing of the electrode plates that constitute the gate capacitor Cg. A configuration is disclosed in which the resonance frequency of the connection circuit is adjusted by changing the capacitance value to suppress series resonance in the RLC series circuit constituted by the connection circuit from the driver circuit 130 to the MOSFET 120. According to Patent Document 1, it is possible to suppress the occurrence of malfunctions due to damping voltages that occur when changing specifications of a switching module, such as replacing a MOSFET or changing the operating frequency.

Japanese Patent Application Publication No. 2021-064889

However, in Patent Document 1, in order to change the gate resistance Rg constituting the damping adjustment element 140, it is necessary to newly prepare a metal member 142 with a different thickness H1 and width W1. In other words, if the gate resistance value changes due to a change in the specifications of the semiconductor module, such as replacing a MOSFET or changing the operating frequency, a new gate resistor that is different from the gate resistor that was previously used must be prepared. It had to be replaced, which posed an issue in terms of cost.

In view of the above circumstances, the present invention provides a semiconductor module in which a plurality of resistance values can be set using one gate resistor.

One embodiment of the present invention for solving the above problems includes a semiconductor chip having a gate electrode, a gate control terminal that supplies a gate signal to the gate electrode, and a gate resistor connected between the gate electrode and the gate control terminal. In the semiconductor module, the gate resistor has a chip resistor and a plurality of electrodes provided on the surface of the chip resistor, and when the gate electrode or gate control terminal is connected to one of the plurality of electrodes. The semiconductor module is characterized in that each electrode exhibits a different resistance value.

More specific configurations of the present invention are described in the claims.

According to the present invention, it is possible to provide a semiconductor module in which a plurality of resistance values can be set using one gate resistor. This allows the gate resistance value to be changed without replacing the gate resistor, making it easy to change specifications.

Problems, configurations, and effects other than those described above will be made clear by the following description of the embodiments.

A top view schematically showing the semiconductor module of Example 1 A perspective view enlarging part A in Figure 1 A perspective view schematically showing a semiconductor module of Example 2. A perspective view schematically showing a semiconductor module of Example 3

FIG. 1 is a top view schematically showing the semiconductor module of Example 1. As shown in FIG. 1, the rough configuration of the semiconductor module 10a of the first embodiment is that wiring patterns 9a, 9b and metal patterns 1a, 1b are laminated on the surface of a heat sink 11, and the surfaces of the metal patterns 1a, 1b are laminated. A semiconductor chip 2 and a gate resistor 8 are arranged. A main terminal 12 is provided in a part of the metal pattern 1a. Further, the semiconductor chip 2 and a part of the metal pattern 1a are connected by a wire 13.

Next, a part of the configuration of the semiconductor module will be explained in detail. FIG. 2 is an enlarged perspective view of portion A in FIG. As shown in FIG. 2, the semiconductor module 10a of the present invention includes a semiconductor chip 2 having a gate electrode 7, a gate control terminal 6 for supplying a gate signal to the gate electrode 7, and a connection between the gate electrode 7 and the gate control terminal 6. and a gate resistor 8 connected therebetween.

To explain the configuration in more detail, metal patterns 1a and 1b are formed on the surface of an insulating substrate (not shown). A semiconductor chip 2 such as a switching element is bonded to the surface of the metal pattern 1a using a bonding material (not shown), and a chip resistor 3 is bonded onto the metal pattern 1b using a bonding material (not shown).

The gate electrode 7 of the semiconductor chip 2 is electrically connected to an electrode 4a provided on the surface of the chip resistor 3 by a bonding wire 5a. The electrode 4c is bonded to the metal pattern 1b by a bonding wire 5b, and is electrically connected to the gate control terminal 6.

Here, the electrode 4 on the surface of the chip resistor 3 that is bonded to the bonding wires 5a, 5b may not be the electrodes 4a, 4c; for example, the bonding wire 5a may be connected to the electrode 4b. Further, the number of electrodes 4 does not have to be three, 4a, 4b, and 4c, and there may be at least two or more electrodes on the surface of the chip resistor 3, and four or more electrodes may be provided. Further, in FIG. 2, the electrodes 4a, 4b, and 4c are arranged along the left-right direction of the page, but they may be arranged along the direction from the back of the page to the front.

The electrodes 4 on the surface of the chip resistor 3 are each electrically connected inside the chip resistor 3, exhibiting a resistance value at least greater than 0 between each electrode, and exhibiting a different resistance value between two different electrodes. For example, the resistance value between the electrode 4a and the electrode 4c is set to be different from the resistance value between the electrode 4b and the electrode 4c.

As a result, the gate resistance value between the semiconductor chip 2 and the gate control terminal 6 can be easily adjusted without replacing the chip resistor 3 by simply changing the electrode 4 on the surface of the chip resistor 3 that is connected to the bonding wires 5a and 5b. It is possible to change to.

FIG. 3 is a perspective view schematically showing the semiconductor module of Example 2. In the chip resistor 3 of Example 1, the electrodes 4a, 4b, and 4c were provided on one surface (main surface) of the chip resistor 3, but it is not necessarily necessary to provide all of them on one surface. Good too. An example thereof is shown in FIG.

In FIG. 3, an electrode 4d is provided on the lower surface of the chip resistor 3, and is bonded to the metal pattern 1b using a bonding material (not shown). Further, the electrode 4d and the gate control terminal 6 are electrically connected to each other via the metal pattern 1b. Electrodes 4a, 4b, and 4c are each electrically connected to 4d inside the resistor chip, and exhibit different resistance values.

Thereby, a plurality of resistance values can be realized compared to the configuration of Example 1 having the same chip resistance area.

FIG. 4 is a perspective view schematically showing the semiconductor module of Example 3. In this embodiment, FIG. 4 shows an embodiment in which the electrodes 4a, 4b, and 4c on the front surface side are connected to the gate control terminal 6 with respect to the embodiment in which the chip resistor 3 has electrodes on both main surfaces described in the second embodiment.

In FIG. 3, an electrode 4d is provided on the lower surface of the chip resistor 3, and is bonded to the metal pattern 1b using a bonding material (not shown). Further, the electrode 4d and the gate electrode 7 are electrically connected via the metal pattern 1b and the bonding wire 5a.

The gate control terminal 6 is electrically connected to the electrode 4c via the metal pattern and the bonding wire 5b. Electrodes 4a, 4b, and 4c are each electrically connected to 4d inside the resistor chip, and exhibit different resistance values.

With this configuration described above, the same effects as in the second embodiment can be obtained.

As described above, according to the present invention, it has been shown that a semiconductor module can be provided in which a plurality of resistance values can be set using one gate resistor.

Note that the present invention is not limited to the above-described embodiments, and includes various modifications. For example, the embodiments described above are described in detail to explain the present invention in an easy-to-understand manner, and the present invention is not necessarily limited to having all the configurations described. Furthermore, it is possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. Further, it is possible to add, delete, or replace a part of the configuration of each embodiment with other configurations.

1a, 1b, 1c... Metal pattern, 2... Semiconductor chip, 3... Chip resistor, 4, 4a, 4b, 4c, 4d... Electrode, 5a, 5b... Bonding wire, 6... Gate control terminal, 7... Gate electrode, 8 ... Gate resistor, 9a, 9b... Wiring pattern, 10a, 10b, 10c... Semiconductor module, 11... Heat sink, 12... Main terminal, 13... Wire.

Claims (4)

A semiconductor module having a semiconductor chip having a gate electrode, a gate control terminal supplying a gate signal to the gate electrode, and a gate resistor connected between the gate electrode and the gate control terminal,
The gate resistor includes a chip resistor and a plurality of electrodes provided on the surface of the chip resistor, and when the gate electrode or the gate control terminal is connected to one of the plurality of electrodes, A semiconductor module characterized by exhibiting different resistance values between each electrode. The semiconductor module according to claim 1,
A semiconductor module characterized in that the resistance value of the gate resistor is changed by changing the electrode to which the gate electrode or the gate control terminal is connected. The semiconductor module according to claim 1,
At least one of the electrodes of the gate resistor is provided on one main surface of the chip resistor, and the remaining electrodes of the electrodes of the gate resistor are provided on the other main surface of the chip resistor. A semiconductor module characterized by: The semiconductor module according to claim 1,
A semiconductor module characterized in that a resistance value between the electrodes of each of the gate resistors is greater than zero.

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