JP2023168665A - High frequency circuit and radar device - Google Patents

Abstract

To provide a high frequency circuit and a radar device which reduce a conversion loss between a microstrip line and a post wall waveguide.SOLUTION: A high frequency circuit 10 comprises: a signal conductor 21, flat membrane conductors 241, 242, and a flat membrane conductor 23 which are formed on a first surface 201 of a substrate; a flat membrane conductor which is formed on a substantially entire surface of a second surface; a post wall waveguide 92; and a conversion part 93. The conversion part performs mode conversion between the signal conductor and the post wall waveguide, and includes: flat membrane conductors 251, 252 which connect the flat membrane conductors 241, 242 with the flat membrane conductor 23 in a first direction x; and a slit 40 which separates each of the flat membrane conductors 241, 242 and the flat membrane conductor 23 from each other so as to be opposed in the first direction. The slit has a shape extending in a second direction y, one end on a signal conductor side in the second direction is open in the high frequency manner and the other end is terminated in the high frequency manner. In the second direction, the other end in the slit is at the same position as the end on the signal conductor side of the waveguide of the post wall waveguide or on the outer side relative to the end on the signal conductor side of the waveguide.SELECTED DRAWING: Figure 2

Description

The present invention relates to a high frequency circuit including multiple types of transmission lines.

Patent Document 1 describes a waveguide microstrip line converter including a waveguide, a post wall waveguide, and a microstrip line. The waveguide and the microstrip line are connected via a post wall waveguide.

This configuration requires conversion of the transmission mode of high frequency signals between the microstrip line and the post wall waveguide.

Patent No. 5705035

However, in order to connect the microstrip line and the post-wall waveguide at high frequency, even if the signal conductor of the microstrip line and the conductor wall of the post-wall waveguide are simply connected physically and electrically, the conversion cannot be achieved. The loss will become large.

Therefore, an object of the present invention is to reduce the conversion loss between the microstrip line and the post wall waveguide.

The high frequency circuit of the present invention includes a signal conductor, a first flat film conductor, a second flat film conductor, a third flat film conductor, a post wall waveguide, and a conversion section. The signal conductor is formed in the first layer and has a shape extending in the first direction. The first flat film conductor is formed in the first layer and runs parallel to the first direction on both sides of the second direction, which is the short side direction of the signal conductor. A second flat film conductor is formed in the first layer and connects to the signal conductor in the first direction. The third flat film conductor is formed in the second layer and faces the second flat film conductor. The post wall waveguide has a waveguide between a second flat film conductor and a third flat film conductor. The conversion section performs mode conversion between the signal conductor and the post wall waveguide.

The conversion unit includes a connecting conductor that connects each of the first flat film conductors and the second flat film conductor in a first direction, and a connecting conductor that connects each of the first flat film conductors and the second flat film conductor in a first direction. and slits that are spaced apart.

The slit has a shape extending in the second direction, one end on the signal conductor side in the second direction is open in terms of high frequency, and the other end is terminated in terms of high frequency. In the second direction, the other end of the slit is located at the same position as the end of the post wall waveguide on the signal conductor side of the waveguide or outside the end of the waveguide on the signal conductor side.

In this configuration, mode conversion between the transmission mode of the microstrip line (quasi-TEM mode) and the transmission mode of the post wall waveguide (TE10 mode) is realized by the conversion unit. At this time, the end of the slit that becomes the high-frequency termination is located at the same position as the end of the post wall waveguide on the signal conductor side or outside the end of the waveguide on the signal conductor side. The electric field distribution of the transmission mode of the post wall waveguide is formed more reliably from the connection end of the waveguide to the microstrip line. This suppresses conversion loss between the microstrip line and the post wall waveguide.

Further, in the high frequency circuit of the present invention, the end of the waveguide on the signal conductor side is inside the post wall forming the post wall waveguide in the second direction.

In this configuration, the width (length in the second direction) of the post wall waveguide is made clearer.

Further, in the high frequency circuit of the present invention, a plurality of interlayer connection conductors are arranged along the first direction for each of the pair of first flat film conductors and connect the first flat film conductor and the third flat film conductor. Equipped with. The distance in the second direction of the plurality of interlayer connection conductors is shorter than the length of the post wall waveguide in the second direction.

In this configuration, the position where the first flat film conductor and the third flat film conductor are connected in the second direction (the position of the ground of the microstrip line) is a position close to the signal conductor of the microstrip line. As a result, spatial radiation from the microstrip line is suppressed, leakage of electromagnetic waves transmitted through the microstrip line between the first flat film conductor and the third flat film conductor is reduced, and transmission loss of the microstrip line is reduced. is suppressed.

Further, in the high frequency circuit of the present invention, the width of the signal conductor in the vicinity of the connection portion to the second flat film conductor is increased in the second direction.

With this configuration, impedance mismatching at the connection portion (conversion portion) between the signal conductor of the microstrip line and the conductor wall of the post wall waveguide is suppressed. This improves the conversion efficiency between the microstrip line and the post wall waveguide.

Further, a radar device of the present invention includes any of the high frequency circuits described above. With this configuration, the radar device can efficiently transmit radio waves.

FIG. 1 is an external perspective view of a high frequency circuit according to an embodiment of the present invention. 2(A) and 2(B) are plan views of a high frequency circuit according to an embodiment of the present invention. 3(A) and 3(B) are side sectional views of a high frequency circuit according to an embodiment of the present invention. FIG. 4(A) is an electric field distribution diagram of a high frequency circuit according to an embodiment of the present invention, and FIG. 4(B) is an electric field distribution diagram of a comparative example. FIG. 5 is a graph showing the relationship between slit length and insertion loss.

A high frequency circuit according to an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is an external perspective view of a high frequency circuit according to an embodiment of the present invention. 2(A) and 2(B) are plan views of a high frequency circuit according to an embodiment of the present invention. 3(A) and 3(B) are side sectional views of a high frequency circuit according to an embodiment of the present invention. 3(A) shows the AA cross section in FIG. 2(A), and FIG. 3(B) shows the BB cross section in FIG. 2(A). 1, FIG. 2(A), FIG. 2(B), FIG. 3(A), and FIG. 3(B) show the vicinity of the conversion section of the high-frequency circuit 10.

In addition, FIGS. 1, 2(A), 2(B), 3(A), and 3(B) are illustrated using three orthogonal axes: x-axis, y-axis, and z-axis. . The +x direction in the x-axis direction corresponds to the "first direction" of the present invention, and the +y direction in the y-axis direction corresponds to the "second direction" of the present invention.

As shown in FIGS. 1, 2(A), 2(B), 3(A), and 3(B), the high-frequency circuit 10 includes a substrate 20, a signal conductor 21, a flat film conductor 22, Membrane conductor 23, flat membrane conductor 241, flat membrane conductor 242, flat membrane conductor 251, flat membrane conductor 252, a plurality of interlayer connection conductors 321, a plurality of interlayer connection conductors 322, a plurality of interlayer connection conductors 331, a plurality of interlayer connection conductors 332, a plurality of interlayer connection conductors 341, a plurality of interlayer connection conductors 342, and a slit 40.

The substrate 20 is made of dielectric material. The substrate 20 may be a single dielectric or a laminate of a plurality of dielectric layers. The substrate 20 includes a first surface 201 at one end in the thickness direction (z-axis direction in the figure) and a second surface 202 at the other end.

The signal conductor 21 has a predetermined width (the length of the signal conductor 21 in the second direction) and has a shape that extends in the high frequency signal transmission direction (the x-axis direction in the figure). The signal conductor 21 is formed on the first surface 201 of the substrate 20.

Flat film conductor 22 is formed on second surface 202 of substrate 20 . The flat film conductor 22 is formed on substantially the entire surface of the second surface 202.

The flat film conductor 23 is formed on the first surface 201 of the substrate 20 . The flat film conductor 23 is formed in a region adjacent in the +x direction (first direction) to the region in which the signal conductor 21 is formed in the x-axis direction. In the x-axis direction, the +x side end of the signal conductor 21 and the -x side end of the flat film conductor 23 coincide.

The flat film conductor 23 is connected to the tip of the signal conductor 21 (the end on the +x side in the x-axis direction). That is, the flat film conductor 23 is connected to the tip of the signal conductor 21 in the first direction.

The length of the flat film conductor 23 in the second direction is equal to or more than 1/2 of the wavelength of the high frequency signal transmitted in the post wall waveguide formed using the flat film conductor 23.

The flat film conductor 241 and the flat film conductor 242 are formed on the first surface 201 of the substrate 20. The flat film conductor 241 and the flat film conductor 242 are formed in the same layer as the region in the x-axis direction where the signal conductor 21 is formed. The flat film conductor 241 and the flat film conductor 242 are a pair of flat film conductors. The flat film conductor 241 and the flat film conductor 242 are arranged parallel to the signal conductor 21 along the x-axis direction. The flat film conductor 241 is arranged on the +y side of the signal conductor 21 in the y-axis direction. The flat film conductor 242 is arranged on the −y side of the signal conductor 21 in the axial direction. That is, the flat film conductor 241 and the flat film conductor 242 are arranged at positions sandwiching the signal conductor 21 between them in the y-axis direction. The flat film conductor 241 and the flat film conductor 242 are spaced apart from the signal conductor 21 in the y-axis direction and are not connected to the signal conductor 21.

An end of the flat film conductor 241 on the +x side in the x-axis direction is connected to the flat film conductor 23 through a flat film conductor 251 . An end of the flat film conductor 242 on the +x side in the x-axis direction is connected to the flat film conductor 23 through a flat film conductor 252 . The flat film conductor 251 and the flat film conductor 252 correspond to the "connecting conductor" of the present invention.

The plurality of interlayer connection conductors 321 and the plurality of interlayer connection conductors 322 penetrate the substrate 20 in the z-axis direction (thickness direction). The plurality of interlayer connection conductors 321 and the plurality of interlayer connection conductors 322 are so-called conductive via holes or conductive through holes. The plurality of interlayer connection conductors 321 overlap the flat film conductor 22 and the flat film conductor 241 when the high frequency circuit 10 is viewed from above (viewed in a direction parallel to the z-axis direction). The plurality of interlayer connection conductors 321 connect to the flat film conductor 22 and the flat film conductor 241. The plurality of interlayer connection conductors 322 overlap the flat film conductor 22 and the flat film conductor 242 when the high frequency circuit 10 is viewed from above (viewed in a direction parallel to the z-axis direction). The plurality of interlayer connection conductors 322 connect to the flat film conductor 22 and the flat film conductor 242.

The plurality of interlayer connection conductors 321 and the plurality of interlayer connection conductors 322 are arranged along the direction in which the signal conductor 21 extends (along the x-axis direction). The plurality of interlayer connection conductors 321 are the first row of interlayer connection conductors 321, and the plurality of interlayer connection conductors 322 are the second row of interlayer connection conductors 322.

The first row of interlayer connection conductors 321 and the second row of interlayer connection conductors 322 are arranged at positions sandwiching the signal conductor 21 in the y-axis direction (second direction).

The first row of interlayer connection conductors 321 is arranged near the end of the flat film conductor 241 on the signal conductor 21 side. The second row of interlayer connection conductors 322 is arranged near the end of the flat film conductor 242 on the signal conductor 21 side.

The plurality of interlayer connection conductors 331 and the plurality of interlayer connection conductors 332 penetrate the substrate 20 in the z-axis direction (thickness direction). The plurality of interlayer connection conductors 331 and the plurality of interlayer connection conductors 332 are so-called conductive via holes or conductive through holes. The plurality of interlayer connection conductors 331 and the plurality of interlayer connection conductors 332 overlap the flat film conductor 22 and the flat film conductor 23 when the high frequency circuit 10 is viewed from above (viewed in a direction parallel to the z-axis direction). The plurality of interlayer connection conductors 331 and the plurality of interlayer connection conductors 332 connect to the flat film conductor 22 and the flat film conductor 23.

The plurality of interlayer connection conductors 331 and the plurality of interlayer connection conductors 332 are arranged along the x-axis direction. The plurality of interlayer connection conductors 331 are the first row of interlayer connection conductors 331, and the plurality of interlayer connection conductors 332 are the second row of interlayer connection conductors 332.

The first row of interlayer connection conductors 331 are arranged on the +y side of a line extending the +y side end of the signal conductor 21 in the +x direction in the y-axis direction (second direction). Furthermore, the first row of interlayer connection conductors 331 are located on the +y side (the side away from the signal conductor 21 ).

The second row of interlayer connection conductors 332 is arranged on the -y side with respect to the line extending the -y side end of the signal conductor 21 in the +x direction in the y-axis direction (second direction). Furthermore, the second row of interlayer connection conductors 332 is located on the -y side (away from the signal conductor 21) than the extension line of the line where the second row of interlayer connection conductors 322 are formed in the y-axis direction (second direction). side).

The distance W33 in the y-axis direction between the first row of interlayer connection conductors 331 and the second row of interlayer connection conductors 332 is the post wall waveguide including the first row of interlayer connection conductors 331 and the second row of interlayer connection conductors 332. This is more than 1/2 of the wavelength of the high-frequency signal transmitted by the RF signal. The distance W33 in the y-axis direction between the first row of interlayer connection conductors 331 and the second row of interlayer connection conductors 332 is, more specifically, the distance W33 is the inner end (the first This is the distance between the inner end of the second row of interlayer connection conductors 332 (the end on the first row of interlayer connection conductor 331 side) and the inner end of the second row of interlayer connection conductors 332.

The plurality of interlayer connection conductors 341 and the plurality of interlayer connection conductors 342 penetrate the substrate 20 in the z-axis direction (thickness direction). The plurality of interlayer connection conductors 341 and the plurality of interlayer connection conductors 342 are so-called conductive via holes or conductive through holes. The plurality of interlayer connection conductors 341 overlap the flat film conductor 22 and the flat film conductor 241 when the high frequency circuit 10 is viewed from above (viewed in a direction parallel to the z-axis direction). The plurality of interlayer connection conductors 341 connect to the flat film conductor 22 and the flat film conductor 241. The plurality of interlayer connection conductors 342 overlap the flat film conductor 22 and the flat film conductor 242 when the high frequency circuit 10 is viewed from above (viewed in a direction parallel to the z-axis direction). The plurality of interlayer connection conductors 342 connect to the flat film conductor 22 and the flat film conductor 242.

The plurality of interlayer connection conductors 341 and the plurality of interlayer connection conductors 342 are arranged along the direction in which the signal conductor 21 extends (along the x-axis direction). The plurality of interlayer connection conductors 341 are the first row of interlayer connection conductors 341, and the plurality of interlayer connection conductors 342 are the second row of interlayer connection conductors 342.

The first row of interlayer connection conductors 341 and the second row of interlayer connection conductors 342 refer to the signal conductor 21, the first row of interlayer connection conductors 321, and the second row of interlayer connection conductors in the y-axis direction (second direction). They are arranged at positions sandwiching the connection conductor 322.

The first row of interlayer connection conductors 341 is arranged at a position farther from the signal conductor 21 than the extension of the line where the first row of interlayer connection conductors 331 are formed in the y-axis direction (second direction). The second row of interlayer connection conductors 342 is arranged at a position farther from the signal conductor 21 than the extension of the line where the second row of interlayer connection conductors 332 are formed in the y-axis direction (second direction).

The slit 40 is a portion where no conductor is formed between the flat film conductors 241 and 242 and the flat film conductor 23 on the first surface 201. In other words, the slit 40 is a non-formed portion of the conductor on both sides of the signal conductor 21 in the y-axis direction (width direction) in the end region where the signal conductor 21 connects to the flat film conductor 23 .

The slit 40 has a shape that extends along the y-axis direction and has a predetermined width in the x-axis direction. The slit 40 includes a slit 401 on the +y side of the signal conductor 21 and a slit 402 on the -y side of the signal conductor 21. One end of the slits 401 and 402 on the signal conductor 21 side in the y-axis direction is open in terms of high frequency, and the other end (end on the flat film conductor 251 and 252 side) is terminated in terms of high frequency. The slit 401 allows the flat film conductor 241 and the flat film conductor 23 to face each other and to be separated from each other in the x-axis direction. The slit 402 allows the flat film conductor 242 and the flat film conductor 23 to face each other and to be separated from each other in the x-axis direction.

The length W40 of the slit 40 is equal to or longer than the distance W33 in the y-axis direction between the interlayer connection conductor 331 in the first row and the interlayer connection conductor 332 in the second row. If this shape is described using the slit 401 and the slit 402, it will be as follows, for example.

The +y side end (terminus) of the slit 401 is on the extension line of the line where the first row of interlayer connection conductors 331 are formed, or on the opposite side of the extension line to the signal conductor 21 side. The −y side end of the slit 402 is on the extension line of the line where the second row of interlayer connection conductors 332 are formed, or on the opposite side of the extension line to the signal conductor 21 side.

More specifically, in the y-axis direction, the high-frequency termination of the slit 401 is on the +y side of the signal conductor 21, and is located at the same position as the end of the post wall waveguide 92 on the signal conductor 21 side on the +y side, or at this end. It is located on the outer side (the side away from the signal conductor 21). Furthermore, in the y-axis direction, the high-frequency termination of the slit 402 is on the -y side of the signal conductor 21, and is located at the same position as the end of the post wall waveguide 92 on the signal conductor 21 side on the -y side or outside this end. (on the side away from the signal conductor 21).

With such a configuration, the high frequency circuit 10 realizes the microstrip line 91, the post wall waveguide 92, and the conversion section 93. More specifically, it is as follows.

The microstrip line 91 is composed of a substrate 20 (dielectric), a signal conductor 21, and a flat film conductor 22 in a region away from the connection to the post wall waveguide 92. Specifically, the microstrip line 91 in the area away from the connection to the post wall waveguide 92 has a configuration in which the signal conductor 21 and the flat film conductor 22 face each other with the substrate 20 (dielectric material) in between.

The microstrip line 91 includes a substrate 20 (dielectric), a signal conductor 21, a flat film conductor 22, a flat film conductor 241, a flat film conductor 242, and a plurality of interlayer connections in the area near the connection to the post wall waveguide 92. It is composed of conductors 321, 322, 341, and 342.

Specifically, in the microstrip line 91 in the area near the connection to the post wall waveguide 92, the signal conductor 21 and the flat film conductor 22 face each other with the substrate 20 (dielectric) in between, and the flat film conductor 241 and a flat film conductor 242 are arranged on both sides of the signal conductor 21 in the width direction, the flat film conductor 241 and the flat film conductor 22 are connected by a plurality of interlayer connection conductors 321, 341, and the flat film conductor 242 and the flat film conductor 22 are connected by a plurality of interlayer connection conductors 322 and 342.

The post wall waveguide 92 includes a substrate 20 (dielectric), a flat film conductor 22, a flat film conductor 23, a first row of interlayer connection conductors 331, and a second row of interlayer connection conductors 332. Specifically, the flat film conductor 22 and the flat film conductor 23 are connected by a first row of interlayer connection conductors 331 and a second row of interlayer connection conductors 332, respectively. As a result, a rectangular parallelepiped region surrounded by the flat film conductor 22, the flat film conductor 23, the first row of interlayer connection conductors 331, and the second row of interlayer connection conductors 332 in the substrate 20 is used as a guide for the post wall waveguide. It becomes a wave path.

The converting section 93 includes a slit 40.

In this way, by providing the conversion section of the slit 40 at the connection between the microstrip line 91 and the post wall waveguide 92, the high frequency signal transmitted through the microstrip line 91 in the quasi-TEM mode is changed to the TE10 mode. converted. Then, the TE10 mode is excited in the post wall waveguide 92, and the post wall waveguide 92 transmits the high frequency signal of the TE10 mode.

At this time, in the high frequency circuit 10, the length W40 of the slit 40 in the y-axis direction (second direction) is equal to or longer than the distance W33 of the post wall waveguide 92 in the y-axis direction (second direction). In other words, the length of the slit 40 (the length in the direction perpendicular to the signal transmission direction) is equal to or longer than the width of the post wall waveguide 92. Thereby, the TE10 mode corresponding to the distance W33 is more reliably excited from the connection end of the microstrip line 91 in the post wall waveguide 92.

FIG. 4(A) is an electric field distribution diagram of a high frequency circuit according to an embodiment of the present invention, and FIG. 4(B) is an electric field distribution diagram of a comparative example. Note that the comparative example has a configuration in which the length of the slit 40P is shorter than the distance W33.

As shown in FIG. 4A, when the length W40 of the slit 40 is longer than the distance W33, a stable TE10 mode is excited up to the very vicinity of the connection end of the microstrip line of the post wall waveguide. On the other hand, as shown in FIG. 4B, when the length of the slit 40P is shorter than the distance W33, a stable TE10 mode is not excited in the region near the connection end of the microstrip line of the post wall waveguide.

By providing the configuration of the high frequency circuit 10 in this manner, mode conversion between the microstrip line 91 and the post wall waveguide 92 can be performed more stably.

FIG. 5 is a graph showing the relationship between slit length and insertion loss. In FIG. 5, ΔW1(+), ΔW2(+), and ΔW3(+) indicate the case where the slit length is longer than the width of the post wall waveguide, and ΔW4(-) and ΔW5(-) indicate the slit length. The length of is shorter than the width of the post wall waveguide.

As shown in FIG. 5, the insertion loss can be reduced by making the length of the slit longer than the width of the post wall waveguide. For example, insertion loss near 9.4 GHz can be significantly reduced compared to when the length of the slit is shorter than the width of the post wall waveguide.

In this way, the high frequency circuit 10 can reduce the conversion loss between the microstrip line 91 and the post wall waveguide 92. At this time, the high frequency circuit 10 has a simple structure in which only the slit 40 is provided at the connection portion between the microstrip line 91 and the post wall waveguide 92, so that the conversion efficiency can be reduced.

Furthermore, in the high frequency circuit 10, the distance W32 between the first row of interlayer connection conductors 321 and the second row of interlayer connection conductors 322 that sandwich the signal conductor 21 is shorter than the width of the post wall waveguide 92 (distance W33). As a result, spatial radiation from the microstrip line 91 is suppressed, leakage of electromagnetic waves transmitted through the microstrip line 91 between the flat film conductors 241 and 242 and the flat film conductor 22 is reduced, and the microstrip line 91 transmission loss can be reduced.

Furthermore, the high frequency circuit 10 includes a conversion auxiliary section 220 that becomes wider as the tip of the signal conductor 21 approaches the post wall waveguide 92. With such a configuration, a sudden change in impedance at the tip of the microstrip line 91 can be suppressed. Thereby, the high frequency circuit 10 can further reduce insertion loss.

In the above description, a mode in which conductors are formed on both sides of the substrate 20 has been shown. However, for example, a flat film conductor for grounding the microstrip line may be provided at an intermediate position in the thickness direction of the substrate 20. Thereby, the characteristic impedance of the microstrip line can be adjusted to a desired value. Furthermore, in this case, by providing the first row of interlayer connection conductors 321, the first row of interlayer connection conductors 341, the second row of interlayer connection conductors 322, and the second row of interlayer connection conductors 342, the microstrip It is possible to suppress the generation of unnecessary waves between the flat film conductor for line ground and the flat film conductor 22.

Note that the above-described high-frequency circuit 10 is used in a device that transmits radio waves, such as a radar device. Thereby, a device that transmits radio waves, such as a radar device, can efficiently transmit radio waves.

10: High frequency circuit 20: Substrate 21: Signal conductor 22, 23, 241, 242, 251, 252: Flat film conductor 40, 401, 402, 40P: Slit 20: Substrate 91: Microstrip line 92: Post wall waveguide 93 : Conversion section 202: Second surface 220: Conversion auxiliary section 321, 322, 331, 332, 341, 342: Interlayer connection conductor

Claims (5)

a signal conductor formed in a first layer and extending in a first direction;
a first flat film conductor formed in the first layer and running parallel to the first direction on both sides of the second direction, which is the short side direction of the signal conductor;
a second flat film conductor formed in the first layer and connected to the signal conductor in the first direction;
a third flat film conductor formed in a second layer and facing the second flat film conductor;
a post wall waveguide having a waveguide between the second flat film conductor and the third flat film conductor;
a conversion unit that performs mode conversion between the signal conductor and the post wall waveguide;
Equipped with
The conversion unit is
A connecting conductor connects each of the first flat film conductors and the second flat film conductor in the first direction, and a connecting conductor connects each of the first flat film conductors and the second flat film conductor in the first direction. slits that face each other and are spaced apart,
The slit has a shape extending in the second direction, one end on the signal conductor side in the second direction is open in terms of high frequency, and the other end is terminated in terms of high frequency,
In the second direction, the other end of the slit is located at the same position as the signal conductor side end of the post wall waveguide or outside the signal conductor side end of the waveguide.
High frequency circuit. The high frequency circuit according to claim 1,
The end of the signal conductor side of the waveguide is on the inside of the post wall constituting the post wall waveguide in the second direction.
High frequency circuit. The high frequency circuit according to claim 1 or 2,
A plurality of interlayer connection conductors are arranged along the first direction for each of the first flat film conductors and connect to the first flat film conductors and the third flat film conductors,
The distance of the interlayer connection conductor in the second direction is shorter than the length of the waveguide in the second direction.
High frequency circuit. The high frequency circuit according to any one of claims 1 to 3,
The signal conductor near the connection portion to the second flat film conductor has a longer width in the second direction;
High frequency circuit. A radar device comprising the high frequency circuit according to any one of claims 1 to 4.

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