JP2023166747A - Semiconductor device and power conversion device - Google Patents

Abstract

To provide a semiconductor device constituted by connecting a plurality of power transistors in series which can reduce conduction loss in reverse conduction operation, and a power conversion device using the same.SOLUTION: A signal independent from a gate drive circuit of a first gate drive circuit 3 is input to a drive circuit 5 from a second gate drive circuit 4, when a switching element QN1 of a first stage is in an off state and is reverse conduction operated, switching elements QN2 and QN3 of second and subsequent stages are controlled to be in on states.SELECTED DRAWING: Figure 1

Description

The present invention relates to a semiconductor device and a power conversion device, and particularly relates to a technique that is effective when applied to a high voltage element configured by connecting a plurality of low voltage elements in series.

In the development of power semiconductor devices, it is important to realize devices with high breakdown voltage, low on-resistance, and low switching loss.

Typically, a power transistor has a drift region located between a body region and a drain region. The doping concentration of the drift region is lower than that of the drain region.

The on-resistance of a conventional power transistor depends on the length of the drift region in the direction of current flow and the doping concentration of the drift region.If the length of the drift region is shortened or the doping concentration of the drift region is increased, the on-resistance increases. descend.

However, if the length of the drift region is shortened or the doping concentration of the drift region is increased, there is a problem that the breakdown voltage of the device decreases.

As a method to reduce the on-resistance of a power transistor with a given withstand voltage, there is a technique of providing a complementary doped compensation region in the drift region, or a compensation region that is insulated from the drift region with a dielectric material and connected to, for example, the gate or source terminal of the transistor. Techniques for providing field plates in the drift region are well known.

In these types of power transistors, the compensation zone or field plate partially guarantees the doping charge in the drift region by depletion when the device is in the off-state, thus allowing heavy doping of the drift region. , on-resistance can be reduced without reducing breakdown voltage.

However, the output capacitance of these devices tends to increase.

As background technology in this technical field, there is a technology such as that disclosed in Patent Document 1, for example.

Patent Document 1 discloses a semiconductor element that can improve breakdown voltage and reduce output capacitance by autonomously controlling a plurality of power transistors in a cascode connection.

The technology disclosed in Patent Document 1 not only has advantages in terms of power transistor performance such as improved breakdown voltage, reduced on-resistance, and reduced switching loss, but also has the advantage of ease of design in that the breakdown voltage can be changed depending on the number of cascode connection stages. There is also.

US Patent Application Publication No. 2012/0175635

However, since the technique disclosed in Patent Document 1 uses a cascode connection in which the gate electrode is connected to the source electrode of the previous stage, it has the following problems.

(Problem 1) Since it is necessary to use normally-on type power transistors that are conductive when the gate voltage is 0V for the power transistors in the second and subsequent stages, the degree of freedom in the design and manufacturing process of the power transistors is reduced. Furthermore, when the power transistor is turned on (conducted), the voltage between the gate and the source cannot be made higher than 0V, so there is a problem that the channel resistance cannot be made sufficiently small. Furthermore, when the power transistor is reversely conductive during freewheeling operation, the gate-source voltage is close to 0V, so there is a problem that the channel resistance cannot be made sufficiently small.

(Problem 2) In Patent Document 1, the breakdown voltage of the second and subsequent power transistors is limited by the breakdown voltage of the gate oxide film, and the breakdown voltage of each individual power transistor is usually limited to about 20V. In addition, in order to obtain high withstand voltage, it is necessary to increase the number of cascode connection stages, but as the number of stages increases, the number of power transistor channels and the number of series contacts that connect power transistors increases, and parasitic resistance increases. There's a problem.

(Problem 3) Reliability decreases because a plurality of power transistors are connected in series. For example, in Patent Document 1, if even one of the power transistors connected in series is destroyed between its source and drain, all power transistors in the next stage after the destroyed power transistor are turned off. As a result, there is a problem in that the withstand voltage is significantly lowered.

Therefore, in response to problem 1 above, even if the power transistors in the second and subsequent stages of a plurality of power transistors connected in series are normally-off types, the circuit configuration is such that the power transistors in the first stage can be autonomously controlled in conjunction with the power transistors in the first stage. It is desired to realize a semiconductor device having a circuit configuration that can apply a positive gate-source voltage to the power transistors in the second and subsequent stages when the power transistors in the second and subsequent stages are on. Furthermore, in order to reduce conduction loss during reverse conduction operation, it is desired to realize a semiconductor device having a circuit configuration that can always apply a positive gate-source voltage to the power transistors in the second and subsequent stages during reverse conduction operation. .

Furthermore, in response to the above problem 2, it is desired to realize a semiconductor device in which the breakdown voltage of the power transistors in the second and subsequent stages is not limited by the breakdown voltage of the gate oxide film. In addition, among the resistance components of power transistors, the ratio of parasitic resistances such as channel resistance and contact resistance is appropriately designed, and the number of series-connected power transistors from the second stage onwards for a certain target breakdown voltage. It is important to be able to design freely.

Furthermore, in response to the above problem 3, even if some of the power transistors connected in series have a source-drain breakdown voltage failure (short circuit), the other power transistors can be turned off. It is desired to realize a semiconductor device in which the withstand voltage of a series of power transistors connected in series does not drop significantly as a whole.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a semiconductor device configured by connecting a plurality of power transistors in series, which can use a normally-off type power transistor for each power transistor, and which always has two stages during reverse conduction operation. By applying a positive gate-source voltage to the gates of the power transistors after the first one, it is possible to reduce conduction loss during reverse conduction operation, and if some power transistors have a breakdown voltage failure between the source and drain. It is an object of the present invention to provide a highly reliable semiconductor device in which the withstand voltage of the semiconductor device as a whole does not drop significantly even when the semiconductor device is in the same state, and a power conversion device using the same.

In order to solve the above problems, a semiconductor device of the present invention includes, for example, a plurality of switching elements connected in series in multiple stages and a drive circuit for driving the plurality of switching elements. is an integer of 3 or more, the plurality of switching elements connected in series in multiple stages has switching elements from the first stage to the mth stage connected in series with each other, and the drive circuit is connected to the next stage. It has a plurality of elements from a first stage to an m-1 stage for driving the switching element, and a gate of the switching element in the first stage is connected to a first gate driving circuit to drive the switching element in the first stage. A gate drive signal that controls the on/off of an element is input to the element in the first stage of the drive circuit, and a signal independent from the gate drive signal is input to the element in the first stage of the drive circuit. A signal for driving a switching element is input, and when the switching element in the first stage is in an on state, the driving circuit also turns on the switching elements in the second stage and subsequent stages in conjunction with the switching element in the first stage. When the switching element is in the off state and in the voltage blocking state, the switching elements in the second and subsequent stages are also in the off state and in the voltage blocking state, and when the switching element in the first stage is in the off state and in reverse conduction operation. , the plurality of switching elements are controlled so that the switching elements in the second and subsequent stages are turned on.

Further, the power conversion device of the present invention is characterized in that the above-described semiconductor device is used as a switching element.

According to the present invention, there is provided a semiconductor device configured by connecting a plurality of power transistors in series, in which normally-off type power transistors can be used for each power transistor, and in addition, during reverse conduction operation, the semiconductor device is always connected to the second and subsequent stages. By applying a positive gate-source voltage to the gate of a power transistor, it is possible to reduce conduction loss during reverse conduction operation, even when the source-drain voltage of some power transistors is poor. Also, it is possible to realize a highly reliable semiconductor device in which the withstand voltage of the semiconductor device as a whole does not drop significantly, and a power conversion device using the same.

1 is a circuit diagram showing the configuration of a semiconductor device of Example 1. FIG. 3 is a circuit diagram showing the configuration of a semiconductor device of Example 2. FIG. 3 is a circuit diagram showing the configuration of a semiconductor device of Example 3. FIG. FIG. 3 is a circuit diagram showing the configuration of a semiconductor device according to a fourth embodiment. 12 is a circuit diagram showing the configuration of a semiconductor device of Example 5. FIG. FIG. 7 is a circuit diagram showing the configuration of a semiconductor device of Example 6. FIG. 7 is a circuit diagram showing the configuration of a semiconductor device of Example 7.

Embodiments of the present invention will be described below with reference to the drawings. In each figure and each embodiment, the same or similar components are denoted by the same reference numerals, and overlapping explanations will be omitted.

FIG. 1 is a circuit diagram showing the configuration of a semiconductor device of Example 1.

As shown in FIG. 1, the semiconductor device 10 of the first embodiment includes a plurality of switching elements QN1, QN2, QN3 connected in series in multiple stages, and a drive circuit 5 for driving the plurality of switching elements QN1, QN2, QN3. It is equipped with Further, the semiconductor device 10 has a source terminal 1 and a drain terminal 2.

FIG. 1 shows an example in which MOSFETs are used as power transistors (elements used in the plurality of switching elements QN1, QN2, QN3 and the drive circuit 5) constituting the semiconductor device 10. An IGBT (Insulated Gate Bipolar Transistor) may be used as the power transistor used in the switching elements QN1, QN2, and QN3, or a HEMT (High Electron Mobility Transistor) using a material such as gallium nitride (GaN) may be used. transistor) may also be used. Note that when IGBTs are used as the switching elements QN1, QN2, and QN3, a configuration may further include a diode connected antiparallel to the IGBTs. Furthermore, when using an IGBT, the source terminal 1 may be read as an emitter terminal, and the drain terminal 2 may be read as a collector terminal.

The semiconductor device 10 is connected to a first gate drive circuit 3 and a second gate drive circuit 4. Here, the case where the first gate drive circuit 3 and the second gate drive circuit 4 are provided outside the semiconductor device 10 is described as an example, but the present invention is not limited to this. A configuration may also be adopted in which one or both of the first gate drive circuit 3 and the second gate drive circuit 4 are built-in.

As for the plurality of switching elements QN1, QN2, and QN3 connected in series in multiple stages, an example of three stages is shown in FIG. It is also possible to have a configuration having switching elements from the first stage to the mth stage. In this case, the source terminal 1 is connected to the source (s, hereinafter the reference numeral is omitted) of the first-stage switching element QN1, and the drain (d, the following reference numeral is omitted) of the m-stage switching element QNm (QN3 when m=3). (omitted) may be connected to the drain terminal 2, and the sources of the switching elements in the second and subsequent stages may be connected to the drains of the switching elements in the previous stage. Although it is not prohibited to set the number of series in two stages (m=2), it is preferable to have three or more stages (m≧3) because it is suitable for increasing the withstand voltage.

The plurality of switching elements QN1, QN2, and QN3 are transistors having a first conductivity type, and in Example 1, an example will be described in which the first conductivity type is n-type.

In the first embodiment, among the plurality of switching elements QN1, QN2, and QN3, at least the second-stage and subsequent switching elements QN2 and QN3 use normally-off transistors. The first stage switching element QN1 may be either a normally-off type or a normally-on type.

The drive circuit 5 has a plurality of elements from the first stage to the m-1th stage for driving the next stage switching elements QN2 to QNm.

As shown in FIG. 1, the drive circuit 5 of the first embodiment includes normally-off transistors AP1, AP2, BP1, and BP2 having a second conductivity type. Transistors AP1 and BP1 constitute a first stage element, and transistors AP2 and BP2 constitute a second stage element.

A gate drive signal for controlling on/off of the first-stage switching element QN1 is input from the first gate drive circuit 3 to the gate (g, hereinafter reference numeral is omitted) of the first-stage switching element QN1.

The elements AP1 and BP1 in the first stage of the drive circuit 5 are supplied with a signal independent from the gate drive signal of the first gate drive circuit 3, and are supplied from the second gate drive circuit 4 to the switching elements QN2 in the second and subsequent stages. , QN3 are input.

When the first-stage switching element QN1 is in the on-state, the drive circuit 5 also turns on the second-stage and subsequent switching elements QN2 and QN3, so that the first-stage switching element QN1 is in the off-state and the voltage When in the blocking state, the switching elements QN2 and QN3 in the second and subsequent stages are also in the off state and voltage blocking state, and when the first stage switching element QN1 is in the off state and in reverse conduction operation, the switching elements in the second and subsequent stages The plurality of switching elements QN2 and QN3 are controlled so that the switching elements QN2 and QN3 are turned on.

According to the semiconductor device 10 of the first embodiment, a signal independent from the gate drive signal of the first gate drive circuit 3 is inputted from the second gate drive circuit 4 to the drive circuit 5, and the signal is inputted to the drive circuit 5 from the second gate drive circuit 4, and the signal is input to the drive circuit 5 from the second gate drive circuit 4. By controlling the switching elements QN2 and QN3 in the second and subsequent stages to be in the on state when the is in the off state and in reverse conduction operation, the switching elements QN2 and QN3 in the second and subsequent stages are in the on state even during reverse conduction operation. Since current flows through the channel in the second and subsequent stages, voltage drops due to freewheeling diodes (diodes built into MOSFETs and diodes connected in anti-parallel to IGBT) of switching elements QN2 and QN3 can be avoided. This has the effect of reducing conduction loss during reverse conduction operation.

As the signal from the second gate drive circuit 4, it is preferable that an on signal is inputted from the second gate drive circuit 4 when at least the first stage switching element QN1 is in the on state or in reverse conduction operation. . Further, the on signal may always be inputted from the second gate drive circuit 4 during normal operation of the plurality of switching elements QN1, QN2, and QN3. For example, a constant voltage source can be used as the second gate drive circuit 4. By using a constant voltage source, the second gate drive circuit 4 can have a simple configuration.

Next, an example of a specific configuration of the drive circuit 5 in the semiconductor device 10 of the first embodiment will be described.

The drive circuit 5 includes first elements from the first stage to the (m-1) stage which are composed of normally-off transistors AP1 and AP2 having a second conductivity type, and normally-off transistors having a second conductivity type. It has second elements from the first stage to the m-1th stage, which are composed of transistors BP1 and BP2. Here, since m=3, it is the first stage to the second stage, but in the following explanation, it is also assumed that m is 4 or more.

The transistor AP1, which is the first element in the first stage, has a drain connected to the signal from the second gate drive circuit 4, a gate connected to the source of the next stage switching element QN2, and a source connected to the next stage switching element QN2. Connected to the gate of element QN2.

The transistor BP1, which is the second element in the first stage, has its drain connected to the source of the next stage switching element QN1, its gate receives the signal from the second gate drive circuit 4, and its source connects to the next stage switching element QN1. Connected to the gate of element QN2.

The transistor AP2, which is the first element from the second stage to the m-1th stage, has its drain connected to the gate of the switching element QN2 in the same stage, its gate connected to the source of the switching element QN3 in the next stage, and its source connected to the gate of the switching element QN3 in the next stage. is connected to the gate of the switching element QN3 in the next stage.

The transistor BP2, which is the second element from the second stage to the m-1th stage, has its drain connected to the source of the switching element QN3 in the next stage, its gate connected to the gate of the switching element QN2 in the same stage, and its source connected to the gate of the switching element QN2 in the same stage. is connected to the gate of the next stage switching element QN3.

Next, an example of the operation of the semiconductor device 10 of the first embodiment will be described.

Here, it is assumed that the drain-source breakdown voltage of the switching elements QN1, QN2, QN3 and the transistors AP1, AP2, BP1, BP2 is 20V, and these are connected to operate as one semiconductor device 10. Therefore, the gate of the semiconductor device 10 becomes the gate of the first-stage switching element QN1, the source becomes the source of the first-stage transistor QN1, and the drain becomes the drain of the third-stage switching element QN3, which is the final stage.

Further, the second gate drive circuit 4 outputs an on signal (for example, a signal of +15 V with respect to the potential of the source terminal 1) at least when the semiconductor device 10 is in conduction operation (on state) or reverse conduction operation, In the first embodiment, as an example, a constant voltage source is used that always outputs an on signal of +15V with respect to the potential of the source terminal 1.

First, we will explain the operation during blocking.

As an example of the operation during blocking, a state will be described in which a voltage is applied to the drain terminal 2 and the first gate drive circuit 3 outputs an off signal (for example, 0 V or less).

The switching element QN1 is turned off by the off signal from the first gate drive circuit 3, and the drain potential of the switching element QN1 rises. When the drain potential of the switching element QN1 rises to 15V or higher, the transistor AP1 is turned off, and the transistor BP1 is turned on. Therefore, the gate and source of switching element QN2 have the same potential, switching element QN2 is turned off, and the drain voltage of switching element QN2 increases.

Similarly, the transistor AP2 is turned off, and the transistor BP2 is turned on. Therefore, the gate and source of switching element QN3 are at the same potential, switching element QN3 is turned off, and the drain voltage of switching element QN3 increases.

Through the series of operations described above, the series-connected switching elements QN1, QN2, and QN3 and the series-connected transistors AP1 and AP2 are turned off in conjunction with each other, and high withstand voltage performance is exhibited.

Next, the operation during conduction will be explained.

As an example of the operation during conduction, a state in which a voltage is applied to the drain terminal 2 through a load (not shown) and the first gate drive circuit 3 outputs an on signal (for example, 15 V) will be explained. do.

The switching element QN1 is turned on by the ON signal from the first gate drive circuit 3, and the drain potential of the switching element QN1 decreases. Therefore, transistor AP1 is turned on, and transistor BP1 is turned off. Then, the charge supplied from the second gate drive circuit 4 is accumulated in the gate of the switching element QN2, the switching element QN2 is turned on, and the drain potential of the switching element QN2 is lowered.

Similarly, transistor AP2 is turned on and transistor BP2 is turned off. Then, the charge supplied from the second gate drive circuit 4 is accumulated in the gate of the switching element QN3, the switching element QN3 is turned on, and the potential of the drain terminal 2 is lowered.

Through the series of operations described above, the switching elements QN1, QN2, and QN3 connected in series are turned on in conjunction with each other, allowing current to flow.

Next, the operation during reverse conduction will be explained.

As an example of the operation during reverse conduction, assume a reverse conduction operation in which current flows from the source to the drain, which occurs when the inverter is freewheeling, and the first gate drive circuit 3 outputs an off signal (for example, 0 V or less). This will be explained using an example.

The switching element QN1 is turned off by the off signal from the first gate drive circuit 3, and current flows from the source to the drain via the freewheeling diode (in this case, the PN diode built into the switching element QN1).

At this time, since the drain potential of the switching element QN1 is lower than the source potential, the transistor AP1 is in an on state and the transistor BP1 is in an off state. Therefore, the charge supplied from the second gate drive circuit 4 is accumulated in the gate of the switching element QN2, the switching element QN2 is in an on state, and a current flows from the source to the drain through the channel of the switching element QN2.

Similarly, since the drain potential of the switching element QN2 is lower than the source potential, the transistor AP2 is in the on state and the transistor BP2 is in the off state. Therefore, the charge supplied from the second gate drive circuit 4 is accumulated in the gate of the switching element QN3, the switching element QN3 is in an on state, and a current flows from the source to the drain through the channel of the switching element QN3.

Through the series of operations described above, current can be reversely conducted from the source terminal 1 to the drain terminal 2. At this time, the switching elements QN2 and QN3 in the second and subsequent stages connected in series are in the on state, and current flows through the channels, so the freewheeling diodes of the switching elements QN2 and QN3 in the second and subsequent stages (in this case, the switching A voltage drop caused by the PN diodes built into elements QN2 and QN3 can be avoided, and conduction loss during reverse conduction operation can be reduced.

As another example of the operation during reverse conduction, a state in which the first gate drive circuit 3 is outputting an on signal (for example, 15V) will be described.

The switching element QN1 is turned on by the ON signal from the first gate drive circuit 3, and current flows from the source to the drain through the channel of the switching element QN1. Furthermore, in the switching elements QN2 and QN3, the current flows from the source to the drain via the channel in the same manner as described above.

Through the series of operations described above, current can be reversely conducted from the source terminal 1 to the drain terminal 2. At this time, the series-connected switching elements QN1, QN2, and QN3 are in the on state, and current flows through the channels, so the freewheeling diodes of the switching elements QN1, QN2, and QN3 (in this case, the switching elements QN1, QN2, and QN3 It is possible to avoid the voltage drop caused by the built-in PN diode (PN diode), and reduce conduction loss during reverse conduction operation.

Next, an explanation will be given of the operation when a fault occurs in which a short circuit occurs between the drain and source of some switching elements.

As an example of the operation when a short-circuit failure occurs in a switching element, suppose that a short-circuit occurs between the drain and source of the switching element QN2, a voltage is applied to the drain terminal 2, and the first gate drive circuit 3 is activated. A state in which an off signal (for example, 0V or less) is output will be explained as an example.

As described above, the switching element QN1 and the transistor AP1 are turned off and the transistor BP1 is turned on by the off signal of the first gate drive circuit 3, but since the drain and source of the switching element QN2 are short-circuited, the switching element QN1 and the transistor AP1 are turned on. The potential difference between the drain and source of QN2 is small. However, if this potential difference is several volts or more (absolute value of the gate threshold voltage of transistor BP2 + built-in potential of the PN diode built in transistor BP2), transistor BP2 is turned on, and the gate-source of switching element QN3 have the same potential, and switching element QN3 is turned off.

Even if the drain-source potential difference of switching element QN2 is smaller than the above potential, switching element QN3 is turned off if the absolute value of the gate threshold voltage of switching element QN3 is greater than the absolute value of the gate threshold voltage of transistor BP2. Therefore, it is desirable that the absolute value of the gate threshold of the second element be larger than the absolute value of the gate threshold of the next-stage switching element.

In addition, as another example of the operation when a short circuit failure occurs in a switching element, a voltage is applied to the drain terminal 2 through a load (not shown), and the gate drive circuit 3 outputs an on signal (for example, 15V). The following is an example of the state in which

Even if the drain and source of switching element QN2 are short-circuited, the voltage applied between the drain and source of switching elements QN1, QN2, and QN3 is the same as during normal operation when conductive, and operation is possible in the same way as during normal operation. It is.

Further, it can operate in the same manner as in normal operation even in reverse conduction operation.

As described above, even if there is a short circuit between the drain and source of switching element QN2, it is possible to turn off the next stage switching element QN3 (or all the switching elements from the next stage onwards if there are many series connections), so the operation is normal. The deterioration of the withstand voltage performance is originally limited to only the portion played by the switching element QN2. Furthermore, the conduction operation and reverse conduction operation can be performed in the same manner as in the normal state.

Therefore, even if some of the switching elements in the entire semiconductor device 10 are short-circuited, the operation of the entire semiconductor device 10 can be continued.

As explained above, the semiconductor device of Example 1 is a semiconductor device configured by connecting a plurality of power transistors in series, in which a normally-off type power transistor can be used for each power transistor, and the reverse During conduction, a positive gate-source voltage is always applied to the gates of power transistors in the second and subsequent stages to reduce conduction loss during reverse conduction. It is possible to realize a highly reliable semiconductor device in which the breakdown voltage of the semiconductor device as a whole does not drop significantly even in the case of breakdown voltage failure.

FIG. 2 is a circuit diagram showing the configuration of a semiconductor device of Example 2.

Example 2 is a modification of Example 1, and differs from Example 1 in that the first element in the first stage of drive circuit 5 is replaced with diode D1. When the first conductivity type is n-type, the diode D1 has a signal from the second gate drive circuit 4 inputted to the anode (a, hereinafter omitted), and a cathode (k, hereinafter omitted) that has two stages. It is connected to the gate of the second switching element QN2. The feature of the second embodiment is that the turn-off operation for transitioning from the on state to the off state is fast. Other than this, the configuration and effects are the same as those of the first embodiment, so the explanation will focus on the points that are different from the first embodiment, and redundant explanations will be omitted.

First, as an example of the operation during conduction, a state in which a voltage is applied to the drain terminal 2 via a load (not shown) and the first gate drive circuit 3 outputs an on signal (for example, 15V) is taken as an example. Explain.

The switching element QN1 is in the on state due to the on signal from the first gate drive circuit 3, and the drain potential of the switching element QN1 is low. Therefore, the output (15V) of the second gate drive circuit is input to the gate of switching element QN2 via diode D1, switching element QN2 is turned on, and the drain voltage of switching element QN2 is reduced. From this point on, similarly to the first embodiment, the switching element QN3 is also turned on, and as a result, the semiconductor device 10 is turned on.

Next, as an example of the operation during blocking, an operation in which the output of the first gate drive circuit 3 changes from an on signal to an off signal (for example, 0 V or less) will be described.

First, the switching element QN1 is turned off by the off signal from the first gate drive circuit 3, and the drain potential of the switching element QN1 rises. Then, the gate potential of switching element QN2 rises with respect to source terminal 1 due to capacitive coupling. In the configuration of Example 1, the gate potential of the switching element QN2 was maintained at 15V with respect to the source terminal 1 by discharging the charge to the second gate drive circuit 4 through the transistor AP1 in the on state. 2, since the diode D1 is connected, discharge to the second gate drive circuit 4 is prevented, and a positive potential difference is generated between the cathode and the anode of the diode D1, turning on the transistor BP1. Therefore, the gate charge of the switching element QN2 flows into the drain of the switching element QN1, accelerating the rise in the drain potential of the switching element QN1. The subsequent operations are the same as in the first embodiment.

According to the second embodiment, the turn-off operation of the entire semiconductor device 10 is accelerated by accelerating the rise in drain potential of the switching element QN1.

FIG. 3 is a circuit diagram showing the configuration of a semiconductor device of Example 3.

Embodiment 3 is a modification of Embodiment 1, and the difference from Embodiment 1 is that the drains of transistors BP1 and BP2, which are the second elements from the 1st stage to m-1th stage, are in the same stage. This point is connected to the sources of switching elements QN1 and QN2. The feature of the third embodiment is that the switching elements QN2 and QN3 in the second and subsequent stages may be of a normally-off type or a normally-on type, or may be a mixture thereof. Other than this, the configuration and effects are the same as those of the first embodiment, so the explanation will focus on the points that are different from the first embodiment, and redundant explanations will be omitted.

First, as an example of the operation during blocking, a state will be described in which a voltage is applied to the drain terminal 2 and the first gate drive circuit 3 outputs an off signal (for example, 0 V or less).

The switching element QN1 is turned off by the off signal from the first gate drive circuit 3, and the drain potential of the switching element QN1 rises. When the drain potential of the switching element QN1 rises to 15V or higher, the transistor AP1 is turned off, and the transistor BP1 is turned on. Therefore, the gate and source terminal 1 of switching element QN2 have the same potential, and a negative voltage of the same magnitude as the voltage applied between the drain and source of switching element QN1 is applied between the gate and source of switching element QN2. Therefore, the switching element QN2 is turned off, and the drain voltage of the switching element QN2 increases.

Similarly, the transistor AP2 is turned off, and the transistor BP2 is turned on. Therefore, the gate of switching element QN3 and the source of switching element QN2 have the same potential, and a negative voltage of the same magnitude as the voltage applied between the drain and source of switching element QN2 is applied between the gate and source of switching element QN3. is applied, the switching element QN3 is turned off, and the drain voltage of the switching element QN3 increases.

According to the third embodiment, since a negative voltage can be applied between the gates and sources of the switching elements QN2 and QN3, even if the switching elements QN2 and QN3 are normally-off types, they can be turned off.

Note that the configuration of the third embodiment may be applied to the second embodiment.

FIG. 4 is a circuit diagram showing the configuration of a semiconductor device of Example 4.

Example 4 is a modification of Example 1, and differs from Example 1 in that p-type is used as the first conductivity type and n-type is used as the second conductivity type. Therefore, switching elements QP1, QP2, and QP3 are composed of p-type transistors, and transistors AN1, AN2, BN1, and AN2 are composed of n-type transistors. Therefore, the drain terminal 2 has a lower potential than the source terminal 1. The basic circuit configuration of the fourth embodiment is the same as that of the first embodiment, except that the conductivity type is replaced with that of the first embodiment. Other than this, the configuration and effects are the same as those of the first embodiment, so the explanation will focus on the points that are different from the first embodiment, and redundant explanations will be omitted.

From the first gate drive circuit 3, for example, -15V is input as an ON signal, and 0V or more is input as an OFF signal. A constant voltage source to which an on signal is input can be used, but as in the first embodiment, the present invention is not limited to this.

The operation of the fourth embodiment is the same as that of the first embodiment except for the difference in that the conductivity type is replaced with that of the first embodiment, and therefore the description thereof will be omitted.

According to the fourth embodiment, the same effect as in the first embodiment can be obtained even if the first conductivity type is p type and the second conductivity type is n type.

Note that the configuration of the third embodiment may be applied to the fourth embodiment.

FIG. 5 is a circuit diagram showing the configuration of a semiconductor device of Example 5.

Example 5 is a modification of Example 4, and is a combination of Example 4 and Example 2. The difference from the fourth embodiment is that, like the second embodiment, the first element in the first stage of the drive circuit 5 is replaced with a diode D1. The difference from Embodiment 2 is that the first conductivity type is p-type, so the cathode of the diode D1 receives the signal from the second gate drive circuit 4, and the anode connects to the gate of the second-stage switching element QP2. It is a connected point. The feature of the fifth embodiment is that, like the second embodiment, the turn-off operation for transitioning from the on state to the off state is fast. Other than this, the configuration and effects are the same as those of the fourth embodiment, so redundant explanation will be omitted.

Note that the configuration of the third embodiment may be applied to the fifth embodiment.

FIG. 6 is a circuit diagram showing the configuration of a semiconductor device of Example 6.

Embodiment 6 is a modification of Embodiment 1, and the difference from Embodiment 1 is that the switching elements QHN1, QHN2, and QHN3 of the semiconductor device 20 are replaced with switching elements QN1, QN2, and QN3 having a breakdown voltage of 20 V, for example, in Embodiment 1. The second advantage is that a switching element having a higher withstand voltage, for example, 100 V, is used, and the drive circuit 5 includes transistors CP1 and CP2, for example, with a withstand voltage of 80 V, as the third element. In the first embodiment, in the blocking state, the voltage from the gate of the switching element QN2 to the switching element QN3, the voltage from the source to the drain of the transistor AP2, and the voltage from the gate to the source of the transistor BP2 are equal. The drain-source breakdown voltage of the element is limited by the gate-source breakdown voltage (generally about 20V) of the transistor BP2. In contrast, in the sixth embodiment, the voltage that can be applied between the drains and sources of the switching elements QHN1, QHN2, and QHN3 is limited to the gate-source withstand voltage of the transistors BP1 and BP2, which are the second elements of the drive circuit 5. The characteristic is that it is not. Other than this, the configuration and effects are the same as those of the first embodiment, so the explanation will focus on the points that are different from the first embodiment, and redundant explanations will be omitted.

The semiconductor device 20 of Example 6 is basically the same as the semiconductor device 10 of Example 1, but the drive circuit 5 includes a second element as the third element from the first stage to the m-1th stage. It has normally-off transistors CP1 and CP2 having a conductivity type. The gates of transistors CP1 and CP2, which are the third elements from the first stage to the m-1 stage, are connected to the sources of the switching elements QN2 and QN3 of the next stage, and the transistors from the second stage to the m-1 stage The transistor CP2, which is the third element, has a drain connected to the gate of the switching element QHN2 in the same stage, and the transistor AP2, which is the first element from the second stage to the m-1th stage, has a drain connected to the gate of the switching element QHN2 in the same stage. The transistor CP1, which is the third element in the first stage, is connected to the gate of the switching element QHN2 in the same stage through the transistor CP2, which is the third element, and the signal from the second gate drive circuit 4 is connected to the drain of the transistor CP1, which is the third element in the first stage. The transistor AP1, which is the first element in the first stage, receives the signal from the second gate drive circuit 4 through the transistor CP1, which is the third element in the first stage, and A signal from the second gate drive circuit 4 is input to the gate of the transistor BP1, which is the second element, through the transistor CP1, which is the third element in the first stage.

When the first element in the first stage is the transistor AP1 as in the first embodiment, the drain of the transistor AP1 is connected to the second gate drive circuit 4 via the transistor CP1, which is the third element in the same stage. , a signal from the second gate drive circuit 4 is input.

Note that Embodiment 6 may be combined with Embodiment 2, and when the first element in the first stage is the diode D1 as in Embodiment 2, the anode of the diode D1 is the third element in the same stage. It may be connected to the second gate drive circuit 4 via the transistor CP1, and a signal from the second gate drive circuit 4 may be input.

In the sixth embodiment, the breakdown voltage of the switching elements QHN1, QHN2, and QHN3 is set to 100V, for example, but switching elements having any breakdown voltage may be used. Furthermore, although the breakdown voltage of the transistors CP1 and CP2, which are the third elements, is set to 80V, for example, transistors having any breakdown voltage may be used.

Next, an example of the operation of the semiconductor device 20 of Example 6 will be described.

The operation during blocking is the same as in the first embodiment except that the transistors CP1 and CP2 are turned off at the same timing as the transistors AP1 and AP2, respectively. As a result, the switching elements QHN1, QHN2, and QHN3 connected in series and the transistors CP1, AP1, CP2, and AP2 connected in series are turned off in conjunction with each other, and high withstand voltage performance is exhibited.

In the sixth embodiment, the breakdown voltages of the switching elements QHN1, QHN2, and QHN3 are each 100 V, and the breakdown voltages of the transistors CP1 and CP2 are each as high as 80 V, so that the breakdown voltage of the semiconductor device 20 is as high as 300 V.

The operation during conduction is the same as in the first embodiment except that the transistors CP1 and CP2 are turned on at the same timing as the transistors AP1 and AP2, respectively.

The operation during reverse conduction is the same as in the first embodiment except that the transistors CP1 and CP2 are turned on at the same timing as the transistors AP1 and AP2, respectively.

The operation when a short circuit failure occurs in the switching element is the same as in the first embodiment except that the transistors CP1 and CP2 are turned off at the same timing as the transistors AP1 and AP2, respectively.

In the sixth embodiment, the breakdown voltage of the switching element QHN2 in the second stage is the sum of the breakdown voltage of the transistor CP1, which is the third element in the first stage, and the breakdown voltage of the transistor AP1, which is the first element in the first stage. be able to. The same applies to the subsequent stages. Therefore, according to the sixth embodiment, the voltage that can be applied between the drains and sources of the switching elements QHN1, QHN2, and QHN3 is not limited to the gate-source breakdown voltage of the transistors BP1 and BP2, which are the second elements of the drive circuit 5. , the source-drain breakdown voltage and gate-source breakdown voltage of each power transistor can be designed independently, and a semiconductor device with a high degree of freedom in design and manufacturing can be realized.

Note that the configurations of the third to fifth embodiments are not limited to the combination with the second embodiment, and the configurations of the third to fifth embodiments may be applied to the sixth embodiment.

FIG. 7 is a circuit diagram showing the configuration of a semiconductor device of Example 7.

Embodiment 7 is a modification of Embodiment 6, and the difference from Embodiment 6 is that the drive circuit 5 is connected in antiparallel to each other as the fourth element from the 1st stage to the m-1th stage. Transistors CP1 and CP2, which are the third elements from the first stage to the m-1th stage, have diodes E1 and E2, which have gates connected in antiparallel to each other and are the fourth elements of the same stage. This point is connected to the sources of the next-stage switching elements QHN2 and QHN3 via diodes E1 and E2. According to the seventh embodiment, the turn-off operation is faster than that of the sixth embodiment. Other than this, the configuration and effects are the same as those of the sixth embodiment, so the explanation will focus on the points that are different from the sixth embodiment, and redundant explanation will be omitted.

The operation of the seventh embodiment will be explained by taking as an example the operation when the output of the first gate drive circuit 3 changes from an on signal (for example, 15 V) to an off signal (for example, 0 V or less).

The off signal from the first gate drive circuit 3 causes the switching element QHN1 to transition from the on state to the off state, and the potential of the drain of the switching element QHN1 increases. When the drain potential of the switching element QHN1 rises to 15 V or more, the transistor AP1 first transitions from the on state to the off state, and the transistor BP1 transitions from the off state to the on state.

At this time, the gate voltage of the transistor CP1 is lower than the gate voltage of the transistor AP1 by the built-in potential of the diodes E1 connected in antiparallel to each other, so that it has not yet transitioned to the off state. Therefore, the gate and source of switching element QHN2 are at the same potential, and switching element QHN2 is turned off. Further, when the drain potential of the switching element QHN1 increases, the transistor CP1 changes from the on state to the off state.

Since the switching element QHN2 transitions to the OFF state, the drain potential of the switching element QHN2 increases, first the transistor AP2 transitions from the ON state to the OFF state, and the transistor BP2 transitions from the OFF state to the ON state.

At this time, the gate voltage of the transistor CP2 is lower than the gate voltage of the transistor AP2 by the built-in potential of the diodes E2 connected in antiparallel to each other, so that it has not yet transitioned to the off state. Therefore, the gate and source of switching element QHN3 are at the same potential, and switching element QHN3 is turned off. Further, when the drain potential of the switching element QHN2 increases, the transistor CP2 changes from the on state to the off state.

Since switching element QHN3 has transitioned to the off state, the drain potential of switching element QHN3 increases.

Through the series of operations described above, the series-connected switching elements QHN1, QHN2, and QHN3 and the series-connected transistors CP1, AP1, CP2, and AP2 are turned off in conjunction with each other, and high withstand voltage performance is exhibited.

In the seventh embodiment, as described above, the transistor AP1 is turned off earlier than the transistor CP1, and the transistor AP2 is turned off earlier than the transistor CP2, so that the source-drain voltage of the transistors AP1 and AP2 that are in the off state increases quickly. As a result, transistors BP1 and BP2 are turned on faster. Since the transistors BP1 and BP2 are turned on quickly, the charges accumulated in the gates of the switching elements QHN2 and QHN3 are quickly discharged, so that the switching elements QHN2 and QHN3 are turned off quickly.

Note that, similar to the sixth embodiment, the configurations of the second to fifth embodiments may be applied to the seventh embodiment.

Embodiment 8 is a modification of Embodiments 6 and 7, and the difference from Embodiment 6 is that the drive circuit 5 includes a transistor CP1 which is the third element from the 1st stage to the m-1th stage. , CP2 is smaller than the absolute value of the gate thresholds of transistors AP1 and AP2, which are the first elements of the same stage. The difference from Embodiment 7 is that in Embodiment 7, the timing at which the third elements, transistors CP1 and CP2, are turned off is determined by the diodes E1 and E2, which are connected in antiparallel to each other, than the first element, transistors AP1 and AP2. However, in the eighth embodiment, this is achieved by adjusting the absolute value of the gate threshold value. According to the eighth embodiment, similar to the seventh embodiment, the turn-off operation is faster than the sixth embodiment.

The circuit configuration of the eighth embodiment is the same as that in FIG. Note that the configuration of the eighth embodiment may be applied to the seventh embodiment, and the absolute value of the gate threshold value in the circuit configuration of FIG. 7 may be set as in the eighth embodiment.

Other than this, the configuration and effects are the same as those of the sixth embodiment, so redundant explanation will be omitted.

Example 9 is an example of a power conversion device.

The semiconductor device 10 or 20 described in any one of Examples 1 to 8, or a semiconductor device obtained by appropriately combining Examples 1 to 8, can be used as a switching element of a power conversion device. Since the configuration of the power conversion device is common, detailed explanation will be omitted.

Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations described in the embodiments, and various changes can be made within the scope of the technical idea of the present invention. Further, some or all of the configurations described in each embodiment may be combined and applied.

1... Source terminal 2... Drain terminal 3... First gate drive circuit 4... Second gate drive circuit 5... Drive circuit 10, 20... Semiconductor device AP1, AP2, AN1, AN2... Transistor (first element)
BP1, BP2, BN1, BN2...Transistor (second element)
CP1, CP2...transistor (third element)
D1...diode (first element)
E1, E2...Diodes (fourth element) connected in antiparallel to each other
QN1, QN2, QN3, QP1, QP2, QP3, QHN1, QHN2, QHN3...switching element

Claims (17)

A semiconductor device comprising a plurality of switching elements connected in series in multiple stages and a drive circuit for driving the plurality of switching elements,
When m is an integer of 3 or more, the plurality of switching elements connected in series in multiple stages have switching elements from the first stage to the mth stage connected in series with each other,
The drive circuit has a plurality of elements from a first stage to an m-1 stage for driving the switching element of the next stage,
A gate drive signal for controlling on/off of the switching element in the first stage is input from a first gate drive circuit to the gate of the switching element in the first stage,
A signal independent from the gate drive signal and for driving the switching elements in the second and subsequent stages is input from a second gate drive circuit to the element in the first stage of the drive circuit,
The drive circuit includes:
When the switching element in the first stage is in the on state, the switching elements in the second and subsequent stages are also in the on state,
When the switching element in the first stage is in the off state and in the voltage blocking state, the switching elements in the second and subsequent stages are also in the off state and in the voltage blocking state,
When the switching element in the first stage is in the off state and in reverse conduction operation, the switching elements in the second and subsequent stages are in the on state,
A semiconductor device that controls the plurality of switching elements. In claim 1,
A semiconductor device, wherein an on signal is input from the second gate drive circuit when the switching element in at least the first stage is in an on state or in reverse conduction operation. In claim 2,
A semiconductor device, wherein an on signal is always inputted from the second gate drive circuit during normal operation of the plurality of switching elements. In claim 1,
The plurality of switching elements are transistors having a first conductivity type,
A semiconductor device, wherein the drive circuit includes a normally-off transistor having at least a second conductivity type. In claim 4,
A semiconductor device, wherein at least the switching elements in the second and subsequent stages are normally-off transistors. In claim 4,
A semiconductor device, wherein at least the switching elements in the second and subsequent stages are normally-on transistors. 5. The semiconductor device according to claim 4, wherein the first conductivity type is an n-type, and the second conductivity type is a p-type. 5. The semiconductor device according to claim 4, wherein the first conductivity type is a p-type, and the second conductivity type is an n-type. In claim 4,
a source terminal connected to the source of the switching element in the first stage;
and a drain terminal connected to the drain of the m-th switching element,
The sources of the switching elements in the second and subsequent stages are connected to the drains of the switching elements in the previous stage,
The drive circuit includes:
a first stage first element configured with a normally-off transistor or diode having the second conductivity type;
first elements from the second stage to the m-1 stage, each of which is composed of normally-off transistors having the second conductivity type;
and second elements from the first stage to the m-1 stage, each of which is composed of normally-off transistors having the second conductivity type;
The first elements from the second stage to the m-1 stage are:
a drain is connected to the gate of the switching element in the same stage,
a gate is connected to a source of the switching element of the next stage,
a source is connected to the gate of the switching element of the next stage,
The second elements from the second stage to the m-1 stage are:
the drain is connected to the source of the switching element in the next stage or the same stage,
a gate is connected to the gate of the switching element in the same stage,
a source is connected to the gate of the switching element of the next stage,
The second element in the first stage is
the drain is connected to the source of the switching element in the next stage or the same stage,
the signal from the second gate drive circuit is input to the gate,
A semiconductor device characterized in that a source is connected to a gate of the switching element of the next stage. In claim 9,
The first element in the first stage is a normally-off transistor having the second conductivity type,
The signal from the second gate drive circuit is input to the drain,
a gate is connected to a source of the switching element of the next stage,
A semiconductor device characterized in that a source is connected to a gate of the switching element of the next stage. In claim 9,
The first element in the first stage is the diode,
The signal from the second gate drive circuit is input to the anode when the first conductivity type is n type, and to the cathode when the first conductivity type is p type,
A semiconductor characterized in that a cathode is connected to the gate of the second-stage switching element when the first conductivity type is n-type, and an anode is connected to the gate of the second-stage switching element when the first conductivity type is p-type. Device. In claim 9,
A semiconductor device, wherein the drains of the second elements from the first stage to the m-1th stage are connected to the sources of the switching elements of the next stage. In claim 9,
A semiconductor device characterized in that the drains of the second elements from the first stage to the m-1th stage are connected to the sources of the switching elements in the same stage. In claim 9,
The drive circuit includes third elements from a first stage to an m-1 stage that are composed of normally-off transistors having the second conductivity type, and
The third elements from the first stage to the m-1th stage have their gates connected to the sources of the switching elements of the next stage,
The third elements from the second stage to the m-1 stage have their drains connected to the gates of the switching elements in the same stage,
The drains of the first elements from the second stage to the m-1 stage are connected to the gates of the switching elements at the same stage via the third elements at the same stage,
The signal from the second gate drive circuit is input to the drain of the third element in the first stage, and
The first element in the first stage receives the signal from the second gate drive circuit via the third element in the first stage,
A semiconductor device, wherein the second element in the first stage has the signal from the second gate drive circuit inputted to the gate via the third element in the first stage. In claim 14,
The drive circuit has fourth elements from a first stage to an m-1 stage each composed of diodes connected in antiparallel to each other,
A semiconductor characterized in that the third elements from the first stage to the m-1th stage have their gates connected to the source of the switching element at the next stage via the fourth element at the same stage. Device. In claim 14,
A semiconductor device characterized in that the absolute value of the gate threshold value of the third element from the first stage to the m-1th stage is smaller than the absolute value of the gate threshold value of the first element at the same stage. A power conversion device characterized in that the semiconductor device according to any one of claims 1 to 16 is used as a switching element.

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