JP2023104630A - Power shutdown protection circuit, power shutdown protection controller, and data storage device - Google Patents

Abstract

To provide a power shutdown protection circuit with reduced power consumption.SOLUTION: A first switching power supply 110 can switch between a step-up mode and a step-down mode. In the step-up mode, a bus voltage VBUS of a first output line 108 is stepped up to charge a backup capacitor 102. In the step-down mode, a voltage VSTR of the backup capacitor 102 is stepped down and supplied to the first output line 108. An electron fuse circuit 220 is provided between a first input line 104 and the first output line 108, and can electrically switch between an ON state and an OFF state. A second switching power supply 120 steps down a first input voltage VIN to a power supply voltage VDD lower than 5 V, and supplies the resultant to a second load 22.SELECTED DRAWING: Figure 2

Description

The present disclosure relates to power interruption protection circuits.

A stable power supply voltage is essential for electronic components. In a storage device such as a solid state drive or a hard disk, if the power supply voltage is interrupted momentarily, the stored data may be destroyed or lost. Even after the input voltage is cut off, it is required to maintain the power supply voltage during the period when the load performs necessary protection processing such as data saving. Such functions are called power interruption protection, PLP (Power Loss Protection), PLI (Power Loss Imminent), PFP (Power Failure Protection), and the like.

FIG. 1 is a block diagram of a system with PLP functionality. The system 2 comprises a main power supply 10 , a load 20 and a power interruption protection circuit 30 . Main power supply 10 produces an input voltage V _IN of the order of 12V.

A power interruption protection circuit 30 is provided between the main power supply 10 and the load 20 . The power interruption protection circuit 30 includes a switch 32 , a backup capacitor 34 and a step-up/step-down bidirectional DC/DC converter 36 .

The switch 32 is also called an electronic fuse, and is provided on a power supply line 38 that connects the main power supply 10 and the load 20 . As long as a valid input voltage V _IN is present, the switch 32 will be on and the input voltage V _IN will be provided to the load 20 as the supply voltage V _DD . The DC/DC converter 36 has an input terminal IN connected to the power supply line 38 and an output terminal OUT connected to the backup capacitor 34 . The DC/DC converter 36 boosts the input voltage _VIN and charges the backup capacitor 34 while the input voltage _VIN is being supplied. Assuming that the capacitance of the backup capacitor 34 is C and the voltage generated in the backup capacitor 34 is _VSTR , the charge Q and energy E stored in the backup capacitor 34 are expressed by the following equations.
Q=C・V _STR
E is E=C·V _STR ² /2

When the input voltage V _IN is lost, the DC/DC converter 36 switches to step-down mode, and the power interruption protection circuit 30 supplies the power stored in the backup capacitor 34 to the load 20 .

JP 2021-5924 A

The power interruption protection circuit 30 is no exception to the recent demand for lower power consumption.

In the power interruption protection circuit 30 of FIG. 1, the power of the power interruption protection circuit 30 itself is covered by the power stored in the backup capacitor 34 in the power loss state. Since SSD (Solid State Drive) applications are sensitive to heat, it is required to reduce the power consumption of the entire circuit in order to reduce heat generation. In addition, the more the power consumption of the power interruption protection circuit 30 is reduced, the longer the time during which power can be supplied to the load 20 in the power failure state.

The present disclosure has been made in view of such problems, and one exemplary purpose of certain aspects thereof is to provide a power interruption protection circuit with reduced power consumption.

A power interruption protection circuit according to one aspect of the present disclosure includes a first input line to receive a first input voltage, a first output line to be connected to a first load, and a second output to be connected to a second load. line, the backup capacitor, and a step-up mode and a step-down mode, which are connected to the first output line and the backup capacitor; in the step-up mode, the bus voltage of the first output line is stepped up to charge the backup capacitor; a first switching power supply for stepping down the voltage of the backup capacitor and supplying it to the first output line in the step-down mode; and a second switching power supply that steps down the first input voltage to a power supply voltage lower than 5V and supplies it to a second load. A driver circuit of the first switching power supply is operable upon receiving the power supply voltage.

Another aspect of the present disclosure is a power interruption protection controller. This power interruption protection controller is connected to an input pin to receive an input voltage, an output pin to be connected to a first load, a capacitor connection pin to which a backup capacitor is connected, and an output pin via a first external inductor. a first switching pin to be connected to a second load via a second external inductor; a power supply pin to be connected to the second load; a first switching pin, an output pin and a capacitor connection; A step-up/step-down bidirectional DC/DC converter connected to the pin and capable of reversing the direction of power transmission together with the first inductor, stabilizing the voltage of the backup capacitor to a first target level in the step-up mode, and, in the step-down mode, A first converter block for stabilizing the voltage of the output pin to the second target level is connected to the second switching pin and the output pin, constitutes a step-down converter together with the second inductor, and the voltage supplied to the second load is 5V. A second converter block stabilized to a lower third target level, and an electronic fuse circuit provided on a power supply line connecting an input pin and an output pin and capable of electrically switching between an ON state and an OFF state. The driver circuit of the first converter block operates using the voltage of the power supply pin as a power supply.

Yet another aspect of the present disclosure is also a power interruption protection controller. This power interruption protection controller is connected to an input pin to receive an input voltage, an output pin to be connected to a first load, a capacitor connection pin to which a backup capacitor is connected, and an output pin via a first external inductor. a first switching pin to be connected to the output pin via a second external inductor; a third switching pin to be connected to the second load via a third external inductor; 2, connected to a power supply pin to be connected with a load, a first switching pin and a capacitor connection pin, forming a boost converter together with a first inductor, active in a boost mode, and stabilizing the voltage of the backup capacitor to a first target level; a first converter block, a second converter block connected to the second switching pin and the capacitor connection pin, forming a first buck converter together with the second inductor, and stabilizing the voltage of the output pin to a second target level; a third converter block connected to the switching pin and the output pin and forming a second step-down converter together with a third inductor to regulate the voltage supplied to the second load to a third target level below 5V; an input pin and an output; an electronic fuse circuit provided on a power supply line connecting the pins and capable of electrically switching between an ON state and an OFF state. The driver circuits of the first converter block and the second converter block operate using the voltage of the power supply pin as a power supply.

Arbitrary combinations of the above constituent elements, and mutually replacing constituent elements and expressions among methods, devices, systems, etc. are also effective as embodiments of the present invention or the present disclosure. Furthermore, the description in this section (Summary of the Invention) does not describe all the essential features of the invention, and thus subcombinations of those described features can also be the invention. .

According to an aspect of the present disclosure, power consumption can be reduced.

FIG. 1 is a block diagram of a system with PLP functionality. FIG. 2 is a block diagram of a system including the power interruption protection circuit according to the first embodiment. FIG. 3 is a waveform diagram for explaining the operation of the power interruption protection circuit of FIG. FIG. 4 is a diagram showing gate-source voltages of switching elements of the first switching power supply. FIG. 5 is a circuit diagram of a power interruption protection circuit according to the first embodiment. FIG. 6 is a circuit diagram of a power interruption protection circuit according to the second embodiment. FIG. 7 is a circuit diagram of a power interruption protection circuit according to the third embodiment. FIG. 8 is a circuit diagram of a power interruption protection circuit according to the fourth embodiment. FIG. 9 is a block diagram of a system including a power interruption protection circuit according to the second embodiment. FIG. 10 is a block diagram of a data storage device with PLP functionality.

(Overview of embodiment)
SUMMARY OF THE INVENTION Several exemplary embodiments of the disclosure are summarized. This summary presents, in simplified form, some concepts of one or more embodiments, as a prelude to the more detailed description that is presented later, and for the purpose of a basic understanding of the embodiments. The size is not limited. This summary is not a comprehensive overview of all possible embodiments, and it is intended to neither identify key elements of all embodiments nor delineate the scope of some or all aspects. For convenience, "one embodiment" may be used to refer to one embodiment (example or variation) or multiple embodiments (examples or variations) disclosed herein.

A power interruption protection circuit according to one embodiment includes a first input line to receive a first input voltage, a first output line to be connected to a first load, and a second output line to be connected to a second load. and the backup capacitor, which can switch between a boost mode and a buck mode, is connected to the first output line and the backup capacitor, and in the boost mode, boosts the bus voltage of the first output line to charge the backup capacitor, In the step-down mode, a first switching power supply for stepping down the voltage of the backup capacitor and supplying it to the first output line is provided between the first input line and the first output line, and the ON state and the OFF state are electrically switched. A switchable electronic fuse circuit and a second switching power supply for stepping down a first input voltage to a power supply voltage below 5V and supplying a second load. A driver circuit of the first switching power supply is operable upon receiving the power supply voltage.

In this configuration, the power supply voltage generated for the second load by the second switching power supply is used to drive the first switching power supply. As a result, the switching element that constitutes the first switching power supply is switched at a power supply voltage lower than 5V, and the power consumption of the first switching power supply can be reduced compared to switching at 5V.

By reducing the power consumption of the first switching power supply, it is possible to extend the operation time of the load at the time of power failure, or reduce the capacity of the backup capacitor that provides the same load operation time.

In one embodiment, the driver circuit of the second switching power supply may be operable upon receiving the power supply voltage. As a result, power consumption can be reduced as compared with the case where the driver circuit of the second switching power supply is operated at 5V.

In one embodiment, the second load may be power management circuitry.

In one embodiment, the power supply voltage may be 3.3V.

In one embodiment, the first load may include a buck converter.

In one embodiment, the power interruption protection circuit receives a second input voltage of 5V and includes a second input line to be connected to a third load, a load switch provided on the path of the second input line, may be further provided. The power interruption protection circuit may be capable of supplying the second input voltage to the second load when the first input voltage is lost. This makes it possible to provide a more robust power interruption protection circuit.

In one embodiment, the first switching power supply may include a step-up/step-down bidirectional DC/DC converter capable of reversing the direction of power transmission between step-up mode and step-down mode.

In one embodiment, the power interruption protection circuit may further include a protection switch connected between the inductor of the step-up/step-down bidirectional DC/DC converter and the first output line. If the backup capacitor fails in the short mode, the power supply to the load can be continued by turning off the protection switch.

In one embodiment, the first switching power supply is active in a boost mode, a boost converter having an input node connected to the first output line and an output node connected to the backup capacitor, and active in the boost mode and the buck mode. and a step-down converter having an input node connected to the first output line and an output node connected to the backup capacitor. In a configuration using a bidirectional DC/DC converter, a power supply voltage may drop due to control delay associated with switching of the operation mode of the bidirectional DC/DC converter. On the other hand, in a configuration where the first switching power supply includes a boost converter and a buck converter, the buck converter is kept in operation at all times. The power stored in the backup capacitor can be quickly supplied to the load.

In one embodiment, the power interruption protection circuit may further include a protection switch connected between the inductor of each of the boost converter and the buck converter and the first output line. If the backup capacitor fails in the short mode, the power supply to the load can be continued by turning off the protection switch.

In one embodiment, the first load and the second load may be SSD (Solid State Drive) components. Applications of SSDs (Solid State Drives) are vulnerable to heat, so it is required to reduce the power consumption of the entire circuit in order to reduce heat generation. The power interruption protection circuit described above is suitable for SSD applications because its power consumption can be reduced.

A data storage device according to an embodiment may include any of the power interruption protection circuits described above.

A power interruption protection controller according to one embodiment includes an input pin to receive an input voltage, an output pin to be connected to a first load, a capacitor connection pin to which a backup capacitor is connected, and an external first inductor. a first switching pin to be connected to an output pin, a second switching pin to be connected to a second load via a second external inductor, a power supply pin to be connected to the second load, a first switching pin, an output a step-up/step-down bidirectional DC/DC converter connected to a pin and a capacitor connection pin and capable of reversing the direction of power transmission together with the first inductor, stabilizing the voltage of the backup capacitor to a first target level in the step-up mode; In buck mode, the first converter block for stabilizing the voltage of the output pin to the second target level is connected to the second switching pin and the output pin, constitutes a buck converter together with the second inductor, and is supplied to the second load. a second converter block that stabilizes the voltage to a third target level lower than 5 V; an electronic fuse circuit that is provided on a power supply line that connects the input pin and the output pin and that can be electrically switched between an on state and an off state; Prepare. The driver circuit of the first converter block operates using the voltage of the power supply pin as a power supply.

In one embodiment, the driver circuit of the second converter block may be powered by the voltage of the power pin.

In one embodiment, the power interruption protection controller may further comprise an inductor connection pin to be connected with one end of the first inductor, and a protection switch connected between the output pin and the inductor connection pin. If the backup capacitor fails in the short mode, the power supply to the load can be continued by turning off the protection switch.

A power interruption protection controller according to one embodiment includes an input pin to receive an input voltage, an output pin to be connected to a first load, a capacitor connection pin to which a backup capacitor is connected, and an external first inductor. A first switching pin to be connected to the output pin, a second switching pin to be connected to the output pin via a second external inductor, and a third switching pin to be connected to the second load via a third external inductor. A switching pin, a power supply pin to be connected to a second load, a first switching pin and a capacitor connection pin are connected to form a boost converter together with a first inductor, which is active in a boost mode to raise the voltage of the backup capacitor to a first target level. and a second converter block connected to the second switching pin and the capacitor connection pin, forming a first step-down converter together with the second inductor, and stabilizing the voltage at the output pin to the second target level. and a third converter block connected to the third switching pin and the output pin, forming a second buck converter together with the third inductor, for stabilizing the voltage supplied to the second load to a third target level below 5V. and an electronic fuse circuit provided on a power supply line connecting the input pin and the output pin and capable of electrically switching between an ON state and an OFF state. The driver circuits of the first converter block and the second converter block operate using the voltage of the power supply pin as a power supply.

In one embodiment, the driver circuit of the third converter block may be powered by the voltage of the power pin.

In one embodiment, an inductor connection pin to be connected to one end of the first inductor and one end of the second inductor, and a protection switch connected between the output pin and the inductor connection pin may be further provided.

In one embodiment, the power interruption protection controller may be integrated on a single semiconductor substrate. "Integrated integration" includes cases in which all circuit components are formed on a semiconductor substrate and cases in which the main components of a circuit are integrated. A resistor, capacitor, or the like may be provided outside the semiconductor substrate. By integrating the circuits on one chip, the circuit area can be reduced and the characteristics of the circuit elements can be kept uniform.

The first load and the second load may be parts of an SSD (Solid State Drive).

(embodiment)
Preferred embodiments will be described below with reference to the drawings. The same or equivalent constituent elements, members, and processes shown in each drawing are denoted by the same reference numerals, and duplication of description will be omitted as appropriate. Moreover, the embodiments are illustrative rather than limiting the invention, and not all features and combinations thereof described in the embodiments are necessarily essential to the invention.

In the present specification, "a state in which member A is connected to member B" refers to a case in which member A and member B are physically directly connected, as well as a case in which member A and member B are electrically connected. Indirect connection through other members that do not affect the connected state or impede the function is also included. Further, "the state in which the member C is provided between the member A and the member B" means the case where the member A and the member C or the member B and the member C are directly connected, as well as the case where the electrical connection is made. It also includes the case of being indirectly connected through other members that do not affect the state or impede the function.

(Embodiment 1)
FIG. 2 is a block diagram of the system 2 including the power interruption protection circuit 100 according to the first embodiment. The system 2 comprises a main power supply 10 , a first load 21 , a second load 22 and a power interruption protection circuit 100 .

The main power supply 10 is, for example, an AC/DC converter or a USB (Universal Serial Bus) bus, and supplies a DC input voltage _VIN at a predetermined first voltage level (hereinafter referred to as 12V) to the power interruption protection circuit 100. .

The power interruption protection circuit 100 receives an input voltage V _IN , supplies a bus voltage V _BUS to a first load 21 and supplies a power supply voltage V _DD to a second load 22 . The second load 22 is a circuit that operates at a voltage lower than 5V, so the power supply voltage V _DD is lower than 5V, for example 3.3V. For example, the second load 22 may be a PMIC (Power Management IC) operating with an input voltage of 3.3V.

The power interruption protection circuit 100 includes an input line 104 , a first output line 108 , a second output line 109 , an electronic fuse circuit 220 , a backup capacitor 102 , a first switching power supply 110 and a second switching power supply 120 .

A bus line connects between the main power supply 10 and the first load 21 . An electronic fuse circuit 220 is provided on the bus line. Among the bus lines, the main power supply 10 side of the electronic fuse circuit 220 is referred to as an input line 104 , and the first load 21 side of the electronic fuse circuit 220 is referred to as a first output line 108 . An input voltage V _IN is supplied to the input line 104 . A first load 21 is connected to the first output line 108 . A second load 22 is connected to the second output line 109 .

The electronic fuse circuit 220 is provided between the input line 104 and the output line 108 and can be electrically switched between an ON state and an OFF state.

Backup capacitor 102 is connected to backlap line 106 .

A first switching power supply 110 is connected to the output line 108 and the backup capacitor 102 . The first switching power supply 110 can switch between a step-up mode and a step-down _mode . This charging stabilizes the voltage V _STR of the backup capacitor 102 to a predetermined target level V _{REF (BOOST)} . The target level V _{REF (BOOST)} in the boost mode is set higher than the input voltage _VIN . Below, V _REF(BOOST) =48V can be used.

The first switching power supply 110 steps down the voltage V _STR of the backup capacitor 102 and supplies it to the output line 108 in the step-down mode. In buck mode, the bus voltage V _BUS is stabilized to a predetermined target level V _REF(BUCK) . The target level V _{REF (BUCK)} in the step-down mode is set to the same extent as the input voltage _VIN . In the following, V _REF(BUCK) =12V.

The second switching power supply 120 steps down the input voltage _VIN to a power supply voltage _VDD lower than 5V and supplies it to the second load 22 . The target level V _REF ( _VDD ) of the power supply voltage V _DD is lower than 5 V, and is assumed to be 3.3 V below.

The first switching power supply 110 may be a combination of a step-up converter and a step-down converter, or may be a bidirectional DC/DC converter. In any case, it is understood that first switching power supply 110 includes at least inductor L1, switching element M1, driver circuit DR1, and the like.

The power supply terminal of the driver circuit DR1 is supplied with the power supply voltage V _DD generated by the second switching power supply 120, and the output voltage of the driver circuit DR1, that is, the high level of the gate-source voltage _VGS1 of the switching element M1 is It is based on the power supply voltage _VDD .

The second switching power supply 120 also includes at least an inductor L2, a switching element M2, a driver circuit DR2, and the like. The power supply terminal of the driver circuit DR2 is supplied with the power supply voltage V _DD generated by the second switching power supply 120, and the output voltage of the driver circuit DR2, that is, the high level of the gate-source voltage _VGS2 of the switching element M2 is It is based on the power supply voltage _VDD .

The power supply terminals of the driver circuits DR1 and DR2 can be supplied with the input voltage _VIN or the bus voltage _VBUS instead of the power supply voltage _VDD . As a result, the driver circuits DR1 and DR2 can be operated using the input voltage V _IN (V _BUS ) before the second switching power supply 120 is completely activated, that is, in a state where the power supply voltage V _DD is lower than 3.3V. can.

The above is the configuration of the power interruption protection circuit 100 . Next, the operation will be explained.

FIG. 3 is a waveform diagram for explaining the operation of the power interruption protection circuit 100 of FIG. The period before time _t0 is a normal operation period, and the power interruption protection circuit 100 is supplied with the input voltage V _IN of 12 V from the main power supply 10 . During the normal operation period, the electronic fuse circuit 220 is turned on and the first switching power supply 110 is set to the boost mode.

The voltage V _STR of the backup capacitor 102 is stabilized at the target level V _{REF (BOOST)} by the first switching power supply 110 in boost mode, and the energy E=1/2×C·V _STR ² is stored in the backup capacitor 102. It is

The second switching power supply 120 receives the bus voltage V _BUS , steps it down to generate a power supply voltage _VDD having a predetermined voltage level V _{REF (VDD)} , and supplies it to the second load 22 .

The gate-to-source voltage V _GS1 of the switching element M1 of the first switching power supply 110 switches with the power supply voltage V _DD as a high voltage. Similarly, the gate-to-source voltage V _GS2 of the switching element M2 of the second switching power supply 120 switches with the power supply voltage V _DD as the high voltage.

Suppose at time _t0 , the input voltage V _IN is lost. When a loss of input voltage _VIN is detected, electronic fuse circuit 220 is turned off and first switching power supply 110 is switched from boost mode to buck mode. When the first switching power supply 110 enters the step-down mode, the first switching power supply 110 stabilizes the bus line voltage V _BUS to the target level V _{REF (BUCK)} of the step-down mode. As a result, the bus voltage V _BUS continues to be supplied to the first load 21 even after the input voltage V _IN is lost.

After time _t0 , the second switching power supply 120 continues to operate, so that the second load 22 also continues to be supplied with the 3.3V power supply voltage _VDD .

After time _t0 , when power is supplied to the first load 21 and the second load 22, the energy stored in the backup capacitor 102 decreases. Therefore, the voltage V _STR of backup capacitor 102 decreases with time.

FIG. 4 is a diagram showing the gate-source voltage _VGS1 of the switching element M1 of the first switching power supply 110. As shown in FIG. The gate-source voltage _VGS1 of the switching element M1 is driven with the power supply voltage V _DD of 3.3V as high and 0V as low.

The above is the operation of the power interruption protection circuit 100 . Next, its advantages will be explained. The advantage of the power interruption protection circuit 100 becomes clear by comparison with the comparative technology.

The power cutoff protection circuit according to the comparative technique is obtained by omitting the second switching power supply 120 from the configuration of FIG. In the comparative technique, the driver circuit DR1 of the first switching power supply 110 is supplied with a power supply voltage of 5V. In the comparative technique, the gate-to-source voltage V _GS1 of the switching element M1 switches with 5V as the high level. In other words, the comparative technology has large switching losses.

On the other hand, in the present embodiment, the gate-source voltage V _GS1 of the switching element M1 switches with 3.3 V as the high level. In other words, the switching loss can be reduced compared to the comparative technique, and the power consumption of the power interruption protection circuit 100 can be reduced.

In the comparative technique, it is assumed that the power supply voltage of 5V is generated by stepping down the bus voltage _VBUS . The voltage V _STR of backup capacitor 102 in this case is indicated by a dashed line in FIG. In the comparative technique, since the switching loss of the first switching power supply 110 is large, the voltage V _STR of the backup capacitor 102 drops faster than the embodiment after power loss. In other words, in the embodiment, the voltage V _STR of backup capacitor 102 decreases at a slower rate due to reduced switching losses. That is, it is possible to extend the operation time of the loads 21 and 22 when the power is lost. Alternatively, the capacity of the backup capacitor 102 that provides the same load operating time can be reduced.

This disclosure extends to various apparatus and methods that can be grasped as the block diagram and circuit diagram of FIG. 2 or derived from the above description, and is not limited to any particular configuration. Hereinafter, more specific configuration examples and embodiments will be described not to narrow the scope of the present disclosure, but to help understand and clarify the essence and operation of the present disclosure and the present invention.

(Example 1)
FIG. 5 is a circuit diagram of the power interruption protection circuit 100A according to the first embodiment. In Example 1, the main part of the power interruption protection circuit 100A is integrated in the PLP controller 200A.

The first switching power supply 110A is a step-up/step-down bidirectional DC/DC converter whose power transmission direction can be reversed. The first switching power supply 110A includes a first converter block 270, a first inductor L1, and a bootstrap capacitor Cbs1.

The second switching power supply 120 includes a second converter block 272, an inductor L2, an output capacitor C2 and a bootstrap capacitor Cbs2.

First converter block 270 and second converter block 272 are integrated into PLP controller 200A.

An input voltage VIN is supplied to the input pin _VIN of the PLP controller 200A. A first load 21 is connected to the output pin VBUS. A backup capacitor 102 is connected to the capacitor connection pin STR. The first switching pin LX1 is connected to the output pin VBUS and the first load 21 through the first inductor L1.

The second switching pin LX2 is connected to the second load 22 via the second inductor L2.

A power supply pin VDD is connected to the output node of the second switching power supply 120 , that is, the second load 22 .

The PLP controller 200A comprises an electronic fuse circuit 220, control logic 240A, a first converter block 270, a second converter block 272, and an internal power supply circuit 290.

Internal power supply circuit 290 is, for example, an LDO (Low Drop Output). It receives the input voltage V _IN and the bus voltage V _BUS through a diode OR circuit, operates with the higher one of the two voltages as an input, and generates the internal power supply voltage V _REG . The internal power supply voltage V _REG is supplied to each block of the PLP controller 200A including the control logic 240A.

First converter block 270 is connected to first switching pin LX1, output pin VBUS and capacitor connection pin STR, and together with first inductor L1 and bootstrap capacitor Cbs1 constitutes first switching power supply 110A, which is a bidirectional DC/DC converter. do.

The first converter block 270 includes a feedback controller 271, driver circuits DR1H and DR1L, a high side transistor M1H and a low side transistor M1L.

A first feedback voltage VFB1x corresponding to the voltage _VSTR of the backup capacitor 102 is fed back to the first feedback pin _FB1x . In the boost mode, the feedback controller 271 performs feedback control so that the first feedback voltage _VFB1x approaches the reference voltage _VREF , and as a result, the voltage _VSTR of the backup capacitor 102 reaches the first target level _VREF(BOOST). stabilized.

A second feedback voltage VFB1y corresponding to the bus voltage _VBUS is fed back to the second feedback pin _FB1y . In the buck mode, the feedback controller 271 performs feedback control so that the second feedback voltage _VFB1y approaches the reference voltage _VREF , and as a result, the voltage _VBUS of the output pin VBUS reaches the second target level _VREF(BUCK). stabilized.

A diode D1 and a bootstrap capacitor Cbs1 constitute a bootstrap circuit. The power supply voltage _VDD generated by the second switching power supply 120 is supplied to the anode of the diode D1. As a result, a voltage higher than the LX1 pin by _VDD is generated at the BST1 pin. A power supply terminal of the high side driver circuit DR1H is connected to the BST1 pin. As a result, the gate-source voltage of the high-side transistor M1H is driven with 0 V as the low voltage and _VDD as the high voltage.

The power supply voltage _VDD is also supplied to the power supply terminal of the low side driver circuit DR1L. As a result, the gate-source voltage of the low-side transistor M1L is driven with 0 V as the low voltage and _VDD as the high voltage.

The second converter block 272 is connected to the second switching pin LX2 and the output pin VBUS, and constitutes the second switching power supply 120 together with the second inductor L2 and the bootstrap capacitor Cbs2.

The second converter block 272 includes a feedback controller 273, driver circuits DR2H and DR2L, a high side transistor M2H and a low side transistor M2L.

A third feedback voltage VFB2 corresponding to the power supply voltage _VDD generated by the second switching power supply 120 is fed back to the third feedback pin _FB2 . The feedback controller 273 performs feedback control so that the third feedback voltage _VFB2 approaches the reference voltage _VREF , and as a result, the power supply voltage _VDD is stabilized at the third target level _{VREF (VDD)} .

A diode D2 and a bootstrap capacitor Cbs2 form a bootstrap circuit. A power supply voltage V _DD is supplied to the diode D2. As a result, a voltage higher than that of the LX2 pin by _VDD is generated at the BST2 pin. A power supply terminal of the high side driver circuit DR2H is connected to the BST2 pin. As a result, the voltage between the gate and source of the high-side transistor M2H is driven with 0 V as the low voltage and _VDD as the high voltage.

The power supply voltage _VDD is also supplied to the power supply terminal of the low side driver circuit DR2L. As a result, the gate-source voltage of the low-side transistor M2L is driven with 0 V as the low voltage and _VDD as the high voltage.

The control logic 240A controls the ON/OFF of the electronic fuse circuit 220 and controls the operation mode of the first switching power supply 110A.

The above is the configuration of the PLP controller 200A.

(Example 2)
FIG. 6 is a circuit diagram of a power interruption protection circuit 100B according to the second embodiment. In Example 2, the main part of the power interruption protection circuit 100B is integrated in the PLP controller 200B.

PLP controller 200B adds protection switch 260 and inductor connection pin VB. A first inductor L1 is connected to the VBUS pin through a protection switch 260 . That is, the inductor L1 and the VBUS pin can be electrically separated.

Specifically, the first inductor L1 is externally attached between the VB pin and the LX1 pin. A protection switch 260 is connected between the VBUS and VB pins.

Control logic 240 B controls protection switch 260 . The control logic 240B turns on the protection switch 260 in the step-up mode and the step-down mode. For example, control logic 240B turns off protection switch 260 upon detecting a short mode failure of backup capacitor 102 (STR pin shorted to ground). Additionally, control logic 240B may turn off protection switch 260 upon detecting a ground fault on the LX pin.

According to the second embodiment, in a situation where the backup capacitor 102 fails in the short mode, the VBUS pin can be isolated from the failure point, and power supply from the main power supply 10 to the first load 21 can be continued.

(Example 3)
FIG. 7 is a circuit diagram of a power interruption protection circuit 100C according to the third embodiment. In Example 3, the main part of the power interruption protection circuit 100C is integrated in the PLP controller 200C. In Example 3, the first switching power supply 110</b>C includes a boost converter 112 and a buck converter 114 .

Boost converter 112 is inactive (disabled) in buck mode and active (enabled) in boost mode. The input node of boost converter 112 is connected to output line 108 and its output node is connected to backlap line 106 . Boost converter 112 includes a first converter block 270x and a first inductor L1x.

Buck converter 114 is active in both boost and buck modes, with its input node connected to backup capacitor 102 and its output node connected to output line 108 . Buck converter 114 includes a second converter block 270y, a second inductor L1y, and a bootstrap capacitor Cbs1.

Preferably, the target voltage V _{REF (BUCK)} of the output voltage of buck converter 114 is set lower than the normal level of _input voltage VIN (eg, 12V). More preferably, it is set lower than the lower limit V _MIN of the normal voltage range of the load 20 .
V _{REF (BUCK)} < V _MIN

For example, the target voltage VREF _(BUCK) of buck converter 114 is set to 8V. In this embodiment, buck converter 114 has only current sourcing capability and no current sinking capability. Therefore, with the bus voltage V _BUS higher than the target voltage V _REF(BUCK) , the buck converter 114 is operating but does not affect the bus voltage V _BUS .

The second switching power supply 120 includes a third converter block 272, a third inductor L2, an output capacitor C2 and a bootstrap capacitor Cbs2.

First converter block 270x, second converter block 270y and third converter block 272 are integrated into PLP controller 200C.

PLP controller 200C has three switching pins LX1x, L1y, L2 and three feedback pins FB1x, FB1y, FB2. A first inductor L1x is connected to the first switching pin LX1x, a second inductor L1y is connected to the second switching pin LX1y, and a third inductor L2 is connected to the third switching pin LX2.

The first converter block 270x includes a feedback controller 271x, a driver circuit DR1x, a rectifying diode D1Hx, and a low side transistor M1Lx.

A first feedback voltage VFB1x corresponding to the voltage _VSTR of the backup capacitor 102 is fed back to the first feedback pin _FB1x . In the boost mode, the feedback controller 271x performs feedback control so that the first feedback voltage _VFB1x approaches the reference voltage _VREF , and as a result, the voltage _VSTR of the backup capacitor 102 reaches the first target level _VREF(BOOST). stabilized.

The second converter block 270y includes a feedback controller 271y, driver circuits DR1Hy, DR1Ly, high side transistor M1Hy, and low side transistor M1Ly.

A second feedback voltage VFB1y corresponding to the bus voltage _VBUS is fed back to the second feedback pin _FB1y . In the buck mode, the feedback controller 271y performs feedback control so that the second feedback voltage _VFB1y approaches the reference voltage _VREF , and as a result, the voltage _VBUS of the output pin VBUS reaches the second target level _VREF(BUCK). stabilized.

Control logic 240C asserts enable signal EN_BOOST to enable first converter block 270x in boost mode and negates enable signal EN_BOOST to disable first converter block 270x in buck mode.

In the power interruption protection circuit 100A of FIG. 5, the first switching power supply 110A is composed of one bidirectional DC/DC converter, and is configured to be switchable between the step-up mode and the step-down mode. In this case, if the delay in switching from boost mode to buck mode is long, the bus voltage V _BUS may drop during this delay. On the other hand, in the power interruption protection circuit 100C of FIG. 7, switching from the step-up operation to the step-down operation of the converter is unnecessary, so there is no delay associated with the switching. Therefore, it is possible to prevent the bus voltage V _BUS from lowering.

Specifically, the buck converter 114 continues to operate even in situations where the input voltage V _IN is normal, although it does not affect the bus voltage V _BUS . Immediately after the electronic fuse circuit 220 turns off, the bus voltage V _BUS can immediately stabilize to the target voltage V _REF(BUCK) .

(Example 4)
FIG. 8 is a circuit diagram of a power interruption protection circuit 100D according to the fourth embodiment. In Example 4, the main part of the power interruption protection circuit 100D is integrated in the PLP controller 200D.

PLP controller 200D has a configuration in which protection switch 260 and inductor connection pin VB are added to PLP controller 200C of FIG. A second inductor L1y is connected through a protection switch 260 to the VBUS pin. That is, the second inductor L1y and the VBUS pin can be electrically separated.

Control logic 240D controls protection switch 260 . The control logic 240D turns on the protection switch 260 in the step-up mode and the step-down mode. For example, control logic 240D turns off protection switch 260 upon detecting a short mode failure of backup capacitor 102 (STR pin to ground). Additionally, control logic 240D may turn off protection switch 260 upon detecting a ground fault on the LX pin.

According to the fourth embodiment, in a situation where the backup capacitor 102 fails in the short mode, the VBUS pin can be isolated from the failure point, and power supply from the main power supply 10 to the first load 21 can be continued.

(Embodiment 2)
FIG. 9 is a block diagram of a system 2E including a power interruption protection circuit 100E according to the second embodiment. The system 2E includes main power supplies 10A, 10B, a first load 21, a second load 22, a third load 23 and a power interruption protection circuit 100E. Main power supply 10A produces a first input voltage _VIN1 of 12V. Main power supply 10B produces a second input voltage _VIN2 of 5V. A second input voltage V _IN2 is supplied to the third load 23 via the second input line 105 and the third output line 107 .

The second load 22 is configured to operate between 3.3V and 5V. Like the second load 22, the third load 23 is also configured to be operable at 3.3 to 5V.

The power interruption protection circuit 100E includes load switches SW1 and SW2. The load switch SW<b>1 is provided on the second input line 105 and is provided to control ON/OFF of power supply to the third load 23 . Note that the load switch SW1 may be omitted. A load switch SW2 is provided between the second output line 109 and the third output line 107 .

According to the second embodiment, a more robust power interruption protection circuit 100E can be provided. In the second embodiment, the configurations of the first switching power supply 110 and the second switching power supply 120 are as described in the first embodiment. The load switches SW1 and SW2 can be integrated into the PLP controller 200 and their on/off may be controlled by the control logic 240. FIG. Alternatively, the load switches SW1 and SW2 may be discrete elements and externally attached to the PLP controller 200. FIG.

(Application)
The power interruption protection circuits 100A to 100D (hereinafter collectively referred to by reference numeral 100) according to the embodiment can be used in the data storage device 300. FIG. FIG. 10 is a block diagram of a data storage device 300 with PLP functionality. The data storage device 300 is, for example, an SSD (Solid State Drive), and includes a power interruption protection circuit 100 , a step-down converter 301 , a PMIC 302 , a controller 304 , a NAND memory 306 , a cache memory 308 and an interface 310 .

In step-down converter 301, PMIC 302 corresponds to first load 21 described above, and step-down converter 301 corresponds to second load 22 described above. The PMIC 302 receives a power supply voltage V _DD of 3.3V and supplies power supply voltages of appropriate voltage levels to the controller 304 , the NAND memory 306 , the cache memory 308 and the interface 310 . Buck converter 301 receives a bus voltage V _BUS of 12V, steps it down to 0.8V, and supplies it to the load. The load of buck converter 301 may be, for example, controller 304 .

The data storage device 300 may be for a server, built into a computer, or a portable SSD.

Note that the application of the power interruption protection circuit 100 is not limited to the data storage device 300, and can be used for applications in which the power supply voltage must be maintained for a certain period of time after the power interruption.

Those skilled in the art will understand that the embodiments are examples, and that there are various modifications in the combination of each component and each processing process, and that such modifications are also included in the scope of the present disclosure or the present invention. It is about

2 system 10 main power supply 20 load 21 first load 22 second load 100 power interruption protection circuit 102 backup capacitor 104 input line 106 backlap line 108 first output line 109 second output line 110 first switching power supply 112 step-up converter 114 step-down Converter 120 Second switching power supply 200 PLP controller 220 Electronic fuse circuit 240 Control logic 260 Protection switch 270 First converter block 272 Second converter block 290 Internal power supply circuit 300 Data storage device 302 PMIC
304 controller 306 NAND memory 308 cache memory 310 interface

Claims (19)

a first input line to receive a first input voltage;
a first output line to be connected with the first load;
a second output line to be connected with a second load;
a backup capacitor;
A step-up mode and a step-down mode are switchable, and connected to the first output line and the backup capacitor. In the step-up mode, the bus voltage of the first output line is stepped up to charge the backup capacitor, and the a first switching power supply that steps down the voltage of the backup capacitor and supplies the voltage to the first output line in a step-down mode;
an electronic fuse circuit provided between the first input line and the first output line, the electronic fuse circuit being electrically switchable between an on state and an off state;
a second switching power supply that steps down the first input voltage to a power supply voltage lower than 5V and supplies the voltage to the second load;
with
A power interruption protection circuit, wherein a driver circuit of the first switching power supply is operable by receiving the power supply voltage. 2. The power interruption protection circuit according to claim 1, wherein the driver circuit of said second switching power supply is operable by receiving said power supply voltage. 2. The power interruption protection circuit of claim 1, wherein said second load is a power management circuit. 4. The power interruption protection circuit according to claim 1, wherein said power supply voltage is 3.3V. a second input line to receive a second input voltage of 5V and to be connected to a third load;
a load switch provided on the path of the second input line;
5. The power interruption protection circuit according to any one of claims 1 to 4, further comprising: a power interruption protection circuit capable of supplying said second input voltage to said second load when said first input voltage is lost. 6. The power shutdown according to any one of claims 1 to 5, wherein said first switching power supply includes a step-up/step-down bidirectional DC/DC converter capable of reversing the direction of power transmission between said step-up mode and said step-down mode. protection circuit. 7. The power interruption protection circuit according to claim 6, further comprising a protection switch connected between the inductor of the step-up/step-down bidirectional DC/DC converter and the first output line. The first switching power supply
a boost converter active in the boost mode and having an input node connected to the first output line and an output node connected to the backup capacitor;
a step-down converter that is active in the step-up mode and the step-down mode and has an input node connected to the first output line and an output node connected to the backup capacitor;
6. The power interruption protection circuit according to any one of claims 1 to 5, comprising: 9. The power interruption protection circuit according to claim 8, further comprising a protection switch connected between each inductor of said boost converter and said buck converter and said first output line. 10. The power interruption protection circuit according to claim 1, wherein said first load and said second load are components of an SSD (Solid State Drive). A data storage device comprising a power interruption protection circuit according to any one of claims 1 to 10. an input pin to receive an input voltage;
an output pin to be connected with the first load;
a capacitor connection pin to which the backup capacitor is to be connected;
a first switching pin to be connected to the output pin through an external first inductor;
a second switching pin to be connected to a second load via an external second inductor;
a power pin to be connected to the second load;
a step-up/step-down bidirectional DC/DC converter connected to the first switching pin, the output pin, and the capacitor connection pin and capable of reversing the direction of power transmission together with the first inductor; a first converter block for stabilizing the voltage of the output pin to a first target level and stabilizing the voltage at the output pin to a second target level in a buck mode;
a second converter block connected to the second switching pin and the output pin, forming a buck converter together with the second inductor, and regulating the voltage supplied to the second load to a third target level lower than 5V; ,
an electronic fuse circuit provided on a power supply line connecting the input pin and the output pin and capable of electrically switching between an on state and an off state;
with
A power interruption protection controller, wherein the driver circuit of the first converter block operates using the voltage of the power supply pin as a power supply. 13. The power interruption protection controller according to claim 12, wherein the driver circuit of said second converter block operates using the voltage of said power supply pin as a power supply. an inductor connection pin to be connected to one end of the first inductor;
a protection switch connected between the output pin and the inductor connection pin;
14. The power interruption protection controller of claim 12 or 13, further comprising: an input pin to receive an input voltage;
an output pin to be connected with the first load;
a capacitor connection pin to which the backup capacitor is to be connected;
a first switching pin to be connected to the output pin through an external first inductor;
a second switching pin to be connected to the output pin through an external second inductor;
a third switching pin to be connected to the second load through an external third inductor;
a power pin to be connected to the second load;
a first converter block connected to the first switching pin and the capacitor connection pin, forming a boost converter together with the first inductor, and being active in a boost mode to stabilize the voltage of the backup capacitor to a first target level;
a second converter block connected to the second switching pin and the capacitor connection pin, forming a first step-down converter together with the second inductor, and stabilizing the voltage of the output pin to a second target level;
a third converter connected to the third switching pin and the output pin and forming a second step-down converter together with the third inductor to regulate the voltage supplied to the second load to a third target level below 5V; a block;
an electronic fuse circuit provided on a power supply line connecting the input pin and the output pin and capable of electrically switching between an on state and an off state;
with
A power interruption protection controller, wherein the driver circuits of the first converter block and the second converter block operate using the voltage of the power supply pin as a power supply. 16. The power interruption protection controller according to claim 15, wherein the driver circuit of said third converter block is powered by the voltage of said power supply pin. an inductor connection pin to be connected to one end of the first inductor and one end of the second inductor;
a protection switch connected between the output pin and the inductor connection pin;
17. The power interruption protection controller of claim 15 or 16, further comprising: 18. The power interruption protection controller according to any one of claims 12 to 17, monolithically integrated on one semiconductor substrate. 19. The power interruption protection controller according to any one of claims 12 to 18, wherein said first load and said second load are components of an SSD (Solid State Drive).

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