JP2023082723A - power converter - Google Patents

Abstract

To restrict the output frequency change rate of a VSG model in a power converter in which virtual synchronous generator control is performed by the VSG model.SOLUTION: A VSG model is provided with a change rate limit processing unit 30 including a subtractor 31 that subtracts output of a governor item from synchronous control output Pm_sync to determine the amount of change in synchronous control output, a limiter 32 that limits the output of the subtractor 31 within a range of a set frequency change rate limit value, and an adder 33 that adds the output of the governor item to the output of the limiter 32. The VSG model adds the output of the adder 33 and a mechanical input command Pm to each other with an adder 21, subtracts an electric output Pe from the added output with a subtractor 22, and adds, with an adder 25, the output of a buffer 26 to an integrated output obtained by integrating the deviation between the output of the subtractor 22 and the output of the governor item with an integrator 24, thereby determining a frequency deviation Δωr. The governor item is obtained by multiplying the previous frequency deviation stored in the buffer 26 by a governor gain Kgov of a multiplier 27.SELECTED DRAWING: Figure 3

Description

The present invention relates to a control method for a power conversion device equipped with virtual synchronous generator control.

Conventionally, for example, in Patent Document 1, when synchronizing a generator with a power supply system, the frequency and phase of the power supply system to be synchronized are fed back to control the number of rotations of the generator, thereby adjusting the phase of the generator with the power supply system. Synchronous control methods for synchronization have been proposed.

On the other hand, Patent Documents 2 and 3 are prior examples of power converters that perform virtual synchronous generator model (VSG (Virtual Synchronous Generators) model) control that simulates the swing equation of a synchronous generator. The power converter operates like a generator (virtual generator) driven at the frequency determined by the perturbation equation.

JP 2003-284246 A JP 2017-127141 A Japanese Patent No. 6386718

The system configuration assumed in the present invention is shown in FIG. 1, and the VSG model inside the power converter is shown in FIG. The system configuration assumes synchronous input to the power supply system as in Patent Document 1, but there is a power converter that performs virtual synchronous generator control instead of the generator, and the distributed power supply is interconnected.

In FIG. 1, the output side of a power supply system 1 is connected to a distributed power supply 3 and a premises load 4 via circuit breakers 2a, 2b, and 2c.

A power converter 5 includes a semiconductor switching element and converts DC power into AC power by virtual synchronous generator control. The AC output side of power converter 5 is connected to common connection point 8 of circuit breaker 2a and circuit breakers 2b and 2c via LC filter section 6, transformer 7 and circuit breaker 2d.

Reference numeral 9 denotes a synchronous control unit that performs synchronous control by feeding back a signal (Vsys) obtained by detecting the system voltage of the power supply system 1 by the potential transformer 10 .

Reference numeral 11 detects the output current of the LC filter section 6 by a current transformer 12, converts the current value by coordinate conversion by a uvw/dq coordinate converter 13, and the output voltage of the LC filter section 6 by a voltage transformer 14. It is an output power calculation unit that calculates the output power of the power converter 5 based on the voltage value that is detected and coordinate-transformed by the uvw/dq coordinate converter 15 and outputs it as an electric output Pe.

A voltage controller (AVR) 16 controls the voltage value output from the coordinate converter 15 to become the output voltage command value |Vac|* of the power converter 5 .

Reference numeral 17 denotes a VSG model that receives the mechanical input command Pm, the output Pm_sync of the synchronization control section 9, and the output Pe of the output power calculation section 11, and outputs an output frequency ωr according to the configuration shown in FIG. 2, which will be described later.

An integrator 18 integrates the output frequency ωr output from the VSG model 17 and outputs a phase θr.

The output voltage of the voltage controller 16 is coordinate-converted by the dq/uvw coordinate converter 19 to obtain a uvw-phase voltage command.

A PWM modulator 20 generates a gate signal for controlling the semiconductor switching element of the power converter 5 by comparing the uvw-phase voltage command and the carrier signal.

Note that the uvw/dq coordinate converters 13 and 15 and the dq/uvw coordinate converter 19 are each coordinate-converted by the phase θr output from the integrator 18 .

2 showing the configuration of the VSG model 17, the synchronous control output Pm_sync (the output of the synchronous control section 9 in FIG. 1) and the mechanical input command Pm are added by an adder 21, and the added output is The output Pe (the output of the output power calculator 11 in FIG. 1) is subtracted.

A subtractor 23 subtracts the output of a governor term (an output obtained by multiplying the previous value of the frequency deviation component by the governor gain) from the added output of the adder 22 .

24 is an integrator that integrates the output of the subtractor 23 with the operation cycle Ts/inertia constant M. FIG.

The output of the integrator 24 is added to the output of a buffer 26, which will be described later, in the adder 25 to obtain the frequency deviation .DELTA..omega.r.

The buffer 26 delays the frequency deviation Δωr by one operation and outputs the previous value of the frequency deviation component.

A multiplier 27 multiplies the previous value of the frequency deviation component output from the buffer 26 by a governor gain Kgov, and the output of the multiplier 27 is the output of the governor term.

An adder 28 adds 1 representing the rated frequency to the frequency deviation .DELTA..omega.r output from the adder 25 and outputs an output frequency .omega.r.

Here, let us consider a case where the output frequency of the power converter 5 that performs virtual synchronous generator control is controlled by frequency and phase feedback control (synchronization control), and synchronous input to the power supply system 1 is performed. The contents of the synchronous control include proportional control and proportional integral control using the phase difference between the synchronous target and the VSG model as a deviation, and a combination of frequency offset and phase control as in Patent Document 1. The synchronous control output Pm_sync is added to the mechanical input command Pm of the VSG model 17 to control the output frequency.

At this time, depending on the inertia constant M of the VSG model, the governor gain Kgov, and the design of the synchronous control unit, the output frequency ωr of the VSG model 17 suddenly changes, and the frequency change rate (RoCoF) increases. There is a risk that the distributed power source (3) such as the solar power PCS that is in the system may erroneously detect islanding.

In the virtual synchronous generator, the inertia constant M and the governor gain Kgov can be freely changed at any timing, so synchronous control is required to operate while suppressing the frequency change rate to a certain level or less regardless of parameters.

The present invention solves the above problems, and its object is to limit the output frequency change rate of the VSG model in a power converter in which virtual synchronous generator control is performed by the VSG model.

The power conversion device according to claim 1 for solving the above problems,
A power converter that is connected to a common connection point between a power supply system and a distributed power supply so as to be interconnectable with the distributed power supply, and performs virtual synchronous generator control according to a VSG (Virtual Synchronous Generators) model,
The VSG model is
an addition/subtraction unit for subtracting an electric output obtained by detecting the output power of the power conversion device from the addition output of the synchronous control output resulting from performing synchronous control by feeding back the signal obtained by detecting the voltage of the power supply system and the mechanical input command;
an integral term for outputting a frequency deviation component by integrating the difference between the output of the adder/subtractor and the previous value of the frequency deviation component multiplied by the governor gain with the inertia constant and the calculation period;
a governor term for multiplying the previous value of the frequency deviation component output from the integral term by a governor gain;
an output frequency generator that adds a rated frequency component to the frequency deviation component to obtain an output frequency;
A rate of change restriction processing unit in the addition/subtraction unit that performs rate of change restriction processing on the synchronous control output before being added to the mechanical input, wherein the synchronous control output is reduced by subtracting the output of the governor term from the synchronous control output. a subtractor for obtaining the amount of change; a limiter for limiting the amount of change in the synchronous control output obtained by the subtractor within a set frequency change rate limit value; and an output of the governor term as the output of the limiter. an adder for addition, and a rate-of-change limit processing unit having
characterized by comprising

The power conversion device according to claim 2,
A power converter that is connected to a common connection point between a power supply system and a distributed power supply so as to be interconnectable with the distributed power supply, and performs virtual synchronous generator control according to a VSG (Virtual Synchronous Generators) model,
The VSG model is
After adding the synchronous control output as a result of performing synchronous control by feeding back the signal that detects the voltage of the power supply system and the machine input command, the electric output obtained by detecting the output power of the power converter is subtracted from the added output. an addition/subtraction unit for
an integral term for outputting a frequency deviation component by integrating the difference between the output of the adder/subtractor and the previous value of the frequency deviation component multiplied by the governor gain with the inertia constant and the calculation period;
a governor term for multiplying the previous value of the frequency deviation component output from the integral term by a governor gain;
an output frequency generator that adds a rated frequency component to the frequency deviation component to obtain an output frequency;
a rate of change restriction processing unit for performing rate of change restriction processing on the sum output of the synchronous control output and the mechanical input command in the addition/subtraction unit, wherein the output of the governor term is selected from the sum output of the synchronous control output and the mechanical input command; a limiter for limiting the output of the subtractor within a set frequency change rate limit value; and an adder for adding the output of the governor term to the output of the limiter. a restriction processor;
characterized by comprising

The power conversion device according to claim 3 is characterized in that, in claim 1 or 2,
The frequency change rate limit value ωratelim of the change rate limit processor in the VSG model is set to satisfy the following equation (4).

(Pin is the output of the addition/subtraction unit, M is the inertia constant of the integral term, Kgov is the governor gain in the governor term, and Δωr(n−1) is the previous value of the frequency deviation component)

(1) According to the inventions described in claims 1 and 3, the output frequency change rate of the VSG model due to changes in the synchronous control output is limited, and the distributed power supply linked to the power conversion device under synchronous control is controlled. Islanding operation error detection can be prevented.
(2) According to the inventions of claims 2 and 3, the output frequency change rate of the VSG model due to changes in the synchronous control output and mechanical input is limited, and the dispersion linked to the power conversion device under synchronous control It is possible to prevent erroneous detection of islanding of the type power supply.

1 is a system configuration diagram of a power converter to which the present invention is applied; FIG. The block diagram of the conventional VSG model. 1 is a configuration diagram of a VSG model according to Example 1 of the present invention; FIG. The block diagram of the VSG model by Example 2 of this invention. A block diagram of a simplified VSG model.

Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited to the following embodiment examples.

In the first embodiment, the VSG model 17 in the system configuration of FIG. 1 is configured as shown in FIG. In FIG. 3, the same parts as in FIG. 2 are indicated by the same reference numerals. FIG. 3 differs from FIG. 2 in that a change rate limiter is placed between the input of the synchronous control output Pm_sync and one input terminal of the adder 21 to limit the change rate of the output frequency ωr of the VSG model 17. The only difference is that the processing unit 30 is provided, and the other parts are configured in the same manner as in FIG.

The adder 21 and the subtractor 22 constitute the adder/subtractor of the present invention, the buffer 26 and the multiplier 27 constitute the governor term of the present invention, and the adder 28 constitute the output frequency generator of the present invention. ing.

31 in the rate-of-change limit processing unit 30 converts the output of the governor term from the synchronization control output Pm_sync, that is, the value obtained by multiplying the previous output frequency deviation Δωr (output of the buffer 26) by the governor gain Kgov (the output of the multiplier 27). ) to obtain the amount of change in the synchronous control output.

32 in the change rate limit processing unit 30 inputs the change amount of the synchronous control output output from the subtractor 31 as it is if it is within the range of ±M*frequency change rate limit value ωratelim, and if it is outside ±M*ωratelim is a limiter that limits the amount of change to M*ωratelim.

The output of the limiter 32 is added in the adder 33 with the output of the governor term (output of the multiplier 27), and the output of the adder 33 is added in the adder 21 with the machine input command Pm.

The configuration and operation after the subtractor 22 for subtracting the electric output Pe from the output of the adder 21 are the same as those described in FIG. 2, but the VSG model is simplified for analysis as shown in FIG. .

In FIG. 5, the same parts as those in FIG.

In FIG. 5, the change rate dωr/dt of the frequency deviation Δωr(n) (n is the number of calculations) output from the adder 25 is obtained by the previous value Δωr(n−1) stored in the buffer 26 and the input Pin, It is obtained by the following formulas (1) and (2) according to the calculation period Ts.

Here, the Pin condition for suppressing the change rate dωr/dt to the frequency change rate limit value ωratelim or less is obtained by the following formulas (3) and (4).

Therefore, by applying a limiting process to Pin so as to satisfy the expression (4), the frequency change rate can be limited to a frequency change rate limit value ωratelim or less.

Here, applying the formula (4) to the VSG model of FIG. 2, Pin becomes the following formula (5).

In order to suppress the rate of change dωr/dt, the frequency deviation Δωr output from the adder 25 may be directly limited, but the input mechanical input Pm and electrical output Pe correspond to changes in commands and system disturbances. Therefore, you may not want to be affected by the frequency rate-of-change limit. Therefore, using the input limitation using the equation (4), the frequency change rate limitation is applied only to the terms to be subjected to the change rate limitation.

As described above, according to the first embodiment, the rate of change in frequency of the VSG model due to changes in the synchronous control output is limited by providing the limiting process of the equation (4) only to the synchronous control output Pm_sync. The rate of change in frequency due to the influence of changes in mechanical input Pm and electrical output Pe is not limited. By limiting the frequency change rate due to the input from synchronous control to less than a certain value, it is possible to prevent erroneous islanding detection of the distributed power supply (3) linked to the power converter under synchronous control.

In the second embodiment, the VSG model 17 in the system configuration of FIG. 1 is configured as shown in FIG. In FIG. 4, the same parts as in FIG. 2 are indicated by the same reference numerals. FIG. 4 differs from FIG. 2 in that change rate limiting processing is performed to limit the change rate of the output frequency ωr of the VSG model 17 between the output side of the adder 21 and the positive side input terminal of the subtractor 22. The only difference is that a portion 40 is provided, and the other portions are constructed in the same manner as in FIG.

The adder 21 and the subtractor 22 constitute the adder/subtractor of the present invention, the buffer 26 and the multiplier 27 constitute the governor term of the present invention, and the adder 28 constitute the output frequency generator of the present invention. ing.

41 in the rate-of-change limit processing unit 40 multiplies the output of the governor term, that is, the deviation Δωr of the previous output frequency (the output of the buffer 26) from the mechanical input Pm′, which is the addition output of the adder 21, by the governor gain Kgov. It is a subtracter that subtracts the value (output of the multiplier 27) to obtain the amount of change of Pm'.

42 in the rate-of-change limit processing unit 40 inputs the output of the subtractor 41 (the amount of change in Pm′) if it is within the range of ±M*frequency rate-of-change limit value ωratelim. is a limiter that limits the amount of change to M*ωratelim.

The output of the limiter 42 is added to the output of the governor term (the output of the multiplier 27) in the adder 43, and the electrical output Pe is subtracted in the subtractor 22 from the output of the adder 43. The configuration and operation after the subtractor 22 are the same as those described with reference to FIG.

In the second embodiment, as in the first embodiment, the configuration after the subtractor 22 is considered as a simplified VSG model as shown in FIG. Output frequency change rate limiting can be performed.

As described above, according to the second embodiment, after the addition of the mechanical input command Pm and the synchronous control output Pm_sync (the output of the adder 21), the change rate limiting process of the equation (4) is provided, whereby the synchronous control output and The frequency change rate of the VSG model due to changes in mechanical input commands is limited. The frequency change rate due to the influence of the change in the electric output Pe is not limited. To prevent erroneous islanding detection of the distributed power supply (3) linked to the power converter under synchronous control by limiting the frequency change rate due to the mechanical input and the input from the synchronous control to less than a certain value. can be done.

Here, selection conditions for the first and second embodiments will be described. If the synchronization control output Pm_sync fluctuates greatly, the first embodiment should be used. If the mechanical input command Pm or the mechanical input Pm' fluctuates greatly, the second embodiment should be used.

DESCRIPTION OF SYMBOLS 1... Power supply system 2a-2d... Circuit breaker 3... Distributed power supply 4... On-site load 5... Power converter 9... Synchronization control part 11... Output power calculation part 13, 15... uvw/dq coordinate converter 16... Voltage controller 17 VSG model 18, 24 Integrator 19 dq/uvw coordinate converter 20 PWM modulator 21, 25, 28, 33, 43 Adder 22, 23, 31, 41 Subtractor 26 Buffer 27 Multiplier 30, 40... Change rate limit processing unit

Claims (3)

A power converter that is connected to a common connection point between a power supply system and a distributed power supply so as to be interconnectable with the distributed power supply, and performs virtual synchronous generator control according to a VSG (Virtual Synchronous Generators) model,
The VSG model is
an addition/subtraction unit for subtracting an electric output obtained by detecting the output power of the power conversion device from the addition output of the synchronous control output resulting from performing synchronous control by feeding back the signal obtained by detecting the voltage of the power supply system and the mechanical input command;
an integral term for outputting a frequency deviation component by integrating the difference between the output of the adder/subtractor and the previous value of the frequency deviation component multiplied by the governor gain with the inertia constant and the calculation period;
a governor term for multiplying the previous value of the frequency deviation component output from the integral term by a governor gain;
an output frequency generator that adds a rated frequency component to the frequency deviation component to obtain an output frequency;
A rate of change restriction processing unit in the addition/subtraction unit that performs rate of change restriction processing on the synchronous control output before being added to the mechanical input, wherein the synchronous control output is reduced by subtracting the output of the governor term from the synchronous control output. a subtractor for obtaining the amount of change; a limiter for limiting the amount of change in the synchronous control output obtained by the subtractor within a set frequency change rate limit value; and an output of the governor term as the output of the limiter. an adder for addition, and a rate-of-change limit processing unit having
A power converter, comprising: A power converter that is connected to a common connection point between a power supply system and a distributed power supply so as to be interconnectable with the distributed power supply, and performs virtual synchronous generator control according to a VSG (Virtual Synchronous Generators) model,
The VSG model is
After adding the synchronous control output as a result of performing synchronous control by feeding back the signal that detects the voltage of the power supply system and the machine input command, the electric output obtained by detecting the output power of the power converter is subtracted from the added output. an addition/subtraction unit for
an integral term for outputting a frequency deviation component by integrating the difference between the output of the adder/subtractor and the previous value of the frequency deviation component multiplied by the governor gain with the inertia constant and the calculation period;
a governor term for multiplying the previous value of the frequency deviation component output from the integral term by a governor gain;
an output frequency generator that adds a rated frequency component to the frequency deviation component to obtain an output frequency;
a rate of change restriction processing unit for performing rate of change restriction processing on the sum output of the synchronous control output and the mechanical input command in the addition/subtraction unit, wherein the output of the governor term is selected from the sum output of the synchronous control output and the mechanical input command; a limiter for limiting the output of the subtractor within a set frequency change rate limit value; and an adder for adding the output of the governor term to the output of the limiter. a restriction processor;
A power converter, comprising: 3. The power converter according to claim 1, wherein the frequency change rate limit value ωratelim of the change rate limit processor in the VSG model is set so as to satisfy the following equation (4).

(Pin is the output of the addition/subtraction unit, M is the inertia constant of the integral term, Kgov is the governor gain in the governor term, and Δωr(n−1) is the previous value of the frequency deviation component)

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