JP2022183024A - Substrate with conductive film and reflection-type mask blank - Google Patents

Substrate with conductive film and reflection-type mask blank Download PDF

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JP2022183024A
JP2022183024A JP2022071912A JP2022071912A JP2022183024A JP 2022183024 A JP2022183024 A JP 2022183024A JP 2022071912 A JP2022071912 A JP 2022071912A JP 2022071912 A JP2022071912 A JP 2022071912A JP 2022183024 A JP2022183024 A JP 2022183024A
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conductive film
substrate
glass substrate
film
inclined portion
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JP7327567B2 (en
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壮太郎 仲村
Sotaro Nakamura
誠祥 溝口
Masayoshi Mizoguchi
剛 富澤
Takeshi Tomizawa
崇平 見矢木
Takahira Miyagi
隆介 森田
Ryusuke Morita
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AGC Inc
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Asahi Glass Co Ltd
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Abstract

To provide a substrate with a conductive film for a mask blank which is configured to reduce generation of particles in an electrostatic chuck.SOLUTION: A substrate with a conductive film includes a glass substrate and the conductive film disposed on one main surface of the glass substrate. An inclined part is disposed at a circumferential edge of the conductive film. A distance from a position where a thickness of the conductive film in the inclined part reaches 10% of a thickness of a central part of the conductive film to an edge part of the glass substrate is 3.00 mm or less, and a distance from an end of the inclined part to the edge of the glass substrate exceeds 0.00 mm.SELECTED DRAWING: None

Description

本発明は、導電膜付基板および反射型マスクブランクに関する。 The present invention relates to a substrate with a conductive film and a reflective mask blank.

近年、半導体デバイスを構成する集積回路の微細化に伴い、可視光や紫外光（波長１９３～３６５ｎｍ）またはＡｒＦエキシマレーザ光（波長１９３ｎｍ）等を用いた従来の露光技術に代わる露光方法として、極端紫外光（Ｅｔｒｅｍｅ Ｕｌｔｒａ Ｖｉｏｌｅｔ：以下、「ＥＵＶ」と呼ぶ。）リソグラフィが検討されている。 In recent years, with the miniaturization of integrated circuits that make up semiconductor devices, extreme exposure methods have been developed as alternatives to conventional exposure techniques using visible light, ultraviolet light (wavelength 193 to 365 nm), ArF excimer laser light (wavelength 193 nm), etc. Ultraviolet (Etreme Ultra Violet: hereinafter referred to as "EUV") lithography is being considered.

ＥＵＶリソグラフィでは、露光に用いる光源として、ＡｒＦエキシマレーザ光よりも短波長のＥＵＶ光が用いられる。なお、ＥＵＶ光とは、軟Ｘ線領域または真空紫外線領域の波長の光をいい、具体的には、波長が０．２～１００ｎｍ程度の光である。ＥＵＶ光としては、例えば、波長が１３．５ｎｍ程度のＥＵＶ光が使用される。 In EUV lithography, EUV light with a shorter wavelength than ArF excimer laser light is used as a light source for exposure. EUV light refers to light having a wavelength in the soft X-ray region or vacuum ultraviolet region, and specifically, light having a wavelength of approximately 0.2 to 100 nm. EUV light with a wavelength of about 13.5 nm, for example, is used as the EUV light.

ＥＵＶ光は、あらゆる物質に対して吸収され易いため、従来の露光技術で用いられていた屈折光学系を使用できない。そのため、ＥＵＶリソグラフィでは、反射型マスクやミラー等の反射光学系が用いられる。ＥＵＶリソグラフィにおいては、反射型マスクが転写用マスクとして用いられる。 Since EUV light is easily absorbed by all substances, the refractive optics used in conventional exposure techniques cannot be used. Therefore, in EUV lithography, a reflective optical system such as a reflective mask and a mirror is used. In EUV lithography, a reflective mask is used as a transfer mask.

マスクブランクは、フォトマスク製造に用いられるパターニング前の積層体である。反射型マスクブランクの場合、ガラス製等の基板上にＥＵＶ光を反射する反射層と、ＥＵＶ光を吸収する吸収層とがこの順で形成された構造を有している。反射層としては、ＥＵＶ光に対して低屈折率となる低屈折率層と、ＥＵＶ光に対して高屈折率となる高屈折率層とを交互に積層することで、ＥＵＶ光を層表面に照射した際の光線反射率が高められた反射多層膜が通常用いられる。反射多層膜の低屈折率層としては、モリブデン（Ｍｏ）層が、高屈折率層としては、ケイ素（Ｓｉ）層が通常用いられる。
吸収層には、ＥＵＶ光に対する吸収係数の高い材料、具体的にはたとえば、クロム（Ｃｒ）やタンタル（Ｔａ）を主成分とする材料が用いられる。 A mask blank is a pre-patterned laminate used in photomask manufacturing. A reflective mask blank has a structure in which a reflective layer that reflects EUV light and an absorption layer that absorbs EUV light are formed in this order on a substrate made of glass or the like. As the reflective layer, by alternately laminating a low refractive index layer that has a low refractive index for EUV light and a high refractive index layer that has a high refractive index for EUV light, EUV light can be reflected on the layer surface. A reflective multi-layer film having an enhanced light reflectance upon irradiation is usually used. A molybdenum (Mo) layer is usually used as the low refractive index layer of the reflective multilayer film, and a silicon (Si) layer is usually used as the high refractive index layer.
For the absorption layer, a material having a high absorption coefficient for EUV light, specifically a material containing chromium (Cr) or tantalum (Ta) as a main component, for example, is used.

多層反射膜および吸収層は、イオンビームスパッタリング法やマグネトロンスパッタリング法を用いて基板の主面上に成膜される。多層反射膜および吸収層を成膜する際、ガラス基板は保持手段によって保持される。基板の保持手段として、機械的チャックおよび静電チャックがあるが、発塵性の問題から、多層反射膜および吸収層を成膜する際の基板の保持手段、特に多層反射膜を成膜する際の基板の保持手段としては、静電チャックによる吸着保持が好ましく用いられる。 A multilayer reflective film and an absorption layer are deposited on the main surface of the substrate using an ion beam sputtering method or a magnetron sputtering method. The glass substrate is held by holding means when the multilayer reflective film and the absorbing layer are deposited. Means for holding the substrate include mechanical chucks and electrostatic chucks. As the means for holding the substrate in (1), adsorption holding by an electrostatic chuck is preferably used.

静電チャックは、半導体装置の製造プロセスにおいて、シリコンウェハの吸着保持に従来用いられている技術である。このため、ガラス製の基板のように、誘電率および導電率の低い基板の場合、シリコンウェハの場合と同程度のチャック力を得るには、高電圧を印加する必要があるため、絶縁破壊を生じる危険性がある。
このような問題を解消するため、基板の裏面（反射多層膜や吸収層が形成される基板の成膜面に対する裏面。静電チャックで吸着保持される側の面）に高誘電率の導電膜を形成することが行われている。 An electrostatic chuck is a technology conventionally used to attract and hold silicon wafers in the manufacturing process of semiconductor devices. For this reason, in the case of substrates with low permittivity and conductivity, such as glass substrates, it is necessary to apply a high voltage in order to obtain the same level of chucking force as in the case of silicon wafers. may occur.
In order to solve such problems, a conductive film with a high dielectric constant is formed on the back surface of the substrate (the back surface of the substrate on which the reflective multilayer film and the absorption layer are formed; the surface of the substrate that is attracted and held by the electrostatic chuck). is being formed.

静電チャック時の振動や静電チャックのクランプ構造物との接触により、導電膜の膜剥れが発生する場合がある。静電チャック時に導電膜の膜剥れ等によってパーティクルが発生すると、例えば、反射型マスクブランクから電子線照射等によるマスクパターンを形成して反射型マスクを作製する工程における高品質な反射型マスクの実現や、反射型マスクによる露光工程における高精度な転写の実現を阻害するおそれがある。従来の露光用透過型マスクを用いたパターン転写の場合には、露光光の波長が紫外域で比較的長い（１５７～２４８ｎｍ程度）ため、マスク面に凹凸欠陥が生じても、これが重大な欠陥とまではなりにくく、そのため従来では成膜時のパーティクルの発生は課題としては格別認識されていなかった。しかしながら、ＥＵＶ光のような短波長の光を露光光として用いる場合には、マスク面上の微細な凹凸欠陥があっても、転写像への影響が大きくなるため、パーティクルの発生は無視できない。 The conductive film may peel off due to vibration during electrostatic chucking or contact with the clamping structure of the electrostatic chuck. If particles are generated due to film peeling of the conductive film during electrostatic chucking, for example, a high-quality reflective mask will be lost in the process of forming a mask pattern from a reflective mask blank by electron beam irradiation or the like to fabricate a reflective mask. There is a risk of impeding the realization of high-precision transfer in the exposure process using a reflective mask. In the case of pattern transfer using a conventional transmissive mask for exposure, the wavelength of the exposure light is relatively long in the ultraviolet region (approximately 157 to 248 nm). Therefore, in the past, the generation of particles during film formation was not particularly recognized as a problem. However, when light with a short wavelength such as EUV light is used as the exposure light, even if there is a minute unevenness defect on the mask surface, the effect on the transferred image becomes large, and the generation of particles cannot be ignored.

特許文献１に記載の多層反射膜付基板では、基板を挟んで多層反射膜と反対側に、基板の少なくとも周縁部を除く領域に導電膜を形成し、基板の少なくとも面取面と側面には導電膜が形成されていないため、基板の周縁部にも導電膜を形成した場合の周縁部の膜剥れによるパーティクルの発生を防止することができ、静電チャック時に基板の反りが生じても、基板周縁部からのパーティクルの発生を防止することができる、としている。 In the substrate with a multilayer reflective film described in Patent Document 1, a conductive film is formed on the substrate on the side opposite to the multilayer reflective film with the substrate interposed therebetween, on at least a region of the substrate excluding the peripheral portion, and on at least the chamfered surface and the side surface of the substrate. Since the conductive film is not formed, it is possible to prevent the generation of particles due to peeling of the film at the peripheral edge when the conductive film is also formed on the peripheral edge of the substrate. , it is possible to prevent the generation of particles from the peripheral edge of the substrate.

特開２００５－２１００９３号公報Japanese Patent Application Laid-Open No. 2005-210093

本発明者らは、特許文献１に記載の多層反射膜付基板のように、基板の少なくとも周縁部を除く領域に導電膜を形成した場合、静電チャック時のパーティクルの発生を抑制できないことを見出した。 The inventors of the present invention have found that when a conductive film is formed on a region of the substrate excluding at least the peripheral portion as in the substrate with a multilayer reflective film described in Patent Document 1, the generation of particles during electrostatic chucking cannot be suppressed. Found it.

本発明は、静電チャック時のパーティクルの発生が抑制された反射型マスクブランクおよび該マスクブランク用の導電膜付基板の提供を課題とする。 An object of the present invention is to provide a reflective mask blank in which generation of particles during electrostatic chucking is suppressed, and a substrate with a conductive film for the mask blank.

本発明者らは、鋭意検討した結果、以下の構成により上記課題を解決できることを見出した。
［１］ ガラス基板と、
上記ガラス基板の一方の主面上に配置された導電膜とを有する導電膜付基板であって、
上記導電膜の周縁に傾斜部を有し、
上記傾斜部における上記導電膜の厚さが上記導電膜の中心部の膜厚の１０％となる位置から、上記ガラス基板の縁端部までの距離が３．００ｍｍ以下であり、
上記傾斜部の端部から上記ガラス基板の縁端部までの距離が０．００ｍｍ超である、導電膜付基板。
［２］ 上記ガラス基板の主面の周縁部に面取り面を有し、上記傾斜部の端部の少なくとも一部が上記面取り面内に位置する、［１］に記載の導電膜付基板。
［３］ 上記傾斜部の端部の全てが上記面取り面内に位置する、［２］に記載の導電膜付基板。
［４］ 上記傾斜部における上記導電膜の厚さが上記導電膜の中心部の膜厚の１０％となる位置が、上記面取り面内に位置しない、［１］～［３］のいずれか１つに記載の導電膜付基板。
［５］ 上記導電膜のヤング率が５０．０ＧＰａ以上である、［１］～［４］のいずれか１つに記載の導電膜付基板。
［６］ 上記導電膜のシート抵抗が１５０．００Ω／ｓｑ以下である、［１］～［５］のいずれか１つに記載の導電膜付基板。
［７］ 上記導電膜が、クロム（Ｃｒ）、タンタル（Ｔａ）、ケイ素（Ｓｉ）、チタン（Ｔｉ）、ジルコニウム（Ｚｒ）、ハフニウム（Ｈｆ）およびゲルマニウム（Ｇｅ）からなる群から選択される少なくとも１種を含む、［１］～［６］のいずれか１つに記載の導電膜付基板。
［８］ ［１］～［７］のいずれか１つに記載の導電膜付基板と、
上記導電膜付基板の上記ガラス基板の上記導電膜が配置された主面とは反対側の主面上に配置された、ＥＵＶ光を反射する反射層と、
上記反射層上に配置された、ＥＵＶ光を吸収する吸収層とを有する、反射型マスクブランク。 As a result of intensive studies, the inventors of the present invention have found that the above problems can be solved by the following configuration.
[1] a glass substrate;
A conductive film-attached substrate having a conductive film disposed on one main surface of the glass substrate,
Having an inclined portion on the peripheral edge of the conductive film,
The distance from the position where the thickness of the conductive film in the inclined portion is 10% of the thickness of the central portion of the conductive film to the edge portion of the glass substrate is 3.00 mm or less,
A substrate with a conductive film, wherein the distance from the end of the inclined portion to the edge of the glass substrate is more than 0.00 mm.
[2] The conductive film-attached substrate according to [1], wherein the glass substrate has a chamfered surface along the peripheral edge of the main surface thereof, and at least a portion of the end of the inclined portion is positioned within the chamfered surface.
[3] The conductive film-attached substrate according to [2], wherein all of the end portions of the inclined portion are positioned within the chamfered surface.
[4] Any one of [1] to [3], wherein the position where the thickness of the conductive film in the inclined portion is 10% of the thickness of the central portion of the conductive film is not located within the chamfered surface. 2. The substrate with a conductive film according to 1.
[5] The substrate with a conductive film according to any one of [1] to [4], wherein the conductive film has a Young's modulus of 50.0 GPa or more.
[6] The conductive film-attached substrate according to any one of [1] to [5], wherein the conductive film has a sheet resistance of 150.00Ω/sq or less.
[7] At least the conductive film is selected from the group consisting of chromium (Cr), tantalum (Ta), silicon (Si), titanium (Ti), zirconium (Zr), hafnium (Hf) and germanium (Ge) The substrate with a conductive film according to any one of [1] to [6], including one type.
[8] The substrate with a conductive film according to any one of [1] to [7];
a reflective layer that reflects EUV light and is disposed on the main surface of the glass substrate of the conductive film-attached substrate opposite to the main surface on which the conductive film is disposed;
and an absorbing layer for absorbing EUV light disposed on the reflective layer.

本発明の反射型マスクブランクおよび該マスクブランク用の導電膜付基板は、静電チャック時のパーティクルの発生が抑制できる。 The reflective mask blank and the conductive film-coated substrate for the mask blank of the present invention can suppress the generation of particles during electrostatic chucking.

図１は、本発明の導電膜付基板の１実施形態を示す平面図である。FIG. 1 is a plan view showing one embodiment of a substrate with a conductive film of the present invention. 図２は、図１に示す導電膜付基板の概略断面図である。FIG. 2 is a schematic cross-sectional view of the conductive film-attached substrate shown in FIG. 図３は、本発明の導電膜付基板の１実施形態のガラス基板の周縁部を拡大した概略断面図である。FIG. 3 is a schematic cross-sectional view enlarging the peripheral portion of the glass substrate of one embodiment of the substrate with a conductive film of the present invention.

以下、図面を参照して本発明の導電膜付基板を説明する。
図１は、本発明の導電膜付基板の１実施形態を示す平面図である。図１に示す導電膜付基板は、ガラス基板１０と、ガラス基板１０の一方の主面上に配置された導電膜とを有する。但し、記載の都合上、図１では、導電膜が省略されている。
図２は、図１に示す導電膜付基板のＸ－Ｘ´線における概略断面図である。 Hereinafter, the substrate with a conductive film of the present invention will be described with reference to the drawings.
FIG. 1 is a plan view showing one embodiment of a substrate with a conductive film of the present invention. The substrate with a conductive film shown in FIG. 1 has a glass substrate 10 and a conductive film arranged on one main surface of the glass substrate 10 . However, for convenience of description, the conductive film is omitted in FIG.
FIG. 2 is a schematic cross-sectional view of the conductive film-attached substrate shown in FIG. 1, taken along line XX'.

図２に示す導電膜付基板の導電膜２０は周縁に傾斜部２３を有している。
本明細書において、導電膜２０の傾斜部２３とは、膜厚が略一定、具体的には、導電膜２０の膜厚の変化が中心部２１の膜厚に対して±２％以内の平坦部２２との境界Ｅ、Ｅ´から、導電膜２０の端部（縁端部）Ｃ、Ｃ´に向けて導電膜２０の膜厚が減少する部位を指す。
導電膜２０の中心部２１とは、ガラス基板１０の主面の中心と略同一であればよく、例えばガラス基板１０の主面の中心から１ｍｍの範囲内の任意の１点としてよい。
傾斜部２３は、図２に示すように、その導電膜２０の端部Ｃ、Ｃ´に向けて漸次膜厚が減少することが好ましい。傾斜部２３の端部とは、導電膜の膜厚が略一定である平坦部２２とは反対側に位置する傾斜部２３の端部である。 The conductive film 20 of the conductive film-attached substrate shown in FIG. 2 has an inclined portion 23 on the peripheral edge.
In this specification, the inclined portion 23 of the conductive film 20 has a substantially constant film thickness. It refers to a portion where the film thickness of the conductive film 20 decreases from boundaries E and E′ with the portion 22 toward end portions (edge portions) C and C′ of the conductive film 20 .
The central portion 21 of the conductive film 20 may be substantially the same as the center of the main surface of the glass substrate 10, and may be any point within a range of 1 mm from the center of the main surface of the glass substrate 10, for example.
As shown in FIG. 2, the sloped portion 23 preferably has a film thickness that gradually decreases toward the ends C and C' of the conductive film 20 . The end portion of the inclined portion 23 is the end portion of the inclined portion 23 located on the opposite side to the flat portion 22 in which the film thickness of the conductive film is substantially constant.

本発明の導電膜付基板における導電膜２０の大きさは、ガラス基板１０の寸法により異なるが、ガラス基板１０が１５２ｍｍ角のガラス基板の場合、導電膜２０は１４８ｍｍ角以上１５２ｍｍ角未満が好ましく、１５０ｍｍ角以上１５２ｍｍ角未満がより好ましい。 The size of the conductive film 20 in the substrate with a conductive film of the present invention varies depending on the size of the glass substrate 10, but when the glass substrate 10 is a glass substrate of 152 mm square, the conductive film 20 is preferably 148 mm square or more and less than 152 mm square. 150 mm square or more and less than 152 mm square is more preferable.

図２中、平坦部２２との境界Ｅ、Ｅ´と、導電膜２０の端部Ｃ、Ｃ´との距離で表される傾斜部２３の長さの平均値は、０．１０～２．５０ｍｍが好ましく、０．１０～１．６０ｍｍがより好ましい。なお、平坦部２２との境界Ｅ、Ｅ´と、導電膜２０の端部Ｃ、Ｃ´との距離で表される傾斜部２３の長さの平均値は、例えば、ガラス基板１０の角部から辺方向に１５ｍｍの位置計８点において傾斜部２３の長さを測定して、それらを算術平均した値である。 In FIG. 2, the average value of the length of the inclined portion 23 represented by the distance between the boundaries E, E' with the flat portion 22 and the ends C, C' of the conductive film 20 is 0.10 to 2.0. 50 mm is preferred, and 0.10 to 1.60 mm is more preferred. Note that the average value of the lengths of the inclined portions 23 represented by the distances between the boundaries E and E' with the flat portion 22 and the ends C and C' of the conductive film 20 is, for example, the corner portions of the glass substrate 10. It is a value obtained by measuring the length of the inclined portion 23 at eight positions of 15 mm in the side direction from 15 mm and arithmetically averaging the measured values.

本発明の導電膜付基板において、導電膜２０の端部Ｃ－Ｃ´間の距離で表される導電膜２０の最大長に対する、傾斜部２３の長さの比率は、１．７０％以下が好ましく、１．１０％以下がより好ましい。上記比率の下限は、０．０７％以上の場合が多い。 In the conductive film-attached substrate of the present invention, the ratio of the length of the inclined portion 23 to the maximum length of the conductive film 20 represented by the distance between the ends CC' of the conductive film 20 is 1.70% or less. Preferably, 1.10% or less is more preferable. The lower limit of the above ratio is often 0.07% or more.

本発明の導電膜付基板は、傾斜部２３における導電膜２０の厚さが導電膜２０の中心部２１の膜厚の１０％となる位置Ｄからガラス基板１０の縁端部Ａまでの距離（ｄ１）、および、傾斜部２３における導電膜２０の厚さが導電膜２０の中心部２１の膜厚の１０％となる位置Ｄ´からガラス基板１０の縁端部Ａ´までの距離（ｄ´１）が、それぞれ３．００ｍｍ以下である。なお、上記距離は、傾斜部２３における導電膜２０の膜厚が導電膜２０の中心部２１の膜厚の１０％となる位置から最も近いガラス基板１０の縁端部Ａまたは縁端部Ａ´までの距離に該当する。以下では、傾斜部２３における導電膜２０の厚さが導電膜２０の中心部２１の膜厚の１０％となる位置Ｄからガラス基板１０の縁端部Ａまでの距離（ｄ１）、および、傾斜部２３における導電膜２０の膜厚が導電膜２０の中心部２１の膜厚の１０％となる位置Ｄ´からガラス基板１０の縁端部Ａ´までの距離（ｄ´１）を、まとめて傾斜部２３の位置Ｄからガラス基板１０の縁端部Ａまでの距離（ｄ１）、とも記載する。
導電膜２０の厚さが、導電膜２０の中心部２１の膜厚の１０％となる部位は、傾斜部２３であってもガラス基板１０に対する密着性が十分高い。導電膜２０の傾斜部２３の位置Ｄからガラス基板１０の縁端部Ａまでの距離（ｄ１）が３．００ｍｍ以下であれば、導電膜２０の傾斜部２３の位置のＤがガラス基板１０の十分外側に位置しているため、静電チャック時に、導電膜２０の傾斜部２３のうち、膜厚が小さく、ガラス基板１０に対する密着性が低い部位が、静電チャックのクランプ構造物と接触する可能性が低い。そのため、導電膜２０の傾斜部２３の位置Ｄからガラス基板１０の縁端部Ａまでの距離（ｄ１）が３．００ｍｍ以下であれば、静電チャック時の振動や静電チャックのクランプ構造物との接触による導電膜の膜剥れが生じにくい。
なお、本発明の導電膜付基板における傾斜部２３の位置Ｄ、Ｄ´の場所によって、導電膜２０の傾斜部２３の位置Ｄ、Ｄ´からガラス基板１０の縁端部Ａ、Ａ´までの距離が異なる場合、導電膜２０の傾斜部２３の位置Ｄ、Ｄ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の最大値が３．００ｍｍ以下である。
導電膜２０の傾斜部２３の位置Ｄ、Ｄ´からガラス基板１０の縁端部Ａ、Ａ´までの距離（距離の最大値）は２．５０ｍｍ以下が好ましく、１．５０ｍｍ以下がより好ましく、１．００ｍｍ以下がさらに好ましい。上記距離の下限は、０．１０ｍｍ以上の場合が多い。
また、本発明の導電膜付基板は、傾斜部を有することで、傾斜部を有さない場合（導電膜の膜厚が一定である場合）と比較して、導電膜端部での膜応力を小さくすることができ、膜応力による膜剥離を抑制できる。また、導電膜付基板が傾斜部を有することで、導電膜の端部とガラス基板とがなす角を大きくでき、導電膜の端部とガラス基板が接触する部分に、洗浄時の薬液、およびパーティクル等の異物が留まることを抑制できる。 In the substrate with a conductive film of the present invention, the distance from the position D where the thickness of the conductive film 20 in the inclined portion 23 is 10% of the thickness of the central portion 21 of the conductive film 20 to the edge portion A of the glass substrate 10 ( d 1 ), and the distance (d ' 1 ) is 3.00 mm or less. The above distance is the edge A or edge A' of the glass substrate 10 closest to the position where the thickness of the conductive film 20 at the inclined portion 23 is 10% of the thickness at the central portion 21 of the conductive film 20. corresponds to the distance to Below, the distance (d 1 ) from the position D where the thickness of the conductive film 20 at the inclined portion 23 is 10% of the thickness of the central portion 21 of the conductive film 20 to the edge portion A of the glass substrate 10, and The distance (d' 1 ) from the position D' where the film thickness of the conductive film 20 in the inclined portion 23 is 10% of the film thickness of the central portion 21 of the conductive film 20 to the edge portion A' of the glass substrate 10 is summarized as follows: is also described as the distance (d 1 ) from the position D of the inclined portion 23 to the edge portion A of the glass substrate 10 .
At a portion where the thickness of the conductive film 20 is 10% of the thickness of the central portion 21 of the conductive film 20 , even the inclined portion 23 has sufficiently high adhesion to the glass substrate 10 . If the distance (d 1 ) from the position D of the inclined portion 23 of the conductive film 20 to the edge A of the glass substrate 10 is 3.00 mm or less, the position D of the inclined portion 23 of the conductive film 20 is , the portion of the inclined portion 23 of the conductive film 20 that has a small film thickness and low adhesion to the glass substrate 10 contacts the clamping structure of the electrostatic chuck during electrostatic chucking. unlikely to. Therefore, if the distance (d 1 ) from the position D of the inclined portion 23 of the conductive film 20 to the edge portion A of the glass substrate 10 is 3.00 mm or less, vibration during the electrostatic chuck and clamping structure of the electrostatic chuck It is difficult for the conductive film to peel off due to contact with an object.
Depending on the positions D and D' of the inclined portion 23 in the substrate with the conductive film of the present invention, the distance from the positions D and D' of the inclined portion 23 of the conductive film 20 to the edge portions A and A' of the glass substrate 10 is When the distances are different, the maximum distance from the positions D, D' of the inclined portion 23 of the conductive film 20 to the edge portions A, A' of the glass substrate 10 is 3.00 mm or less.
The distance (maximum distance) from the positions D, D' of the inclined portion 23 of the conductive film 20 to the edge portions A, A' of the glass substrate 10 is preferably 2.50 mm or less, more preferably 1.50 mm or less. 1.00 mm or less is more preferable. The lower limit of the above distance is often 0.10 mm or more.
In addition, since the substrate with the conductive film of the present invention has the inclined portion, the film stress at the end portion of the conductive film is reduced as compared with the case without the inclined portion (when the film thickness of the conductive film is constant). can be reduced, and film peeling due to film stress can be suppressed. In addition, since the conductive film-attached substrate has an inclined portion, the angle formed by the end of the conductive film and the glass substrate can be increased, and the chemical solution during cleaning and the Retention of foreign matter such as particles can be suppressed.

本発明の導電膜付基板は、導電膜２０の傾斜部２３の端部Ｃからガラス基板１０の縁端部Ａまでの距離（ｄ２）、および、導電膜２０の傾斜部２３の端部Ｃ´からガラス基板１０の縁端部Ａ´までの距離（ｄ´２）は、それぞれ０．００ｍｍ超である。なお、上記距離は、導電膜２０の傾斜部２３の端部から最も近いガラス基板１０の縁端部までの距離に該当する。以下では、導電膜２０の傾斜部２３の端部Ｃからガラス基板１０の縁端部Ａまでの距離（ｄ２）、および、導電膜２０の傾斜部２３の端部Ｃ´からガラス基板１０の縁端部Ａ´までの距離（ｄ´２）を、まとめて導電膜２０の傾斜部２３の端部Ｃからガラス基板１０の縁端部Ａまでの距離（ｄ２）とも記載する。
本発明の導電膜付基板を用いて反射型マスクブランクを作製する場合、ガラス基板の両方の主面に膜が形成される。すなわち、導電膜が形成された主面に対し裏面側の主面に反射多層膜および吸収層が形成される。そのため、ガラス基板の側面に着膜が生じると、ガラス基板の両方の主面に形成された膜間で導通が生じる可能性がある。ガラス基板の両方の面に形成された膜間で導通が生じると、反射型マスクブランクをパターニングして反射型フォトマスクを作製する際に実施する電子線描画において、既存技術である透過型のマスクブランクと等価回路が変化してしまうために、既存の電子線描画装置で設計通りのパターンを描画できなくなることがある。導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離が０．００ｍｍ超であれば、ガラス基板１０の側面に導電膜２０が存在しない。そのため、本発明の導電膜付基板を用いて反射型マスクブランクを作製した際に、ガラス基板の両方の主面に形成された膜間で導通が生じるおそれがない。
なお、本発明の導電膜付基板における傾斜部２３の端部Ｃ、Ｃ´の場所によって、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離が異なる場合、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の最小値が０．００ｍｍ超である。
導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の平均値は２．９０ｍｍ以下が好ましく、２．４０ｍｍ以下がより好ましく、１．４０ｍｍ以下がさらに好ましく、０．９０ｍｍ以下が特に好ましい。なお、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の平均値は、例えば、ガラス基板１０の角部から辺方向に１５ｍｍの位置計８点において導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離を測定して、それらを算術平均した値である。 In the substrate with a conductive film of the present invention, the distance (d 2 ) from the end C of the inclined portion 23 of the conductive film 20 to the edge A of the glass substrate 10 and the end C of the inclined portion 23 of the conductive film 20 ' to the edge A' of the glass substrate 10 (d' 2 ) is respectively greater than 0.00 mm. The above distance corresponds to the distance from the end of the inclined portion 23 of the conductive film 20 to the nearest edge of the glass substrate 10 . Below, the distance (d 2 ) from the end C of the inclined portion 23 of the conductive film 20 to the edge A of the glass substrate 10 and the distance (d 2 ) from the end C′ of the inclined portion 23 of the conductive film 20 to the glass substrate 10 The distance (d′ 2 ) to the edge A′ is also collectively referred to as the distance (d 2 ) from the edge C of the inclined portion 23 of the conductive film 20 to the edge A of the glass substrate 10 .
When a reflective mask blank is produced using the substrate with a conductive film of the present invention, films are formed on both main surfaces of the glass substrate. That is, the reflective multilayer film and the absorption layer are formed on the main surface on the back side with respect to the main surface on which the conductive film is formed. Therefore, if a film is deposited on the side surface of the glass substrate, there is a possibility that the films formed on both main surfaces of the glass substrate will conduct. When conduction occurs between the films formed on both sides of the glass substrate, the transmission type mask, which is an existing technology, is used in the electron beam lithography performed when patterning a reflective mask blank to fabricate a reflective photomask. Since the blank and the equivalent circuit change, the existing electron beam lithography system may not be able to write the pattern as designed. If the distance from the ends C, C' of the inclined portion 23 of the conductive film 20 to the edge portions A, A' of the glass substrate 10 exceeds 0.00 mm, the conductive film 20 does not exist on the side surfaces of the glass substrate 10. . Therefore, when a reflective mask blank is produced using the substrate with a conductive film of the present invention, there is no risk of electrical conduction between the films formed on both main surfaces of the glass substrate.
Depending on the locations of the ends C and C' of the inclined portion 23 in the conductive film-attached substrate of the present invention, the distance between the ends C and C' of the inclined portion 23 of the conductive film 20 and the edge portions A and A' of the glass substrate 10 varies. , the minimum distance from the ends C, C' of the inclined portion 23 of the conductive film 20 to the edge portions A, A' of the glass substrate 10 is more than 0.00 mm.
The average value of the distances from the ends C and C' of the inclined portion 23 of the conductive film 20 to the edge portions A and A' of the glass substrate 10 is preferably 2.90 mm or less, more preferably 2.40 mm or less. 40 mm or less is more preferable, and 0.90 mm or less is particularly preferable. The average value of the distances from the ends C and C' of the inclined portion 23 of the conductive film 20 to the edge portions A and A' of the glass substrate 10 is, for example, 15 mm in the side direction from the corner of the glass substrate 10. The distances from the ends C and C' of the inclined portion 23 of the conductive film 20 to the edge portions A and A' of the glass substrate 10 are measured at eight points of the position gauge, and the values are arithmetically averaged.

図１、２に示す導電膜付基板のように、ガラス基板１０の主面の周縁部に面取り面１２を有する場合、傾斜部の端部Ｃ、Ｃ´の少なくとも一部が面取り面１２内に位置するのが好ましく、傾斜部の端部Ｃ、Ｃ´の全てが面取り面１２内に位置するのがより好ましい。
上記態様について、図３を用いて説明する。図３は、本発明の導電膜付基板の１実施形態のガラス基板の周縁部を拡大した概略断面図である。図３は、ガラス基板の周縁部のうち、一方のみを拡大した概略断面図である。図３に示す導電膜付基板において、ガラス基板１０は、周縁部に面取り面１２を有しており、ガラス基板１０の一方の主面上に導電膜２０を有する。導電膜２０は、図２で説明した態様と同様の傾斜部２３を有している。図３に示す導電膜付基板では、傾斜部２３の端部Ｃは、面取り面１２内に位置している。なお、上記と同様に、傾斜部２３は、導電膜２０の中心部（図３では図示せず）の膜厚に対する膜厚の変化が±２％以内の平坦部２２との境界Ｅから、導電膜２０の端部Ｃに向けて導電膜２０の膜厚が減少する部位を指す。
なお、図３に示す導電膜付基板においても、傾斜部２３における導電膜２０の厚さが導電膜２０の中心部（図３では図示せず）の膜厚の１０％となる位置Ｄからガラス基板１０の縁端部Ａまでの距離は３．００ｍｍ以下であり、導電膜２０の傾斜部２３の端部Ｃからガラス基板１０の縁端部Ａまでの距離は０．００ｍｍ超である。上記それぞれの距離の好ましい範囲は、上述した態様と同様である。
図３は、ガラス基板１０の周縁部のうち、一方のみについて傾斜部２３の端部Ｃが面取り面１２内に位置する拡大図であったが、もう一方の傾斜部２３の端部Ｃ´についても同様に面取り面１２内に位置することが好ましい。
傾斜部の端部Ｃ、Ｃ´が面取り面１２内に位置すると、ガラス基板１０に対する導電膜２０の密着性が高くなるため、導電膜２０の膜剥がれが生じにくい。
但し、導電膜２０の中心部２１の膜厚の１０％となる位置Ｄ、Ｄ´が、ガラス基板１０の面取り面１２内に位置しない場合、導電膜２０の膜剥がれが生じにくい。そのため、位置Ｄ、Ｄ´が、ガラス基板１０の面取り面１２内に位置しないことが好ましい。 When the glass substrate 10 has a chamfered surface 12 along the periphery of its main surface, as in the conductive film-coated substrate shown in FIGS. Preferably, all of the ends C, C' of the ramp lie within the chamfer 12. As shown in FIG.
The above aspect will be described with reference to FIG. FIG. 3 is a schematic cross-sectional view enlarging the peripheral portion of the glass substrate of one embodiment of the substrate with a conductive film of the present invention. FIG. 3 is a schematic cross-sectional view enlarging only one of the peripheral edge portions of the glass substrate. In the conductive film-attached substrate shown in FIG. 3 , the glass substrate 10 has a chamfered surface 12 on the peripheral portion and has a conductive film 20 on one main surface of the glass substrate 10 . The conductive film 20 has an inclined portion 23 similar to the mode described with reference to FIG. In the conductive film-attached substrate shown in FIG. 3, the end portion C of the inclined portion 23 is positioned within the chamfered surface 12 . Note that, in the same manner as described above, the inclined portion 23 extends from the boundary E with the flat portion 22 where the change in film thickness with respect to the film thickness of the central portion (not shown in FIG. 3) of the conductive film 20 is within ±2%. It refers to a portion where the film thickness of the conductive film 20 decreases toward the end portion C of the film 20 .
3, the thickness of the conductive film 20 at the inclined portion 23 is 10% of the thickness of the central portion of the conductive film 20 (not shown in FIG. 3). The distance to the edge A of the substrate 10 is 3.00 mm or less, and the distance from the edge C of the inclined portion 23 of the conductive film 20 to the edge A of the glass substrate 10 is over 0.00 mm. The preferred ranges for each of the above distances are the same as those described above.
FIG. 3 is an enlarged view of only one of the peripheral edge portions of the glass substrate 10 in which the end C of the inclined portion 23 is positioned within the chamfered surface 12, but the end C' of the other inclined portion 23 is are preferably located within the chamfer 12 as well.
When the ends C and C' of the inclined portion are positioned within the chamfered surface 12, the adhesion of the conductive film 20 to the glass substrate 10 is increased, so that the conductive film 20 is less likely to peel off.
However, if the positions D and D' corresponding to 10% of the film thickness of the central portion 21 of the conductive film 20 are not located within the chamfered surface 12 of the glass substrate 10, the conductive film 20 is less likely to peel off. Therefore, it is preferable that the positions D and D' do not lie within the chamfered surface 12 of the glass substrate 10 .

本発明の導電膜付基板の導電膜２０は、ヤング率が５０．０ＧＰａ以上であることが好ましく、１００．０ＧＰａ以上であることがより好ましい。ヤング率の上限は、４００．０ＧＰａ以下の場合が多い。導電膜２０のヤング率が５０．０ＧＰａ以上であると、導電膜２０が表面硬度に優れており、静電チャック時に膜剥がれが生じにくい。 The conductive film 20 of the substrate with a conductive film of the present invention preferably has a Young's modulus of 50.0 GPa or more, more preferably 100.0 GPa or more. The upper limit of Young's modulus is often 400.0 GPa or less. When the Young's modulus of the conductive film 20 is 50.0 GPa or more, the conductive film 20 has excellent surface hardness and is less likely to peel off during electrostatic chucking.

本発明の導電膜付基板の導電膜２０は、シート抵抗が１５０．００Ω／ｓｑ以下であることが好ましく、１００．００Ω／ｓｑ以下であることがより好ましく、３０．００Ω／ｓｑ以下であることがさらに好ましい。シート抵抗の下限は、０．１０Ω／ｓｑ以上の場合が多い。シート抵抗が１００．００Ω／ｓｑ以下であると、導電膜付基板を確実に静電チャックすることができる。 The conductive film 20 of the substrate with a conductive film of the present invention preferably has a sheet resistance of 150.00 Ω/sq or less, more preferably 100.00 Ω/sq or less, and 30.00 Ω/sq or less. is more preferred. The lower limit of the sheet resistance is often 0.10Ω/sq or more. When the sheet resistance is 100.00Ω/sq or less, the conductive film-attached substrate can be reliably electrostatically chucked.

本発明の導電膜付基板の導電膜２０は、クロム（Ｃｒ）、タンタル（Ｔａ）、ケイ素（Ｓｉ）、チタン（Ｔｉ）、ジルコニウム（Ｚｒ）、ハフニウム（Ｈｆ）およびゲルマニウム（Ｇｅ）からなる群から選択される少なくとも１種を含むことが好ましい。導電膜２０がこれらの元素を含むと、導電膜２０のシート抵抗が低くなるため、静電チャック時のチャック力が向上する。
上記の元素を含む導電膜２０の構成材料の具体例としては、ＣｒＮ、ＴａＢ、ＳｉＮ、ＴｉＮ、ＺｒＮ、ＨｆＮ、Ｇｅ単体、Ｓｉ単体が挙げられる。 The conductive film 20 of the substrate with a conductive film of the present invention is a group consisting of chromium (Cr), tantalum (Ta), silicon (Si), titanium (Ti), zirconium (Zr), hafnium (Hf) and germanium (Ge). It is preferable to include at least one selected from. When the conductive film 20 contains these elements, the sheet resistance of the conductive film 20 is lowered, so that the chucking force during electrostatic chucking is improved.
Specific examples of the constituent material of the conductive film 20 containing the above elements include CrN, TaB, SiN, TiN, ZrN, HfN, simple Ge, and simple Si.

導電膜２０は、中心部２１の膜厚が５ｎｍ以上であることが好ましい。導電膜２０の中心部２１の膜厚が５ｎｍ以上だと、静電チャック時にチャック力が十分であり、静電チャック時に高電圧を引加してもガラス基板１０が絶縁破壊するおそれがない。中心部２１の膜厚は１０ｎｍ以上がより好ましく、２０ｎｍ以上がさらに好ましい。
導電膜２０は、中心部２１の膜厚が５００ｎｍ以下であることが好ましい。導電膜２０の中心部２１の膜厚が５００ｎｍ以下だと、導電膜２０の形成に要する時間が増加することがなく、導電膜２０の形成に要するコストが増加することがない。また、導電膜２０の膜厚が必要以上に大きくないため、膜剥れが発生するおそれが増加することがない。導電膜２０の中心部２１の膜厚は４５０ｎｍ以下がより好ましく、４００ｎｍ以下がさらに好ましい。
なお、導電膜２０の中心部２１の膜厚は、Ｘ線反射法（ＸＸＲ）、Ｘ線蛍光分析法（ＸＲＦ）、断面ＳＥＭ、断面ＴＥＭ、エリプソメトリー等、公知の手段で測定できる。これらの中でも、精度の観点から、断面ＳＥＭおよび断面ＴＥＭが好ましい。 The conductive film 20 preferably has a film thickness of 5 nm or more at the central portion 21 . When the film thickness of the central portion 21 of the conductive film 20 is 5 nm or more, the chucking force is sufficient during electrostatic chucking, and there is no risk of dielectric breakdown of the glass substrate 10 even if a high voltage is applied during electrostatic chucking. The film thickness of the central portion 21 is more preferably 10 nm or more, more preferably 20 nm or more.
The conductive film 20 preferably has a film thickness of 500 nm or less at the central portion 21 . When the thickness of the central portion 21 of the conductive film 20 is 500 nm or less, the time required for forming the conductive film 20 does not increase, and the cost required for forming the conductive film 20 does not increase. Moreover, since the film thickness of the conductive film 20 is not excessively large, the risk of film peeling does not increase. The film thickness of the central portion 21 of the conductive film 20 is more preferably 450 nm or less, and even more preferably 400 nm or less.
The film thickness of the central portion 21 of the conductive film 20 can be measured by known means such as X-ray reflection method (XXR), X-ray fluorescence spectrometry (XRF), cross-sectional SEM, cross-sectional TEM, and ellipsometry. Among these, cross-sectional SEM and cross-sectional TEM are preferable from the viewpoint of accuracy.

本発明の導電膜付基板において、導電膜２０は、公知の成膜方法、例えば、マグネトロンスパッタリング法、イオンビームスパッタリング法などのスパッタリング法；ＣＶＤ法；真空蒸着法といった乾式成膜法を用いて形成できる。例えば、導電膜２０として、ＣｒＮ膜を形成する場合、ターゲットをＣｒターゲットとし、スパッタガスをＡｒとＮ２の混合ガスとして、マグネトロンスパッタリング法を用いて導電膜を形成すればよい。また、例えば、導電膜２０として、ＴａＢ膜を形成する場合、ＴａＢの化合物ターゲットを使用し、スパッタガスをＡｒガスとして、マグネトロンスパッタリング法を用いて導電膜を形成すればよい。 In the conductive film-attached substrate of the present invention, the conductive film 20 is formed using a known film-forming method, for example, a sputtering method such as a magnetron sputtering method or an ion beam sputtering method; a CVD method; or a dry film-forming method such as a vacuum deposition method. can. For example, when a CrN film is formed as the conductive film 20, the conductive film may be formed by magnetron sputtering using a Cr target as a target and a mixed gas of Ar and N2 as a sputtering gas. Further, for example, when a TaB film is formed as the conductive film 20, the conductive film may be formed by using a TaB compound target, using Ar gas as the sputtering gas, and using a magnetron sputtering method.

また、面取り部に精度良く導電膜を成膜する際、成膜装置の精密な制御が求められる場合がある。面取り部に対して製膜を行う場合、例えば、特願２０２１－１３９５２１に記載の基板保持装置を用いてガラス基板を保持すると、精度よく位置調整ができ、精度良く導電膜を成膜可能である。 In addition, when forming a conductive film on the chamfered portion with high accuracy, there are cases where precise control of the film forming apparatus is required. When forming a film on the chamfered portion, for example, by holding the glass substrate using the substrate holding device described in Japanese Patent Application No. 2021-139521, the position can be adjusted with high precision, and the conductive film can be formed with high precision. .

本発明の導電膜付基板のガラス基板１０を構成するガラスは、熱膨張係数が小さくかつそのばらつきの小さいことが好ましい。具体的には２０℃における熱膨張係数の絶対値が６００ｐｐｂ／℃以下の低熱膨張ガラスが好ましく、２０℃における熱膨張係数が４００ｐｐｂ／℃以下の超低熱膨張ガラスがより好ましく、２０℃における熱膨張係数が１００ｐｐｂ／℃以下の超低熱膨張ガラスがさらに好ましく、２０℃における熱膨張係数が３０ｐｐｂ／℃以下の超低熱膨張ガラスが特に好ましい。
上記低熱膨張ガラスおよび超低熱膨張ガラスとしては、ＳｉＯ２を主成分とするガラス、典型的には合成石英ガラスが使用できる。具体的には、例えば合成石英ガラスや、ＳｉＯ２を主成分とし１～１２質量％のＴｉＯ２を含む合成石英ガラスが挙げられる。 The glass constituting the glass substrate 10 of the substrate with a conductive film of the present invention preferably has a small coefficient of thermal expansion and a small variation in coefficient of thermal expansion. Specifically, a low thermal expansion glass having an absolute value of a thermal expansion coefficient of 600 ppb/°C or less at 20°C is preferable, and an ultra-low thermal expansion glass having a thermal expansion coefficient of 400 ppb/°C or less at 20°C is more preferable. An ultra-low thermal expansion glass with a coefficient of 100 ppb/°C or less is more preferable, and an ultra-low thermal expansion glass with a thermal expansion coefficient of 30 ppb/°C or less at 20°C is particularly preferable.
As the low thermal expansion glass and ultra-low thermal expansion glass, glass containing SiO 2 as a main component, typically synthetic quartz glass, can be used. Specifically, for example, synthetic quartz glass and synthetic quartz glass containing SiO 2 as a main component and 1 to 12% by mass of TiO 2 can be used.

ガラス基板１０の大きさや厚さ等は、本発明の導電膜付基板を用いて作製される反射型マスクブランクの設計値等により適宜決定される。一例を挙げると、外形１５２ｍｍ角で、厚さ６．３ｍｍである。ガラス基板１０が面取り面１２を有する場合、ガラス基板１０の縁端部Ａ、Ａ´からガラス基板１０の主面の端部Ｂ、Ｂ´までの距離で表される面取り面１２の幅はガラス基板の仕様によって異なるが、１５２ｍｍ角のガラス基板の場合、０．２～０．６ｍｍである。 The size, thickness, etc., of the glass substrate 10 are appropriately determined according to the design values, etc. of the reflective mask blank produced using the substrate with a conductive film of the present invention. For example, it has an outer shape of 152 mm square and a thickness of 6.3 mm. When the glass substrate 10 has the chamfered surface 12, the width of the chamfered surface 12 represented by the distance from the edge portions A, A' of the glass substrate 10 to the ends B, B' of the main surface of the glass substrate 10 is glass. Although it depends on the specifications of the substrate, it is 0.2 to 0.6 mm for a 152 mm square glass substrate.

本発明の反射型マスクブランクは、本発明の導電膜付基板と、導電膜付基板のガラス基板の導電膜が配置された主面とは反対側の主面上に配置された、ＥＵＶ光を反射する反射層と、反射層上に配置された、ＥＵＶ光を吸収する吸収層とを有する。 The reflective mask blank of the present invention includes a substrate with a conductive film of the present invention, and a glass substrate of the substrate with a conductive film, which is disposed on the main surface opposite to the main surface on which the conductive film is disposed, and emits EUV light. It has a reflective layer which is reflective and an absorber layer which is arranged on the reflective layer and which absorbs EUV light.

反射層は、反射型マスクブランクの反射層として、特に、ＥＵＶ光の反射率が高い特性が要求される。具体的には、ＥＵＶ光を入射角６度で反射層表面に照射した際に、波長１３．５ｎｍ付近の光線反射率の最大値は、６０％以上が好ましく、６３％以上がより好ましく、６５％以上がさらに好ましい。 As a reflective layer of a reflective mask blank, the reflective layer is particularly required to have a high reflectance for EUV light. Specifically, when the reflective layer surface is irradiated with EUV light at an incident angle of 6 degrees, the maximum light reflectance at a wavelength of around 13.5 nm is preferably 60% or more, more preferably 63% or more, and 65% or more. % or more is more preferable.

反射層は、高いＥＵＶ光の反射率を達成できることから、通常はＥＵＶ光に対して高い屈折率を示す高屈折率層と、ＥＵＶ光に対して低い屈折率を示す低屈折率層を交互に複数回積層させた多層反射膜が用いられる。反射層が多層反射膜の場合、高屈折率層には、Ｓｉが広く使用され、低屈折率層にはＭｏが広く使用される。すなわち、Ｍｏ／Ｓｉ多層反射膜が最も一般的である。但し、多層反射膜はこれに限定されず、Ｒｕ／Ｓｉ多層反射膜、Ｍｏ／Ｂｅ多層反射膜、Ｍｏ化合物／Ｓｉ化合物多層反射膜、Ｓｉ／Ｍｏ／Ｒｕ多層反射膜、Ｓｉ／Ｍｏ／Ｒｕ／Ｍｏ多層反射膜、Ｓｉ／Ｒｕ／Ｍｏ／Ｒｕ多層反射膜も使用できる。 Since the reflective layer can achieve a high reflectance of EUV light, a high refractive index layer that exhibits a high refractive index for EUV light and a low refractive index layer that exhibits a low refractive index for EUV light are alternately formed. A multi-layer reflective film that is laminated multiple times is used. When the reflective layer is a multilayer reflective film, Si is widely used for the high refractive index layer and Mo is widely used for the low refractive index layer. That is, Mo/Si multilayer reflective films are the most common. However, the multilayer reflective film is not limited to this, and Ru/Si multilayer reflective film, Mo/Be multilayer reflective film, Mo compound/Si compound multilayer reflective film, Si/Mo/Ru multilayer reflective film, Si/Mo/Ru/ A Mo multilayer reflective film and a Si/Ru/Mo/Ru multilayer reflective film can also be used.

反射層をなす多層反射膜を構成する各層の膜厚および層の繰り返し単位の数は、使用する膜材料および反射層に要求されるＥＵＶ光の反射率に応じて適宜選択できる。Ｍｏ／Ｓｉ多層反射膜を例にとると、ＥＵＶ光の反射率の最大値が６０％以上の反射層４０とするには、多層反射膜は膜厚２．３±０．１ｎｍのＭｏ膜と、膜厚４．５±０．１ｎｍのＳｉ膜とを繰り返し単位数が３０～６０になるように積層させればよい。 The film thickness of each layer and the number of repeating units of layers constituting the multilayer reflective film forming the reflective layer can be appropriately selected according to the film material to be used and the EUV light reflectance required for the reflective layer. Taking a Mo/Si multilayer reflective film as an example, in order to make the reflective layer 40 having a maximum EUV light reflectance of 60% or more, the multilayer reflective film should be a Mo film with a film thickness of 2.3±0.1 nm. , and a Si film having a film thickness of 4.5±0.1 nm are laminated so that the number of repeating units is 30 to 60.

なお、反射層が多層反射膜の場合、本発明の導電膜付基板を静電チャックで保持して、多層反射膜を構成する各層を、マグネトロンスパッタリング法、イオンビームスパッタリング法といったスパッタリング法を用いて所望の厚さになるように、ガラス基板の導電膜が形成された主面に対し裏面側の主面に成膜する。 When the reflective layer is a multilayer reflective film, the conductive film-coated substrate of the present invention is held with an electrostatic chuck, and each layer constituting the multilayer reflective film is sputtered using a sputtering method such as magnetron sputtering or ion beam sputtering. A film is formed on the main surface of the glass substrate on the back side with respect to the main surface on which the conductive film is formed so as to have a desired thickness.

吸収層に特に要求される特性は、ＥＵＶ光線反射率が極めて低いことである。具体的には、ＥＵＶ光の波長領域の光線を吸収層表面に照射した際の、波長１３．５ｎｍ付近の最大光線反射率は、５％以下が好ましく、３％以下がより好ましく、１％以下が特に好ましい。 A particularly required property of the absorber layer is a very low EUV light reflectance. Specifically, the maximum light reflectance near a wavelength of 13.5 nm is preferably 5% or less, more preferably 3% or less, and 1% or less when the absorption layer surface is irradiated with light in the wavelength range of EUV light. is particularly preferred.

上記の特性を達成するため、吸収層は、ＥＵＶ光の吸収係数が高い材料で構成される。ＥＵＶ光の吸収係数が高い材料としては、タンタル（Ｔａ）を主成分とする材料を用いることが好ましい。本明細書において、タンタル（Ｔａ）を主成分とする材料と言った場合、当該材料中Ｔａを２０ａｔ％以上含む材料を意味する。 In order to achieve the above properties, the absorption layer is made of a material with a high absorption coefficient for EUV light. A material containing tantalum (Ta) as a main component is preferably used as a material having a high absorption coefficient of EUV light. In this specification, a material containing tantalum (Ta) as a main component means a material containing 20 atomic % or more of Ta.

吸収層に用いるＴａを主成分とする材料は、Ｔａ以外にハフニウム（Ｈｆ）、ケイ素（Ｓｉ）、ジルコニウム（Ｚｒ）、ゲルマニウム（Ｇｅ）、ホウ素（Ｂ）、パラジウム（Ｐｄ）、錫（Ｓｎ）、クロム（Ｃｒ）、マンガン（Ｍｎ）、鉄（Ｆｅ）、コバルト（Ｃｏ）、銀（Ａｇ）、カドミウム（Ｃｄ）、インジウム（Ｉｎ）、アンチモン（Ｓｂ）、タングステン（Ｗ）、レニウム（Ｒｅ）、オスミウム（Ｏｓ）、イリジウム（Ｉｒ）、白金（Ｐｔ）、金（Ａｕ）、タリウム（Ｔｌ）、鉛（Ｐｂ）、ビスマス（Ｂｉ）、炭素（Ｃ）、チタン（Ｔｉ）、ジルコニウム（Ｚｒ）、モリブデン（Ｍｏ）、ルテニウム（Ｒｕ）、ロジウム（Ｒｈ）、パラジウム（Ｐｄ）、カルシウム（Ｃａ）、マグネシウム（Ｍｇ）、アルミニウム（Ａｌ）、ニッケル（Ｎｉ）、銅（Ｃｕ）、亜鉛（Ｚｎ）、ガリウム（Ｇａ）、ヒ素（Ａｓ）、セレン（Ｓｅ）、テルル（Ｔｅ）、水素（Ｈ）および窒素（Ｎ）のうち少なくとも１成分を含むことが好ましい。Ｔａ以外の上記の元素を含む材料の具体例としては、例えば、ＴａＮ、ＴａＮＨ、ＴａＨｆ、ＴａＨｆＮ、ＴａＢＳｉ、ＴａＢＳｉＮ、ＴａＢ、ＴａＢＮ、ＴａＳｉ、ＴａＳｉＮ、ＴａＧｅ、ＴａＧｅＮ、ＴａＺｒ、ＴａＺｒＮ、ＴａＰｄ、ＴａＳｎ、ＴａＰｄＮ、ＴａＳｎ、ＴａＣｒ、ＴａＭｎ、ＴａＦｅ、ＴａＣｏ、ＴａＡｇ、ＴａＣｄ、ＴａＩｎ、ＴａＳｂ、ＴａＷが挙げられる。 Materials containing Ta as a main component used for the absorption layer include hafnium (Hf), silicon (Si), zirconium (Zr), germanium (Ge), boron (B), palladium (Pd), and tin (Sn) in addition to Ta. , chromium (Cr), manganese (Mn), iron (Fe), cobalt (Co), silver (Ag), cadmium (Cd), indium (In), antimony (Sb), tungsten (W), rhenium (Re) , osmium (Os), iridium (Ir), platinum (Pt), gold (Au), thallium (Tl), lead (Pb), bismuth (Bi), carbon (C), titanium (Ti), zirconium (Zr) , Molybdenum (Mo), Ruthenium (Ru), Rhodium (Rh), Palladium (Pd), Calcium (Ca), Magnesium (Mg), Aluminum (Al), Nickel (Ni), Copper (Cu), Zinc (Zn) , gallium (Ga), arsenic (As), selenium (Se), tellurium (Te), hydrogen (H) and nitrogen (N). Specific examples of materials containing the above elements other than Ta include TaN, TaNH, TaHf, TaHfN, TaBSi, TaBSiN, TaB, TaBN, TaSi, TaSiN, TaGe, TaGeN, TaZr, TaZrN, TaPd, TaSn, and TaPdN. , TaSn, TaCr, TaMn, TaFe, TaCo, TaAg, TaCd, TaIn, TaSb, TaW.

上記した構成の吸収層は、本発明の多層反射膜付基板の導電膜を静電チャックで保持して、マグネトロンスパッタリング法やイオンビームスパッタリング法といったスパッタリング法を用いて、反射層上に成膜する。 The absorption layer having the above structure is formed on the reflection layer by holding the conductive film of the substrate with a multilayer reflection film of the present invention with an electrostatic chuck and using a sputtering method such as magnetron sputtering or ion beam sputtering. .

吸収層の膜厚は、２０ｎｍ～９０ｎｍが好ましい。 The film thickness of the absorption layer is preferably 20 nm to 90 nm.

本発明の反射型マスクブランクでは、反射層と吸収層との間に保護層が形成されてもよい。保護層は、吸収層をエッチングして、吸収層にマスクパターンを形成する際に、反射層がエッチングによるダメージを受けないよう、反射層を保護することを目的として設けられる。したがって保護層の材質としては、吸収層のエッチングによる影響を受けにくい、つまりこのエッチング速度が吸収層よりも遅く、しかもこのエッチングによるダメージを受けにくい物質が選択される。この条件を満たす物質としては、例えばＣｒ、Ａｌ、Ｔａおよびこれらの窒化物、ＲｕおよびＲｕ化合物（ＲｕＢ、ＲｕＳｉ等）、ならびにＳｉＯ２、Ｓｉ３Ｎ４、Ａｌ２Ｏ３やこれらの混合物が例示される。
また、保護層を形成する場合、その厚さは１ｎｍ～６０ｎｍが好ましく、１ｎｍ～４０ｎｍがより好ましい。 A protective layer may be formed between the reflective layer and the absorbing layer in the reflective mask blank of the present invention. The protective layer is provided for the purpose of protecting the reflective layer from being damaged by etching when the reflective layer is etched to form a mask pattern on the reflective layer. Therefore, as the material for the protective layer, a material is selected which is less affected by the etching of the absorption layer, that is, the etching rate is lower than that of the absorption layer and the material is less likely to be damaged by this etching. Examples of substances satisfying this condition include Cr, Al, Ta and their nitrides, Ru and Ru compounds (RuB, RuSi, etc.), SiO 2 , Si 3 N 4 , Al 2 O 3 and mixtures thereof. be done.
When forming a protective layer, its thickness is preferably 1 nm to 60 nm, more preferably 1 nm to 40 nm.

以下に実施例を用いて本発明をさらに詳しく説明するが、本発明はこれら実施例に限定されるものではない。例１～例５のうち、例１～例４が実施例であり、例５が比較例である。 EXAMPLES The present invention will be described in more detail below using examples, but the present invention is not limited to these examples. Among Examples 1 to 5, Examples 1 to 4 are examples, and Example 5 is a comparative example.

例１
例１では、図１、２に示す導電膜付基板を作製した。
成膜用のガラス基板１０として、ＳｉＯ２－ＴｉＯ２系のガラス基板（外形６インチ（１５２ｍｍ）角、厚さが６．３ｍｍ、面取り面１２の幅が０．４ｍｍ）を使用した。 Example 1
In Example 1, a substrate with a conductive film shown in FIGS. 1 and 2 was produced.
As the glass substrate 10 for film formation, a SiO 2 —TiO 2 -based glass substrate (external size of 6 inches (152 mm) square, thickness of 6.3 mm, width of chamfered surface 12 of 0.4 mm) was used.

次に、ターゲットとして、ガラス基板１０の一方の主面に、マグネトロンスパッタリング法を用いて、導電膜２０としてＣｒＮ膜を形成して、図１、２に示す導電膜付基板を作製した。ＣｒＮ膜の形成時、Ｃｒターゲットを使用し、スパッタガスとして、ＡｒとＮ２の混合ガスを使用した。
ＣｒＮ膜が形成される領域を制限するため、特願２０２１－１３９５２１に記載されている基板保持装置を用いてガラス基板１０を保持し、ガラス基板１０上に、所定の開口サイズの遮蔽部材をガラス基板との間隔が所定となるよう配置した。
作製した導電膜付基板は、導電膜２０の端部に傾斜部２３を有しており、傾斜部２３における導電膜２０の厚さが導電膜２０の中心部２１の膜厚の１０％となる位置Ｄ、Ｄ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の最大値は２．８５ｍｍであり、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離は０ｍｍ超であった。また、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´は、ガラス基板１０の面取り面内に位置していなかった。なお、傾斜部２３は、その端部Ｃ、Ｃ´に向けて漸次膜厚が減少していた。
また、導電膜２０の長さを表す傾斜部２３の端部Ｃ－Ｃ´間の距離の平均値は１４９．９０ｍｍであり、傾斜部２３の端部Ｃ、Ｃ´と、ガラス基板の縁端部Ａ、Ａ´との距離の平均値は１．０５ｍｍであり、傾斜部２３の長さを表す平坦部２２との境界Ｅ、Ｅ´と、傾斜部２３の端部Ｃ、Ｃ´との距離の平均値は２．５０ｍｍであった。これらの平均値は、ガラス基板１０の角部から辺方向に１５ｍｍの位置計８点において測定して、それらを算術平均した値である。
導電膜２３のヤング率をｉＭｉｃｒｏ（ＫＬＡ社）を用いて測定したところ、導電膜２３のヤング率は、２４２．３ＧＰａであった。
導電膜２３のシート抵抗をロレスタ－ＧＸ（日東精工アナリテック社）を用いて測定したところ、導電膜２３のシート抵抗値は、２．６１Ω／□であった。
作製した導電膜付基板の導電膜２０を静電チャックのチャック面に吸着させ、真空中で静電チャックを３０ｒｐｍで回転させながら２時間保持した。静電チャックは、チャック面は円形であり、最も外側に位置する電極間距離は１４１．５ｍｍであった。静電チャックの電極間電圧は１２００Ｖとした。
上記の手順で導電膜付基板を６枚作製した。作製した導電膜付基板について、静電チャックによる保持前後の欠陥数を、欠陥検査装置を用いて測定した。具体的には、導電膜付基板の導電膜が形成されている側の面における、大きさ１００～１５０ｎｍの欠陥の数（欠陥数）を、検査エリアを１４６ｍｍ角として測定した。静電チャックによる保持前後の欠陥数の差を求め、６枚の導電膜付き基板の平均値を１４６ｍｍ角検査エリア領域の欠陥数として示した。１４６ｍｍ角検査エリア領域の欠陥数が１５以下の場合、静電チャック時のパーティクルの発生が少ない。 Next, a CrN film was formed as the conductive film 20 on one main surface of the glass substrate 10 as a target by using the magnetron sputtering method to fabricate the substrate with the conductive film shown in FIGS. When forming the CrN film, a Cr target was used, and a mixed gas of Ar and N2 was used as a sputtering gas.
In order to limit the region where the CrN film is formed, the glass substrate 10 is held using the substrate holding device described in Japanese Patent Application No. 2021-139521, and a shielding member having a predetermined opening size is placed on the glass substrate 10. They were arranged so that a predetermined distance from the substrate was obtained.
The manufactured substrate with a conductive film has inclined portions 23 at the ends of the conductive film 20 , and the thickness of the conductive film 20 at the inclined portions 23 is 10% of the thickness of the central portion 21 of the conductive film 20 . The maximum distance from the positions D, D' to the edge portions A, A' of the glass substrate 10 is 2.85 mm, and the distance from the edge portions C, C' of the inclined portion 23 of the conductive film 20 to the edge of the glass substrate 10 The distance to the ends A, A' was greater than 0 mm. Also, the ends C and C' of the inclined portion 23 of the conductive film 20 were not located within the chamfered surface of the glass substrate 10 . In addition, the film thickness of the inclined portion 23 gradually decreased toward the end portions C and C'.
The average value of the distance between the ends C and C' of the inclined portion 23 representing the length of the conductive film 20 is 149.90 mm. The average value of the distance between the portions A and A' is 1.05 mm. The average distance was 2.50 mm. These average values are arithmetic average values obtained by measuring at eight points of a position gauge 15 mm from the corner of the glass substrate 10 in the side direction.
When the Young's modulus of the conductive film 23 was measured using iMicro (KLA), the Young's modulus of the conductive film 23 was 242.3 GPa.
When the sheet resistance of the conductive film 23 was measured using a Loresta-GX (Nitto Seiko Analytic Tech Co., Ltd.), the sheet resistance value of the conductive film 23 was 2.61Ω/□.
The conductive film 20 of the manufactured substrate with a conductive film was adhered to the chuck surface of an electrostatic chuck, and held for 2 hours while rotating the electrostatic chuck at 30 rpm in vacuum. The electrostatic chuck had a circular chuck surface, and the distance between the outermost electrodes was 141.5 mm. The voltage between the electrodes of the electrostatic chuck was set to 1200V.
Six substrates with a conductive film were produced by the above procedure. The number of defects of the produced conductive film-attached substrate before and after being held by the electrostatic chuck was measured using a defect inspection apparatus. Specifically, the number of defects (number of defects) having a size of 100 to 150 nm on the side of the conductive film-coated substrate was measured with an inspection area of 146 mm square. The difference in the number of defects before and after holding by the electrostatic chuck was obtained, and the average value of the six substrates with the conductive film was shown as the number of defects in the inspection area of 146 mm square. When the number of defects in the inspection area of 146 mm square is 15 or less, particles are less generated during electrostatic chucking.

（例２、３）
遮蔽部材の開口サイズとガラス基板との間隔を変更した以外は、例１と同様の手順で導電膜付基板を作製した。作製した導電膜付基板は、導電膜２０の端部に傾斜部２３を有しており、傾斜部２３における導電膜２０の厚さが導電膜２０の中心部２１の膜厚の１０％となる位置Ｄ、Ｄ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の最大値が下記表に示す値であり、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離は０ｍｍ超であり、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´は、ガラス基板１０の面取り面内に位置していた。
また、端部Ｃ－Ｃ´間の距離の平均値、端部Ｃ、Ｃ´と、縁端部Ａ、Ａ´との距離の平均値、境界Ｅ、Ｅ´と、端部Ｃ、Ｃ´との距離の平均値、導電膜２３のヤング率およびシート抵抗値は下記表に示す値であった。
導電膜付基板は、各々６枚作製し、静電チャックによる吸着保持前後の欠陥数を測定した。６枚の導電膜付き基板の平均値を１４６ｍｍ角検査エリア領域の欠陥数として示した。結果を下記表に示す。 (Examples 2 and 3)
A substrate with a conductive film was produced in the same procedure as in Example 1, except that the size of the opening of the shielding member and the distance between the glass substrate were changed. The manufactured substrate with a conductive film has inclined portions 23 at the ends of the conductive film 20 , and the thickness of the conductive film 20 at the inclined portions 23 is 10% of the thickness of the central portion 21 of the conductive film 20 . The maximum values of the distances from the positions D, D' to the edge portions A, A' of the glass substrate 10 are the values shown in the table below. was more than 0 mm, and the ends C and C' of the inclined portion 23 of the conductive film 20 were positioned within the chamfered surface of the glass substrate 10 .
Further, the average value of the distance between the ends C and C', the average value of the distances between the ends C and C' and the edges A and A', the boundaries E and E' and the ends C and C' , the Young's modulus and the sheet resistance of the conductive film 23 are shown in the table below.
Six conductive film-attached substrates were produced, and the number of defects before and after adsorption and holding by an electrostatic chuck was measured. The average value of six substrates with a conductive film is shown as the number of defects in a 146 mm square inspection area. The results are shown in the table below.

（例４）
ＴａＢ化合物ターゲットを使用し、スパッタガスとして、Ａｒガスを使用して、ガラス基板１０の一方の主面に形成する導電膜２０としてＴａＢ膜を形成した点、および遮蔽部材の開口サイズとガラス基板との間隔を変更した点以外は、例１と同様の手順で導電膜付基板を作製した。導電膜付基板は、導電膜２０の端部に傾斜部２３を有しており、傾斜部２３における導電膜２０の厚さが導電膜２０の中心部２１の膜厚の１０％となる位置Ｄ、Ｄ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の最大値が下記表に示す値であり、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離は０ｍｍ超であり、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´は、ガラス基板１０の面取り面内に位置していた。
また、端部Ｃ－Ｃ´間の距離の平均値、端部Ｃ、Ｃ´と、縁端部Ａ、Ａ´との距離の平均値、境界Ｅ、Ｅ´と、端部Ｃ、Ｃ´との距離の平均値、導電膜２３のヤング率およびシート抵抗値は下記表に示す値であった。
導電膜付基板は６枚作製し、静電チャックによる吸着保持前後の欠陥数を測定した。６枚の導電膜付き基板の平均値を１４６ｍｍ角検査エリア領域の欠陥数として示した。結果を下記表に示す。 (Example 4)
A TaB compound target is used, Ar gas is used as a sputtering gas, and a TaB film is formed as the conductive film 20 formed on one main surface of the glass substrate 10, and the aperture size of the shielding member and the glass substrate A substrate with a conductive film was produced in the same manner as in Example 1, except that the interval between . The conductive film-coated substrate has inclined portions 23 at the ends of the conductive film 20, and the thickness of the conductive film 20 at the inclined portions 23 is 10% of the thickness of the central portion 21 of the conductive film 20 at a position D. , D' to the edge portions A, A' of the glass substrate 10 are the values shown in the table below. The distance to the ends A and A' was more than 0 mm, and the ends C and C' of the inclined portion 23 of the conductive film 20 were located within the chamfered surface of the glass substrate 10. FIG.
Further, the average value of the distance between the ends C and C', the average value of the distances between the ends C and C' and the edges A and A', the boundaries E and E' and the ends C and C' , the Young's modulus and the sheet resistance of the conductive film 23 are shown in the table below.
Six substrates with a conductive film were produced, and the number of defects before and after adsorption and holding by an electrostatic chuck was measured. The average value of six substrates with a conductive film is shown as the number of defects in a 146 mm square inspection area. The results are shown in the table below.

（例５）
遮蔽部材の開口サイズとガラス基板との間隔を変更した以外は、例１と同様の手順で導電膜付基板を作製した。作製した導電膜付基板は、導電膜２０の端部に傾斜部２３を有しており、傾斜部２３の厚さが導電膜２０の中心部２１の膜厚の１０％となる位置Ｄ、Ｄ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の最大値が下記表に示す値であり、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離は０ｍｍ超であり、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´は、ガラス基板１０の面取り面内に位置していなかった。
また、端部Ｃ－Ｃ´間の距離の平均値、端部Ｃ、Ｃ´と、縁端部Ａ、Ａ´との距離の平均値、境界Ｅ、Ｅ´と、端部Ｃ、Ｃ´との距離の平均値、導電膜２３のヤング率およびシート抵抗値は下記表に示す値であった。
導電膜付基板は６枚作製し、静電チャックによる吸着保持前後の欠陥数を測定した。６枚の導電膜付き基板の平均値を１４６ｍｍ角検査エリア領域の欠陥数として示した。結果を下記表に示す。 (Example 5)
A substrate with a conductive film was produced in the same procedure as in Example 1, except that the size of the opening of the shielding member and the distance between the glass substrate were changed. The manufactured substrate with a conductive film has inclined portions 23 at the ends of the conductive film 20, and positions D and D where the thickness of the inclined portions 23 is 10% of the thickness of the central portion 21 of the conductive film 20. ' to the edge portions A and A' of the glass substrate 10 are the values shown in the table below. The distance to A and A' was more than 0 mm, and the ends C and C' of the inclined portion 23 of the conductive film 20 were not located within the chamfered surface of the glass substrate 10. FIG.
Further, the average value of the distance between the ends C and C', the average value of the distances between the ends C and C' and the edges A and A', the boundaries E and E' and the ends C and C' , the Young's modulus and the sheet resistance of the conductive film 23 are shown in the table below.
Six substrates with a conductive film were produced, and the number of defects before and after adsorption and holding by an electrostatic chuck was measured. The average value of six substrates with a conductive film is shown as the number of defects in a 146 mm square inspection area. The results are shown in the table below.

Figure 2022183024000001
Figure 2022183024000001

傾斜部２３における導電膜２０の厚さが導電膜２０の中心部２１の膜厚の１０％となる位置Ｄ、Ｄ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の最大値が３．００ｍｍ以下、導電膜２０の傾斜部２３の端部Ｃ、Ｃ´からガラス基板１０の縁端部Ａ、Ａ´までの距離は０．００ｍｍ超の例１～例４は、１４６ｍｍ角検査エリア領域の欠陥数が１５．０以下であり、静電チャック時のパーティクルの発生が抑制されたことで、パーティクルに起因して発生する欠陥を抑制できたと考えられる。導電膜２０の傾斜部２３の端部Ｃ、Ｃ´が、ガラス基板１０の面取り面内に位置している例２～４は、１４６ｍｍ角検査エリア領域の欠陥数が１０．０以下であり、静電チャック時のパーティクルの発生がより抑制され、パーティクルに起因して発生する欠陥を抑制できたと考えられる。傾斜部２３の厚さが導電膜２０の中心部２１の膜厚の１０％となる位置Ｄ、Ｄ´からガラス基板１０の縁端部Ａ、Ａ´までの距離の最大値が３．００ｍｍ超の例５は、１４６ｍｍ角検査エリア領域の欠陥数が１５．０超であり、静電チャック時に多くパーティクルが発生したと考えられる。 The maximum value of the distance from the position D, D' where the thickness of the conductive film 20 in the inclined portion 23 is 10% of the thickness of the central portion 21 of the conductive film 20 to the edge portions A, A' of the glass substrate 10 is 3.00 mm or less, and the distance from the ends C and C' of the inclined portion 23 of the conductive film 20 to the edge portions A and A' of the glass substrate 10 is more than 0.00 mm. Since the number of defects in the area region was 15.0 or less and the generation of particles during electrostatic chucking was suppressed, it is considered that defects caused by particles could be suppressed. In Examples 2 to 4 in which the ends C and C' of the inclined portion 23 of the conductive film 20 are located within the chamfered surface of the glass substrate 10, the number of defects in the 146 mm square inspection area region is 10.0 or less, It is considered that the generation of particles during electrostatic chucking was further suppressed, and the defects caused by the particles could be suppressed. The maximum value of the distance from the position D, D' where the thickness of the inclined portion 23 is 10% of the thickness of the central portion 21 of the conductive film 20 to the edge portions A, A' of the glass substrate 10 exceeds 3.00 mm. In Example 5, the number of defects in the inspection area of 146 mm square was more than 15.0, and it is considered that many particles were generated during electrostatic chucking.

１０：ガラス基板
１２：面取り面
２０：導電膜
２１：中心部
２２：平坦部
２３：傾斜部 REFERENCE SIGNS LIST 10: glass substrate 12: chamfered surface 20: conductive film 21: central portion 22: flat portion 23: inclined portion

Claims (8)

ガラス基板と、
前記ガラス基板の一方の主面上に配置された導電膜とを有する導電膜付基板であって、
前記導電膜の周縁に傾斜部を有し、
前記傾斜部における前記導電膜の厚さが前記導電膜の中心部の膜厚の１０％となる位置から、前記ガラス基板の縁端部までの距離が３．００ｍｍ以下であり、
前記傾斜部の端部から前記ガラス基板の縁端部までの距離が０．００ｍｍ超である、導電膜付基板。 a glass substrate;
A conductive film-attached substrate having a conductive film disposed on one main surface of the glass substrate,
Having an inclined portion on the peripheral edge of the conductive film,
A distance from a position where the thickness of the conductive film in the inclined portion is 10% of the thickness of the central portion of the conductive film to an edge portion of the glass substrate is 3.00 mm or less,
A substrate with a conductive film, wherein the distance from the end of the inclined portion to the edge of the glass substrate is more than 0.00 mm. 前記ガラス基板の主面の周縁部に面取り面を有し、前記傾斜部の端部の少なくとも一部が前記面取り面内に位置する、請求項１に記載の導電膜付基板。 2. The substrate with a conductive film according to claim 1, wherein said glass substrate has a chamfered surface along the periphery of the main surface thereof, and at least a portion of the end of said inclined portion is positioned within said chamfered surface. 前記傾斜部の端部の全てが前記面取り面内に位置する、請求項２に記載の導電膜付基板。 3. The substrate with a conductive film according to claim 2, wherein all the ends of said inclined portion are positioned within said chamfered surface. 前記傾斜部における前記導電膜の厚さが前記導電膜の中心部の膜厚の１０％となる位置が、前記面取り面内に位置しない、請求項１または２に記載の導電膜付基板。 3. The substrate with a conductive film according to claim 1, wherein a position where the thickness of the conductive film in the inclined portion is 10% of the thickness of the central portion of the conductive film is not located within the chamfered surface. 前記導電膜のヤング率が５０．０ＧＰａ以上である、請求項１または２に記載の導電膜付基板。 3. The substrate with a conductive film according to claim 1, wherein the conductive film has a Young's modulus of 50.0 GPa or more. 前記導電膜のシート抵抗が１５０．００Ω／ｓｑ以下である、請求項１または２に記載の導電膜付基板。 3. The substrate with a conductive film according to claim 1, wherein the conductive film has a sheet resistance of 150.00 Ω/sq or less. 前記導電膜が、クロム（Ｃｒ）、タンタル（Ｔａ）、ケイ素（Ｓｉ）、チタン（Ｔｉ）、ジルコニウム（Ｚｒ）、ハフニウム（Ｈｆ）およびゲルマニウム（Ｇｅ）からなる群から選択される少なくとも１種を含む、請求項１または２に記載の導電膜付基板。 The conductive film contains at least one selected from the group consisting of chromium (Cr), tantalum (Ta), silicon (Si), titanium (Ti), zirconium (Zr), hafnium (Hf) and germanium (Ge). The substrate with a conductive film according to claim 1 or 2, comprising: 請求項１または２に記載の導電膜付基板と、
前記導電膜付基板の前記ガラス基板の前記導電膜が配置された主面とは反対側の主面上に配置された、ＥＵＶ光を反射する反射層と、
前記反射層上に配置された、ＥＵＶ光を吸収する吸収層とを有する、反射型マスクブランク。 A substrate with a conductive film according to claim 1 or 2;
a reflective layer that reflects EUV light and is disposed on the main surface of the glass substrate of the conductive film-attached substrate opposite to the main surface on which the conductive film is disposed;
and an absorbing layer for absorbing EUV light disposed on the reflective layer.
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JP2005210093A (en) * 2003-12-25 2005-08-04 Hoya Corp Substrate with muti-layer reflective film, exposure reflection type mask blank, exposure reflection type mask, and manufacturing methods for these
JP2005316448A (en) * 2004-03-30 2005-11-10 Hoya Corp Glass substrate for mask blank, mask blank, method for producing glass substrate for mask blank, and polishing device
WO2014021235A1 (en) * 2012-07-31 2014-02-06 Hoya株式会社 Reflective mask blank and method for manufacturing same, method for manufacturing reflective mask, and method for manufacturing semiconductor device

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
JP2005210093A (en) * 2003-12-25 2005-08-04 Hoya Corp Substrate with muti-layer reflective film, exposure reflection type mask blank, exposure reflection type mask, and manufacturing methods for these
JP2005316448A (en) * 2004-03-30 2005-11-10 Hoya Corp Glass substrate for mask blank, mask blank, method for producing glass substrate for mask blank, and polishing device
WO2014021235A1 (en) * 2012-07-31 2014-02-06 Hoya株式会社 Reflective mask blank and method for manufacturing same, method for manufacturing reflective mask, and method for manufacturing semiconductor device

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