JP2022179098A - output circuit - Google Patents

Abstract

To provide an output circuit capable of reducing current consumption and miniaturizing an open-drain transistor with a simple configuration.SOLUTION: A current generation part 2 of an output circuit 1A has: a transconductance amplifier AMP that has gates of transistors MN1 and MN2 with different gate aspect ratios as a differential input stage 22; a resistor R1 connected between the gates of the transistors MN1 and MN2; and a transistor MP3 that supplies a current according to an output of the transconductance amplifier AMP to the resistor R1. An output drive part 3 has: a transistor MP4 whose gate and source are respectively connected with the transistor MP3 in common; and a resistor R2 and a transistor MN5 supplied with a current flowing in the transistor MP3 mirrored to the transistor MP4. The output drive part 3 supplies a gate-source voltage Vgsn6 according to a voltage drop generated at the resistor R2 and a gate-source voltage of the transistor MN5 to between a gate and a source of a transistor MN6.SELECTED DRAWING: Figure 1

Description

The present invention relates to output circuits.

An open-drain output terminal is often used as an interface output when communicating between ICs having different power supply voltages, such as a microcomputer and a motor driver circuit driven by the microcomputer. The drain of the transistor used as the output terminal is pulled up to the power supply voltage by a resistor or the like. Therefore, if both ends of the resistor are short-circuited, a large current may flow through the transistor and damage it. Therefore, an overcurrent protection circuit is required to limit the current flowing through the transistor.

As such an overcurrent protection circuit, those described in Patent Documents 1 and 2 have been proposed. The overcurrent protection circuit disclosed in Patent Document 1 detects current flowing through a transistor, and turns off the transistor when it is determined that an overcurrent has flowed. However, the overcurrent protection circuit of Patent Document 1 requires a current sensing resistor for detecting the current for each of the transistors and an amplifier for determining overcurrent, which increases the circuit scale when there are multiple transistors. I had a problem.

In the overcurrent protection circuit of Patent Document 2, an open-drain transistor serving as an output terminal is used as an output of a current mirror circuit, and a reference current is supplied to an input transistor. According to this overcurrent protection circuit, the limiting current of the output transistor is determined by the gate aspect ratios of the input and output transistors and the reference current. For example, when the current ratio between the input and output of this current mirror circuit is increased by about 100 times and the current is limited to 50 mA, the reference current is about 500 μA. In order to reduce this reference current, it is necessary to increase the gate width of the output transistor relative to the gate width of the input transistor.

JP-A-6-38363 Japanese Unexamined Patent Application Publication No. 2013-232760

SUMMARY OF THE INVENTION The present invention has been made in view of the circumstances described above, and its object is to provide an output circuit that has a simple configuration, consumes a small amount of current, and allows the size of an open-drain transistor, which is an output terminal, to be reduced. be.

In order to achieve the above object, an output circuit according to the present invention is characterized by the following [1] to [4].
[1]
a first MOS transistor having a drain connected to an output terminal;
a second MOS transistor whose drain and source are connected to the gate and source of said first MOS transistor and whose gate receives a drive signal for turning on or off said first MOS transistor;
a transconductance amplifier having sources connected to each other to a current source and having gates of a third MOS transistor and a fourth MOS transistor having different gate aspect ratios as a differential input stage; a first resistor; and a fifth MOS transistor that supplies a current corresponding to the output of the first resistor to the first resistor, and the first resistor is connected between the gates of the third MOS transistor and the fourth MOS transistor. a current generation unit that causes a current determined by negative feedback from the transconductance amplifier to flow through the first resistor;
A sixth MOS transistor having a gate and a source commonly connected to the fifth MOS transistor and a current equal to the current flowing through the fifth MOS transistor mirrored by the sixth MOS transistor are supplied. 2 resistors and a seventh MOS transistor whose drain and gate are diode-connected, and a drive voltage corresponding to the voltage drop occurring in the second resistor and the gate-source voltage of the seventh MOS transistor. between the gate and source of the first MOS transistor,
Must be an output circuit.
[2]
In the output circuit described in [1],
When the drain voltage of the first MOS transistor is lowered, the drive voltage supplied between the gate and the source of the first MOS transistor from the output driver is cut off to reduce the gate voltage of the first MOS transistor. Equipped with a switch to pull up,
Must be an output circuit.
[3]
In the output circuit according to [2],
The switch comprises an eighth MOS transistor having a drain-source connected between the second resistor and ground, and a gate connected to the drain of the first MOS transistor.
Must be an output circuit.
[4]
In the output circuit according to any one of [1] to [3],
A plurality of the first MOS transistors and the output drive section are provided,
the sixth MOS transistors of the plurality of output drive units are current-mirror-connected to one fifth MOS transistor;
Must be an output circuit.

According to the present invention, it is possible to provide an output circuit that has a simple configuration, consumes a small amount of current, and allows the size of an open-drain transistor that is an output terminal to be reduced.

The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by reading the following detailed description of the invention (hereinafter referred to as "embodiment") with reference to the accompanying drawings. .

FIG. 1 is a circuit diagram showing the output circuit of the present invention in the first embodiment. FIG. 2 is a circuit diagram showing the output circuit of the present invention in the second embodiment. FIG. 3 is a circuit diagram showing the output circuit of the present invention in the third embodiment.

Specific embodiments relating to the present invention will be described below with reference to each drawing.

(First embodiment)
As shown in FIG. 1, the output circuit 1A of the first embodiment includes a transistor MN6 (first MOS transistor) serving as an open-drain output terminal, a transistor MN4 (second MOS transistor), and a current generator 2. and an output driver 3 . The transistor MN6 has a drain connected to the output terminal Tout and a source connected to the ground. A resistor RL and a battery V2 are connected between the output terminal Tout and the ground.

The transistor MN4 is composed of an Nch MOSFET. The drain and source of the transistor MN4 are connected between the gate and source of the transistor MN6. A driving signal VIN for turning on or off the transistor MN6 is supplied to the gate of the transistor MN4. When the driving signal VIN is supplied to the transistor MN4 and the transistor MN4 is turned on, the gate and source of the transistor MN6 are short-circuited and the transistor MN6 is turned off. On the other hand, when the drive signal VIN for the transistor MN4 is cut off and the transistor MN4 is turned off, the transistor MN6 is turned on by being supplied with a gate voltage Vgsn6 described later between its gate and source.

The current generator 2 is a circuit that generates a drain current Idp3 proportional to 1/R1. Further, the output driver 3 supplies a drain current Idp4 equal to the drain current Idp3 to the resistor R2 to generate a gate-source voltage Vgsn6 (drive voltage) proportional to R2/R1, thereby This is the circuit that feeds the source. Here, R1 and R2 are the resistance values of resistor R1 and resistor R2.

The current generator 2 includes a transconductance amplifier AMP, a transistor MP3 (fifth MOS transistor), a resistor R1 (first resistor), and a transistor MN3. The transconductance amplifier AMP includes a current mirror circuit 21 composed of transistors MP1 and MP2, a differential input stage 22 composed of transistors MN1 and MN2 (third and fourth MOS transistors), a current source I1, have.

The transistors MP1 and MP2 that constitute the current mirror circuit 21 are composed of Pch MOSFETs. The sources of the transistors MP1 and MP2 are connected to the power supply voltage VDD supplied from the battery V1, and the gates of the transistors MP1 and MP2 are connected to each other. The gate and drain of the transistor MP2 are connected. The transistors MP1 and MP2 are provided so as to have a current mirror ratio of 1:1. This equalizes the drain currents of the transistors MP1 and MP2.

The transistors MN1 and MN2 forming the differential input stage 22 are formed of Nch MOSFETs. The drain of transistor MN1 is connected to the drain of transistor MP1, and the drain of transistor MN2 is connected to the drain of transistor MP2. The sources of transistors MN1 and MN2 are connected to current source I1. Also, the aspect ratio of the transistor MN1>the aspect ratio of the transistor MN2. In this embodiment, the aspect ratio of the transistor MN1:the aspect ratio of the transistor MN2 is 4:1. A current source I1 is connected between the sources of the transistors MN1, MN2 and ground.

Transistor MP3, resistor R1, and transistor MN3 are connected in series with each other. The transistor MP3 is composed of a Pch MOSFET. The transistor MP3 has a gate connected to the output of the transconductance amplifier AMP (the drains of the transistors MP1 and MN1). The source of the transistor MP3 is connected to the power supply voltage VDD. The resistor R1 is connected between the drain of the transistor MP3 and the drain of the transistor MN3 which will be described later.

The transistor MN3 is composed of an Nch MOSFET. The transistor MN3 has a diode connection in which the gate is connected to the drain, and the source is grounded. The transistor MN3 is provided to set the operating voltages of the transistors MN1 and MN2 that constitute the differential input stage 22. FIG. Any configuration that sets the operating voltages of the transistors MN1 and MN2 may be used, and a configuration other than the transistor MN3 may be used.

The gate of the transistor MN1 that constitutes the differential input stage 22 is connected to one end of the resistor R1 on the ground side, and the gate of the transistor MN2 is connected to one end of the resistor R1 on the power supply VDD side. As a result, the drain current Idp3 of the transistor MP3 flowing through the resistor R1 can be a current determined by the negative feedback of the transconductance amplifier AMP.

The transconductance amplifier AMP operates so that the current mirror circuit 21 causes the same drain current to flow through the transistors MN1 and MN2. Also, the aspect ratio of the transistor MN1>the aspect ratio of the transistor MN2. Therefore, the transconductance amplifier AMP causes a voltage drop across the resistor R1, lowers the gate voltage of the transistor MN1 than the gate voltage of the transistor MN2, and equalizes the drain currents Idn1 and Idn2 of the transistors MN1 and MN2. That is, the transconductance amplifier AMP outputs to the gate of the transistor MP3 such that the drain currents Idn1 and Idn2 of the transistors MN1 and MN2 are equal to each other. As a result, the drain current Idp3 of the transistor MP3 becomes a current proportional to 1/R1, as will be described later.

The output driver 3 has a transistor MP4 (sixth MOS transistor), a resistor R2 (second resistor), and a transistor MN5 (seventh MOS transistor). Transistor MP4, resistor R2, and transistor MN5 are connected in series with each other. The transistor MP4 is composed of a Pch MOSFET. The transistor MP4 has its gates and sources commonly connected to the transistor MP3, and the aspect ratio of the transistors MP3 and MP4 is set to 1:1. As a result, the drain current Idp3 of the transistor MP3 is mirrored by the drain current Idp4 of the transistor MP4, and the drain currents Idp3 and Idp4 become equal.

The resistor R2 is connected between the drain of the transistor MP4 and the drain of the transistor MN5 and supplied with the drain current Idp4. The transistor MN5 is composed of an Nch MOSFET. The transistor MN5 has a diode connection in which the gate is connected to the drain, and the source is grounded.

A relational expression between the drain current Idn1 of the transistor MN1 and the gate-source voltage Vgsn1 of the transistor MN1 is represented by the following equation (1).

A relational expression between the drain current Idn2 of the transistor MN2 and the gate-source voltage Vgsn1 of the transistor MN1 is represented by the following expression (2).

Further, as described above, the current mirror circuit 21 operates so that the same drain current flows through the transistors MN1 and MN2. , Idn2 are equal to each other and their sum is equal to the current source I1.
Idn1 = Idn2 (3)
Idn1+Idn2=I1 (4)
Further, when the aspect ratio of the transistor MN1:the aspect ratio of the transistor MN2 is 4:1, the following equation (5) is obtained.
βn1=4βn2 (5)

From the above equations (1) to (5), the drain current Idp3 of the transistor MP3 can be expressed by the following equation (6). As shown in Equation (6), the drain current Idp3 is proportional to 1/R1.

The drain current Idp4 of the transistor MP4 is mirrored by the drain current Idp3 and can be expressed by the following equation (7).

Therefore, when the drain current Idp4 is supplied to the resistor R2, a voltage drop VR2 represented by the following equation (8) occurs across the resistor R2.

Also, the gate-source voltage Vgsn5 of the transistor MN5 can be expressed by the following equation (9).

Also, the gate-source voltage Vgsn6 of the transistor MN6 can be expressed by the following equation (10).

Here, if the gate aspect ratio of the transistor MN5 is increased and the transconductance coefficient βn5 is increased, the gate-source voltage Vgsn5 becomes close to the threshold voltage Vthn.

Also, the drain current Idn6 of the transistor MN6 can be expressed by the following equation (12).

Therefore, from the equations (11) and (12), the drain current Idn6 can be expressed by the following equation (13).

As is clear from the above equation (13), the drain current Idn6 is less than Vthn when the transistors MN1, MN2 and MN5, MN6 have the same threshold voltage Vthn, carrier mobility μn, and gate oxide film thickness COX. Not affected. That is, the drain current Idn6 can be limited to a value corresponding to the ratio of the resistors R1 and R2 and the ratio of the transconductance coefficients βn6 and βn2. In this case, the ratio of the transconductance coefficients βn6 and βn2 is the size ratio of the transistors MN2 and MN6. As a result, this embodiment limits the drain current Idn6 of the transistor MN6, which is less susceptible to variations in the characteristics of the transistors MN1, MN2, MN5, and MN6, variations in the absolute values of the resistors R1 and R2, and temperature variations. It can be performed.

According to the above configuration, the limit current of the drain current Idn6 depends not only on the size ratio between the transistors MN2 and MN6 but also on the resistance value ratio between the resistors R2 and R1. However, there is no need to make the size ratio of the transistors MN2 and MN6 huge. As a result, the size of the transistor MN6 can be reduced with a simple configuration and small current consumption.

(Second embodiment)
Next, a second embodiment will be described with reference to FIG. In the same figure, the same parts as those of the output circuit 1A shown in FIG. 1, which have already been explained in the first embodiment with reference to FIG.

A major difference between the first embodiment and the second embodiment is that the output circuit 1B includes a transistor MN7 (switch, eighth MOS transistor). The transistor MN7 is composed of an Nch MOSFET. The transistor MN7 has its source and drain connected between the transistor MN5 and the ground. The gate of the transistor MN7 is connected to the drain of the transistor MN6.

The role of this transistor MN7 is to activate the overcurrent protection function only when the drain voltage of the transistor MN6 is high due to a short circuit between the elements of the resistor RL. In the case of the first embodiment shown in FIG. 1, the gate-source voltage Vgns6 of transistor MN6 is always limited to a constant value shown in equation (11). An ON resistance Ron6 of the transistor MN6 is represented by the following equation (14).

As shown in equation (14), the ON resistance Ron6 increases as the gate-source voltage Vgsn6 decreases. In the case of the first embodiment, when the resistance value of the resistor RL is set small, the drain voltage of the transistor MN6 may not be lowered sufficiently even when the transistor MN6 is turned on. The second embodiment shown in FIG. 2 is a circuit for improving these points. When the transistor MN6 is turned on and its drain voltage is lower than the threshold voltage Vthn of the transistor MN7, the transistor MN7 is turned off. As a result, the gate-source voltage Vgsn6 shown in equation (11) supplied from the output driver 3 between the gate and source of the transistor MN6 is cut off, and the gate voltage of the transistor MN6 is raised to the power supply voltage VDD. ) can be reduced. When the drain voltage does not drop due to a short circuit of the resistor RL or the like, the transistor MN7 is turned on, and the drain current can be limited in the same manner as in the first embodiment.

According to the second embodiment, the gate of the transistor MN7 is connected to the drain of the transistor MN6, and the transistor MN7 is turned off when the drain voltage drops below the threshold voltage Vthn. However, the present invention is not limited to this. . A comparator may be provided to which the drain voltage of the transistor MN6 is input, and the transistor MN7 may be turned on and off according to the output of the comparator.

(Third embodiment)
Next, a third embodiment will be described with reference to FIG. In the same figure, the same parts as those of the output circuit 1B shown in FIG. 2 already explained in the second embodiment described above with reference to FIG.

A major difference between the second embodiment and the third embodiment is that the output circuit 1C controls a plurality of (two in FIG. 3) open-drain transistors MN6 and MN6B. Resistors RL and RLB are connected to the drains of the transistors MN6 and MN6B. In other words, the output circuit 1C of the third embodiment has a plurality of output drivers 3 and 3B.

In FIG. 3, transistors MP4 and MP4B constituting a plurality of output drive units 3 and 3B are mirror-connected in parallel to transistor MP3, and the drain current Idp3 is supplied to resistors R2 and R2B, respectively. As a result, only one circuit is required for the current generating section 2, and the circuit configuration is much simpler than in the case where a plurality of output circuits are provided as in the conventional example.

It should be noted that the present invention is not limited to the above-described embodiments, and can be modified, improved, etc. as appropriate. In addition, the material, shape, size, number, location, etc. of each component in the above-described embodiment are arbitrary and not limited as long as the present invention can be achieved.

1A to 1C output circuit 2 current generator 3 output driver 22 differential input stage I1 current source MP3 transistor (fifth MOS transistor)
MP4 transistor (sixth MOS transistor)
MN1 transistor (third MOS transistor)
MN2 transistor (fourth MOS transistor)
MN4 transistor (second MOS transistor)
MN5 transistor (seventh MOS transistor)
MN6 transistor (first MOS transistor)
MN7 transistor (eighth MOS transistor)
R1 resistor (first resistor)
R2 resistor (second resistor)

Claims (4)

a first MOS transistor having a drain connected to an output terminal;
a second MOS transistor whose drain and source are connected to the gate and source of said first MOS transistor and whose gate receives a drive signal for turning on or off said first MOS transistor;
a transconductance amplifier having sources connected to each other to a current source and having gates of a third MOS transistor and a fourth MOS transistor having different gate aspect ratios as a differential input stage; a first resistor; and a fifth MOS transistor that supplies a current corresponding to the output of the first resistor to the first resistor, and the first resistor is connected between the gates of the third MOS transistor and the fourth MOS transistor. a current generation unit that causes a current determined by negative feedback from the transconductance amplifier to flow through the first resistor;
A sixth MOS transistor having a gate and a source commonly connected to the fifth MOS transistor and a current equal to the current flowing through the fifth MOS transistor mirrored by the sixth MOS transistor are supplied. 2 resistors and a seventh MOS transistor whose drain and gate are diode-connected, and a drive voltage corresponding to the voltage drop occurring in the second resistor and the gate-source voltage of the seventh MOS transistor. between the gate and source of the first MOS transistor,
output circuit. The output circuit of claim 1, wherein
When the drain voltage of the first MOS transistor is lowered, the drive voltage supplied between the gate and the source of the first MOS transistor from the output driver is cut off to reduce the gate voltage of the first MOS transistor. Equipped with a switch to pull up,
output circuit. 3. The output circuit according to claim 2,
The switch comprises an eighth MOS transistor having a drain-source connected between the second resistor and ground, and a gate connected to the drain of the first MOS transistor.
output circuit. In the output circuit according to any one of claims 1 to 3,
A plurality of the first MOS transistors and the output drive section are provided,
the sixth MOS transistors of the plurality of output drive units are current-mirror-connected to one fifth MOS transistor;
output circuit.

Images