JP2022129463A - Ceramic electronic component, circuit board and manufacturing method of ceramic electronic component - Google Patents

Abstract

To relieve stress concentrated on the ridge line of an element body via an external electrode.SOLUTION: A ceramic electronic component according to an embodiment includes: an element body comprising a dielectric and an internal electrode; and a pair of external electrodes which are connected to the internal electrode on the end faces of the element body facing in a longitudinal direction, which are respectively formed continuously on a side face facing the end face of the element body in a width direction and upper and lower faces of the element body facing in a height direction, and which each include a slit opening to an element body center side of the side face and extending in an end face direction.SELECTED DRAWING: Figure 1

Description

The present invention relates to a ceramic electronic component, a circuit board, and a method for manufacturing a ceramic electronic component.

A multilayer ceramic capacitor is composed of a plurality of alternately laminated internal electrode layers and ceramic layers, and the ends of each internal electrode layer are alternately exposed on both longitudinal end surfaces so as to be electrically connected to the exposed ends of the internal electrode layers. A pair of external electrodes are formed at both ends in the length direction. As disclosed in Japanese Unexamined Patent Application Publication No. 2002-100002, the external electrodes cover not only the ends of the capacitor but also the top, bottom and side surfaces of the capacitor in a cap-like manner.

Further, in Patent Document 2, electrodes formed on a base body are disclosed in order to improve the self-alignment property during solder mounting, eliminate the directionality during mounting, and improve the workability of mounting. A configuration is disclosed in which a ridge formed by a first side surface and a second side surface of the body is exposed between portions.

WO2006/098092 JP 2015-103554 A

However, the stress caused by the difference in coefficient of linear expansion between the external electrodes and the element body, the difference in shrinkage in the firing process of the underlying layer of the external electrodes, the residual stress, and the stress received from the solder after mounting may cause the edges of the external electrodes to There is a risk that cracks may occur near the edge of the element, especially at the edge of the element. In addition, in the structure in which the ridge line of the element is exposed, there is a possibility that the ridge line may crack when it comes into contact with an external object during handling of the part.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a ceramic electronic component, a circuit board, and a method of manufacturing a ceramic electronic component, which are capable of relieving the stress concentrated on the ridgeline of the element through external electrodes.

In order to solve the above problems, according to a ceramic electronic component according to an aspect of the present invention, an element body having a dielectric and an internal electrode is provided, and the inner It is connected to the electrode and is formed continuously on the side surface facing the end surface of the element in the width direction and the upper surface and the lower surface facing in the height direction, respectively, opening toward the center of the element on the side surface and extending in the direction of the end surface. and a pair of external electrodes having slits.

Moreover, according to the ceramic electronic component according to the aspect of the present invention, the slit portion is located away from the ridgeline of the element body.

Further, according to the ceramic electronic component according to one aspect of the present invention, the element body is exposed from the external electrode at the position of the slit portion.

Further, according to the ceramic electronic component according to one aspect of the present invention, where T is the dimension in the height direction of the side surface of the external electrode, the width of the slit portion is (T/30) μm or more (T/10 ) μm or less.

Further, according to the ceramic electronic component according to one aspect of the present invention, when the length of the external electrode is L, the depth of the slit portion is (L/5) μm or more (L/1.5) μm. It is below.

Further, according to the ceramic electronic component according to the aspect of the present invention, where T is the dimension in the height direction of the side surface of the external electrode, the slit portion is (T/30) μm or more from the ridge line of the element body. (T/3) μm or less.

Further, according to the ceramic electronic component according to one aspect of the present invention, when the ceramic electronic component is seen through from the end surface direction, the slit portion and the inner electrode located on the outermost side in the height direction are aligned in the height direction. in an overlapping position.

Moreover, according to the ceramic electronic component according to the aspect of the present invention, the slit portion is formed in an oblique arc shape with respect to the ridge line of the element body.

Moreover, according to the ceramic electronic component according to the aspect of the present invention, a plurality of slit portions are provided on one surface of the base body.

Moreover, according to the ceramic electronic component according to the aspect of the present invention, the slit portions are provided in parallel at equal intervals on one surface of the element body.

Further, according to the ceramic electronic component according to one aspect of the present invention, the external electrodes are formed so as to surround four surfaces that are perpendicularly connected to the end surfaces of the element body, and the slit portions are formed on the four surfaces. It is provided on the surfaces facing each other among the surfaces.

Further, according to the ceramic electronic component according to one aspect of the present invention, the conductive layers are formed on a plurality of surfaces of the element body so as to cover the ridge lines of the element body, are connected to the internal electrodes, and contain a metal. A base layer and a plated layer formed on the base layer are provided.

Moreover, according to the ceramic electronic component according to one aspect of the present invention, the base layer includes a common material mixed with the metal.

Further, according to the ceramic electronic component according to one aspect of the present invention, the common material has the dielectric contained in the element body as a main component.

Moreover, according to the ceramic electronic component according to one aspect of the present invention, the base layer contains Ni as a main component.

Moreover, according to the ceramic electronic component according to one aspect of the present invention, the base layer contains Cu as a main component.

Further, according to the ceramic electronic component according to one aspect of the present invention, the plating layer covers the underlying layer at the position of the slit portion.

Further, according to the ceramic electronic component according to one aspect of the present invention, the internal electrode is laminated on the first internal electrode layer via the first internal electrode layer and the dielectric layer containing the dielectric. a second internal electrode layer, wherein the external electrode is provided separately from the first external electrode connected to the first internal electrode layer and connected to the second internal electrode layer; and a second external electrode.

Further, according to a circuit board according to an aspect of the present invention, there is provided a circuit board on which any one of the ceramic electronic components described above is mounted, wherein the ceramic electronic component is mounted via a solder layer attached to the conductor. connected.

Further, according to the method of manufacturing a ceramic electronic component according to an aspect of the present invention, the step of forming a base body provided with a dielectric and internal electrodes, the internal electrodes being drawn out to the end faces, a step of applying an inhibitor that inhibits the adhesion of the base material to the side surface opposite to the end face in the width direction so as to open in the center of the body and extend in the direction of the end face in a slit shape; a step of applying the base material to a portion of four surfaces perpendicular to the end face; and baking the base material to form a slit portion which opens toward the center of the side face of the body and extends in the direction of the end face. The method includes a step of forming an underlying layer, and a step of forming a plated layer on the underlying layer.

According to one aspect of the present invention, the stress concentrated on the ridgeline of the element body can be relieved via the external electrode.

1 is a perspective view showing the configuration of a laminated ceramic capacitor according to a first embodiment; FIG. 2 is a longitudinal sectional view of the multilayer ceramic capacitor of FIG. 1; FIG. FIG. 2 is a cross-sectional view of the multilayer ceramic capacitor of FIG. 1 cut in the width direction; FIG. 2B is a cross-sectional view showing an example of stress applied to the element when the external electrodes of FIG. 2A have slits; FIG. 2B is a cross-sectional view showing an example of stress applied to the element when the external electrodes of FIG. 2A do not have slits. 4 is a flow chart showing an example of a method for manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 3 is a cross-sectional view showing an example of a method for manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 3 is a cross-sectional view showing an example of a method for manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 3 is a cross-sectional view showing an example of a method for manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 3 is a cross-sectional view showing an example of a method for manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 3 is a cross-sectional view showing a method of manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 3 is a cross-sectional view showing a method of manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 3 is a cross-sectional view showing a method of manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 3 is a cross-sectional view showing a method of manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 3 is a cross-sectional view showing a method of manufacturing a laminated ceramic capacitor according to the first embodiment; FIG. 6 is a cross-sectional view showing the configuration of a circuit board on which a multilayer ceramic capacitor according to a second embodiment is mounted; FIG. 6B is a cross-sectional view showing the configuration of a circuit board on which the multilayer ceramic capacitor is mounted when the external electrodes of FIG. 6A do not have slits. 10 is a flow chart showing another example of the method for manufacturing a laminated ceramic capacitor according to the third embodiment; FIG. 11 is a perspective view showing the configuration of a laminated ceramic capacitor according to a fourth embodiment; FIG. 11 is a perspective view showing the configuration of a laminated ceramic capacitor according to a fifth embodiment; FIG. 11 is a perspective view showing the configuration of a ceramic electronic component according to a sixth embodiment;

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments do not limit the present invention, and not all combinations of features described in the embodiments are essential for the configuration of the present invention. The configuration of the embodiment can be appropriately modified or changed according to the specifications of the device to which the present invention is applied and various conditions (use conditions, use environment, etc.). The technical scope of the present invention is defined by the claims and is not limited by the following individual embodiments. In addition, the drawings used in the following description may differ from the actual structure in terms of scale, shape, etc., in order to make each configuration easier to understand.

(First embodiment)
1 is a perspective view showing the configuration of the laminated ceramic capacitor according to the first embodiment, FIG. 2A is a longitudinal sectional view of the laminated ceramic capacitor of FIG. 1, and FIG. 2B is the laminated ceramic capacitor of FIG. is a cross-sectional view taken along the width direction. 2A is cut along the A1-A1 line in FIG. 1, and FIG. 2B is cut along the B1-B1 line in FIG.

In FIGS. 1, 2A and 2B, a multilayer ceramic capacitor 1A includes an element body 2 and external electrodes 6A and 6B. The base body 2 includes a laminate 2A, a lower cover layer 5A and an upper cover layer 5B. The laminate 2A includes internal electrode layers 3A and 3B and a dielectric layer 4. As shown in FIG.

A lower cover layer 5A is provided on the lower layer of the laminate 2A, and an upper cover layer 5B is provided on the upper layer of the laminate 2A. The internal electrode layers 3A and 3B are alternately led out to opposite surfaces of the element body 2 via the dielectric layers 4 and laminated. Although FIGS. 1, 2A and 2B show an example in which a total of 11 internal electrode layers 3A and 3B are laminated, the number of internal electrode layers 3A and 3B laminated is not particularly limited. At this time, the shape of the element body 2 and the laminated body 2A can be made into a substantially rectangular parallelepiped shape.

In the following description, the direction in which the end surfaces of the element 2 face each other is the length direction DL, the direction in which the side surfaces of the element 2 face each other is the width direction DW, and the direction in which the upper and lower surfaces of the element 2 face each other. The lamination direction (height direction or thickness direction) is sometimes called DS. At this time, the lower surface of the element body 2 can be arranged at a position facing the mounting surface of the circuit board on which the multilayer ceramic capacitor 1A is mounted. The element body 2 may be chamfered along the edge line LY of the element body 2 . At this time, the element body 2 can have a curved surface R with chamfered corners.

The external electrodes 6A and 6B are formed on the element body 2 so as to face each other while being separated from each other in the length direction DL. At this time, the external electrodes 6A and 6B are formed continuously from the lower surface side of the element body 2 to the upper surface side of the element body 2 via the end surfaces, and are perpendicular to both the lower surface and the end surfaces of the element body 2. It is also continuously formed on a pair of opposing side surfaces. In this manner, the underlayer 7 is formed continuously from the pair of end faces of the base body 2 to four adjacent peripheral faces. At this time, the boundary EA between the external electrodes 6A and 6B is located on the surface of the element body 2. As shown in FIG.

Here, the external electrodes 6A and 6B are provided with slit portions 8. As shown in FIG. The slit portion 8 opens toward the center of the element body 2 on the surface of the element body 2 on the boundary EA side of the external electrodes 6A and 6B. Also, one slit portion 8 can be positioned on the side surface of the external electrodes 6A and 6B. At this time, the slit portion 8 can be provided at a position away from the edge line LY of the element body 2 . At the position of the slit portion 8, the element body 2 is exposed from the external electrodes 6A and 6B in a certain area. Closes at a constant depth in the direction.
For example, the slit portion 8 extends along the direction of the edge line LY of the element body 2 from the end portions of the external electrodes 6A and 6B. At this time, the slit portion 8 has an opening portion KA at a position away from the edge line LY of the element body 2 . The slit portion 8 can reduce the stress applied to the nearest edge line among the four edge lines LY extending in the length direction DL of the element body 2 via the external electrodes 6A and 6B.

1 and 2B show an example in which slit portions 8 are provided in each of the external electrodes 6A and 6B on the side of the plane (a pair of side surfaces of the element body 2) normal to the width direction DW. The slit portions 8 may be provided in the external electrodes 6A and 6B also on the sides of the planes normal to the stacking direction DS (the lower and upper surfaces of the element body 2). Also, a plurality of slit portions 8 may be provided on one surface of the base body 2 . The slit portion 8 may have an oblique arc shape with respect to the ridgeline LY of the base body 2, or may have a wedge shape. The slit portion 8 may be formed in a straight line parallel to the ridgeline LY, or the tip of the slit portion 8 may be sharp-angled.

Here, by providing the slit portions 8 in the external electrodes 6A and 6B, it is possible to suppress the solder wetting through the external electrodes 6A and 6B at the positions of the slit portions 8 when the multilayer ceramic capacitor 1A is mounted. can. In the conventional form, the solders 13A' and 13B' wet the side surfaces of the external electrodes 6A' and 6B' as shown in FIG. 6B. It concentrates on the position S' where the ridgeline of the element body 2 formed by (1) and the external electrode poles 6A and 6B contact.

On the other hand, in the present embodiment, as shown in FIG. 6A, the amount of solder 13A and 13B wetting upward is suppressed by the slit portion 8, so the amount of solder on the side surface is reduced, and the edge line LY of the element body 2 and the external electrode 6A, It is possible to reduce the stress concentrated on the position S where 6B contacts. Since the position S is on the ridge line LY where the two surfaces are adjacent to each other, the stress tends to be concentrated. Since it is located at the edge in the length direction, the stress is most concentrated in the product and it tends to be the starting point of cracks. Therefore, reducing the stress at the position S greatly contributes to the improvement of product reliability in terms of preventing cracks. At this time, the slit portion 8 may be formed in parallel with the nearer edge line LY of the base body 2, or may be formed obliquely at an angle. As shown in FIG. 6A, when the line on the ridgeline side of the slit portion 8 cuts in the direction of the end face and is formed so as to separate from the ridgeline LY of the adjacent element body 2, the solders 13A and 13B are formed upward on the end face side in the side surface. It is easy to get wet and the solders 13A and 13B are less likely to stay. Further, if the line on the ridgeline side of the slit portion 8 cuts in the direction of the end face and is formed so as to approach the ridgeline LY of the adjacent element body 2, the solders 13A and 13B are more likely to wet upward at the slit portion 8. can be effectively suppressed.

Let T be the dimension in the height direction and L be the dimension in the length direction of the side surfaces of the external electrodes 6A and 6B. At this time, the width of the slit portion 8 is preferably between (T/30) μm and (T/10) μm. The width of the slit portion 8 can be determined by measuring the exposed dimension of the element body 2 at the central position of the slit portion in the depth direction. The depth of the slit portion 8 is preferably (L/5) μm or more and (L/1.5) μm or less. The depth of the slit portion 8 can be obtained by measuring the component in the length direction of the element body 2 from the end of the external electrode of the opening to the position where the slit closes. It is preferable that the slit portion 8 is separated from the ridgeline LY of the base body 2 by (T/30) μm or more and (T/3) μm or less in the height direction. Such a height direction position of the slit portion 8 may be specified by the width center position of the slit portion 8 at the depth direction center position of the slit portion 8 .

For example, it is assumed that the height T of each of the external electrodes 6A and 6B is 300 μm and the length L is 150 μm. In this case, the width of the slit portion 8 is preferably 10 μm or more and 30 μm or less. The depth of the slit portion 8 is preferably 30 μm or more and 100 μm or less. It is preferable that the slit portion 8 is separated from the edge line LY of the base body 2 by 10 μm or more and 100 μm or less.

Here, by setting the width of the slit portion 8 to (W/30) μm or more and the depth of the slit portion 8 to (L/5) μm or more, the amount of solder that wets upward in the slit portion 8 can be reduced. , the stress concentrated at the position S where the ridgeline LY of the element body 2 and the external electrodes 6A and 6B are in contact can be reduced. By setting the width of the slit portion 8 to (W/10) μm or less and the depth of the slit portion 8 to (L/1.5) μm or less, the decrease in the strength of each of the external electrodes 6A and 6B is suppressed. can be done.

By separating the slit portion 8 from the ridge line LY of the element body 2 by (T/30) μm or more, even if stress is applied to the multilayer ceramic capacitor 1A during mounting or transportation of the multilayer ceramic capacitor 1A, the element body 2 It is possible to prevent direct impact from being applied to the corners of the base body 2, and to suppress damage to the base body 2. - 特許庁By setting the distance between the slit portion 8 and the ridgeline LY of the element body 2 to be (T/3) μm or less, the amount of solder that wets upward at the slit portion 8 is reduced, and the ridgeline LY of the element body 2 and the external electrode 6A are reduced. , 6B can be reduced.

It is effective if at least one slit portion 8 is provided in the side surfaces of the external electrodes 6A and 6B. Two slit portions 8 may be formed on each side surface of the external electrodes 6A and 6B of the product.

In the length direction DL, the internal electrode layers 3A and 3B are alternately arranged at different positions within the laminate 2A. At this time, the internal electrode layers 3A are arranged on one end surface side of the element body 2 with respect to the internal electrode layers 3B, and the internal electrode layers 3B are arranged on the other end surface side of the element body 2 with respect to the internal electrode layers 3A. can be placed. An end portion of the internal electrode layer 3A is drawn out to an end portion of the dielectric layer 4 on one end face side in the length direction DL of the element body 2 and connected to the external electrode 6A. The end of the internal electrode layer 3B is led out to the end of the dielectric layer 4 on the other end face side in the length direction DL of the element body 2 and connected to the external electrode 6B.
On the other hand, the ends of the internal electrode layers 3A and 3B are covered with the dielectric layer 4 in the width direction DW of the element body 2 . In the width direction DW, the positions of the ends of the internal electrode layers 3A and 3B may be aligned. At this time, the element body 2 can include side margin portions 10 covering the internal electrode layers 3A and 3B in the width direction DW. In the example of FIGS. 1 and 2B, the slit portion 8 is positioned on the surface of the element body 2 of the side margin portion 10. In the example of FIG.
Further, when the component is seen through from the end surface direction as shown in FIG. The stress applied from the electrodes 6A, 6B to the internal electrodes 3A, 3B is reduced, and cracks are less likely to occur along the outermost internal electrodes 3A, 3B.

The thicknesses of the internal electrode layers 3A and 3B and the dielectric layers 4 in the stacking direction DS can each be in the range of 0.2 μm to 20 μm, for example, 0.3 μm. Materials of the internal electrode layers 3A and 3B are, for example, Cu (copper), Fe (iron), Zn (zinc), Al (aluminum), Sn (tin), Ni (nickel), Ti (titanium), Ag (silver ), Au (gold), Pt (platinum), Pd (palladium), Ta (tantalum) and W (tungsten), and may be an alloy containing these metals.

The material of the dielectric layer 4 can be mainly composed of, for example, a ceramic material having a perovskite structure. In addition, the main component should just be contained in the ratio of 50 at% or more. The ceramic material of the dielectric layer 4 is, for example, barium titanate, strontium titanate, calcium titanate, magnesium titanate, barium strontium titanate, barium calcium titanate, calcium zirconate, barium zirconate, calcium zirconate titanate. and titanium oxide.

The material of the lower cover layer 5A and the upper cover layer 5B can be made mainly of, for example, a ceramic material. At this time, the main component of the ceramic material of the lower cover layer 5A and the upper cover layer 5B may be the same as the main component of the ceramic material of the dielectric layer 4 . The thicknesses of the lower cover layer 5A and the upper cover layer 5B are preferably 5 μm or more and 100 μm or less.

Each of the external electrodes 6A and 6B includes a base layer 7 formed on the base body 2 and a plated layer 9 laminated on the base layer 7 as conductive layers. The underlayers 7 are formed on the element body 2 so as to face each other while being separated from each other in the length direction DL. At this time, the base layer 7 is formed continuously from the lower surface side of the element body 2 to the upper surface side through the end surfaces, and is also formed continuously from the lower surface side of the element body 2 to the pair of side surfaces facing each other. . In this manner, the underlayer 7 is formed continuously from the pair of end faces of the base body 2 to four adjacent peripheral faces.

The metal used as the conductive material of the underlying layer 7 is, for example, a metal or alloy containing at least one selected from Cu, Fe, Zn, Al, Ni, Pt, Pd, Ag, Au and Sn as a main component. can do. The underlying layer 7 may contain a common material in which metal is mixed. The common material can reduce the difference in thermal expansion coefficient between the element body 2 and the underlayer 7 by being mixed in the underlayer 7 in an island-like shape, thereby relaxing the stress applied to the underlayer 7 . The common material is, for example, a ceramic component that is the main component of the dielectric layer 4 . The underlayer 7 may contain a glass component. The glass component can make the underlayer 7 dense by being mixed in the underlayer 7 . This glass component is, for example, an oxide such as Ba (barium), Sr (strontium), Ca (calcium), Zn, Al, Si (silicon) or B (boron).

Here, the base layer 7 is preferably composed of a sintered body of a conductive metal paste. As a result, it is possible to increase the thickness of the base layer 7 while ensuring the adhesion between the element body 2 and the base layer 7, thereby ensuring the strength of the external electrodes 6A and 6B and increasing the thickness of the internal electrode layer 3A. , 3B can be ensured.

The plated layer 9 is continuously formed for each of the external electrodes 6A and 6B so as to cover the underlying layer 7 . At this time, the plating layer 9 can cover the underlying layer 7 at the position of the slit portion 8 . The plated layer 9 is electrically connected to the internal electrode layers 3A and 3B through the underlying layer 7 . Also, the plating layer 9 is electrically connected to the terminals of the mounting substrate through solder.

The material of the plating layer 9 is, for example, a metal or alloy containing at least one selected from Cu, Fe, Zn, Al, Ni, Pt, Pd, Ag, Au and Sn. The plated layer 9 may be a plated layer of a single metal component, or may be a plurality of plated layers of mutually different metal components. The plating layer 9 includes, for example, a Cu plating layer 9A formed on the base layer 7, a Ni plating layer 9B formed on the Cu plating layer 9A, and an Sn plating layer 9C formed on the Ni plating layer 9B. It can have a three-layer structure. The Cu plating layer 9A can improve the adhesion of the plating layer 9 to the base layer 7 . The Ni plating layer 9B can improve the heat resistance of the external electrodes 6A and 6B during soldering. The Sn plating layer 9C can improve the wettability of solder to the plating layer 9 .

3A is a cross-sectional view showing an example of the stress applied to the element body when the external electrodes in FIG. 2A have slits, and FIG. 3B is a stress applied to the element body when the external electrodes in FIG. 2A do not have slits. It is a sectional view showing an example.

In FIG. 3A, a compressive stress of a vector indicated by an arrow acts on the element body 2 from the external electrode 6A. At this time, since the ridge line LY of the element body 2 receives the stress of the external electrode 6A from two surfaces, the stress concentrates. At this time, at the position of the slit portion 8, the stress K2 transmitted from the external electrode 6A in the surface direction of the element body 2 is divided, and the stress concentration on the edge line LY of the element body 2 is relieved. Therefore, the stress K1 acting on the edge line LY of the element body 2 can be reduced, and the occurrence of cracks in the element body 2 starting from the edge line LY of the element body 2 can be suppressed.

On the other hand, in FIG. 3B, it is assumed that the multilayer ceramic capacitor 1A' is provided with an external electrode 6A' without the slit portion 8. As shown in FIG. The external electrode 6A' includes a base layer 7' formed on the base body 2 and a plated layer 9' laminated on the base layer 7'. The plating layer 9' includes a Cu plating layer 9A' formed on the base layer 7', a Ni plating layer 9B' formed on the Cu plating layer 9A', and a Sn plating layer 9B' formed on the Ni plating layer 9B'. A three-layer structure of the plated layer 9C' can be employed.

In FIG. 3B, in the external electrode 6A' without the slit portion 8, the stress K2' is transmitted in the surface direction of the element body 2, and the stress concentrates in the direction of the edge line LY of the element body 2. FIG. Therefore, the stress K1' acting on the edge line LY of the element body 2 increases, and the element body 2 tends to crack from the edge line LY of the element body 2 as a starting point. The existence of the slit portions 8 in this way can reduce the stress from the external electrodes 6A and 6B to the ridgeline LY of the adjacent element body 2, and can suppress the occurrence of cracks in the element body 2. .

4 is a flow chart showing an example of the method for manufacturing the laminated ceramic capacitor according to the first embodiment, and FIGS. 5A to 5I are cross-sectional views showing an example of the method for manufacturing the laminated ceramic capacitor according to the first embodiment. In FIGS. 5C to 5I, the case where three layers of the internal electrode layers 3A and 3B are alternately laminated with the dielectric layer 4 interposed is taken as an example.

In S1 of FIG. 4, an organic binder and an organic solvent as a dispersant and a molding aid are added to the dielectric material powder, pulverized and mixed to form a slurry. Dielectric material powders include, for example, ceramic powders. The dielectric material powder may contain additives. Additives include, for example, Mg (magnesium), Mn (manganese), V (vanadium), Cr (chromium), Y (yttrium), Sm (samarium), Eu (europium), Gd (cadmium), Tb (teubium). , Dy (dysprosium), Ho (holmium), Er (erbium), Tm (thulium), Yb (ytterbium), Co (cobalt), Ni, Li (lithium), B, Na (sodium), K (potassium) or Si The organic binder is, for example, polyvinyl butyral resin or polyvinyl acetal resin, the organic solvent is, for example, ethanol or toluene.

Next, as shown in S2 of FIG. 4 and FIG. 5A, a green sheet 24 is produced by coating a carrier film with a slurry containing ceramic powder in the form of a sheet and drying it. A carrier film is, for example, a PET (polyethylene terephthalate) film. A doctor blade method, a die coater method, a gravure coater method, or the like can be used to apply the slurry.

Next, as shown in S3 of FIG. 4 and FIG. 5B, a conductive paste for internal electrodes is applied to the green sheets 24 of the layers forming the internal electrode layers 3A and 3B among the plurality of green sheets so as to form a predetermined pattern. By coating, the internal electrode pattern 23 is formed. At this time, a plurality of internal electrode patterns 23 separated in the longitudinal direction of the green sheet 24 can be formed on one green sheet 24 . The internal electrode conductive paste contains metal powder used as a material for the internal electrode layers 3A and 3B. For example, when the metal used as the material of the internal electrode layers 3A and 3B is Ni, the internal electrode conductive paste contains Ni powder. In addition, the internal electrode conductive paste contains a binder, a solvent, and, if necessary, an auxiliary agent. The internal electrode conductive paste may contain a ceramic material, which is the main component of the dielectric layers 4, as a common material. A screen printing method, an inkjet printing method, a gravure printing method, or the like can be used to apply the conductive paste for the internal electrodes.

Next, as shown in S4 of FIG. 4 and FIG. 5C, the green sheet 24 with the internal electrode pattern 23 formed thereon and the outer layer green sheets 25A and 25B without the internal electrode pattern 23 formed thereon are arranged in a predetermined order. A laminated block is produced by stacking a plurality of blocks. The thickness of the outer layer green sheets 25A and 25B is greater than the thickness of the green sheet 24 on which the internal electrode patterns 23 are formed. At this time, the green sheets 24 adjacent in the stacking direction are stacked so that the internal electrode patterns 23A and 23B of the green sheets 24 are alternately shifted in the longitudinal direction of the green sheets 24 . In addition, a portion where only the internal electrode patterns 23A are stacked in the stacking direction, a portion where the internal electrode patterns 23A and 23B are alternately stacked in the stacking direction, and a portion where only the internal electrode patterns 23B are stacked in the stacking direction are formed. do.

Next, as shown in S5 of FIG. 4 and FIG. 5D, the laminated block obtained in the molding step of S4 of FIG. 4 is pressed to crimp the green sheets 24, 25A and 25B. As a method of pressing the laminated block, for example, a method of isostatically pressing the laminated block can be used.

Next, as shown in S6 of FIG. 4 and FIG. 5E, the pressed laminated block is cut into individual rectangular parallelepiped bodies. The laminated block is cut at a portion where only the internal electrode patterns 23A are stacked in the stacking direction and a portion where only the internal electrode patterns 23B are stacked in the stacking direction. For cutting the laminated block, for example, a method such as blade dicing can be used.

At this time, as shown in FIG. 5F, internal electrode layers 3A and 3B alternately laminated with dielectric layers 4 interposed are formed on the individualized element body 2', and the bottom and top layers are formed. Cover layers 5A and 5B are formed as upper layers. The internal electrode layer 3A is led out from the surface of the dielectric layer 4 at one end face of the element body 2', and the internal electrode layer 3B is led out from the surface of the dielectric layer 4 at the other end face of the element body 2'. In addition, in FIG. 5F, one element body separated into pieces in FIG. 5E is shown enlarged in the length direction.

Next, as shown in S7 of FIG. 4 and FIG. 5G, the element body 2' is chamfered to form the element body 2 having curved surfaces R at the corners of the element body 2'. Barrel polishing, for example, can be used for the chamfering of the element body 2'.

Next, as shown in S8 of FIG. 4, the binder contained in the body 2 chamfered in S7 of FIG. 4 is removed. In removing the binder, for example, the element body 2 is heated in an _N2 atmosphere at about 350.degree.

Next, as shown in S9 of FIG. 4, an inhibitor that inhibits adhesion of the base layer conductive paste is selectively applied onto the base body 2. Next, as shown in FIG. At this time, the inhibitor is selectively applied to the formation position of the slit portion 8 in FIG. The inhibitor is, for example, silicone that does not wet with the base layer conductive paste. As a method for selectively applying the inhibitor onto the base body 2, a screen printing method, an inkjet printing method, a gravure printing method, or the like can be used.

Next, as shown in S10 of FIG. 4, four surfaces (upper surface, lower surface, and a pair of side surfaces) of both end surfaces of the element body 2 coated with the inhibitor in S9 of FIG. The base layer conductive paste is applied and dried. A dipping method, for example, can be used to apply the conductive paste for the underlying layer. At this time, since the inhibitor is applied to the formation positions of the slit portions 8 in FIG. The base layer conductive paste contains metal powder or filler used as a conductive material for the base layer 7 . For example, when the metal used as the conductive material of the underlayer 7 is Ni, the underlayer conductive paste contains Ni powder or filler. In addition, the base layer conductive paste contains, for example, a ceramic component, which is the main component of the dielectric layer 4, as a common material. For example, particles of oxide ceramic containing barium titanate as a main component (for example, 0.1 μm to 4 μm in D50 particle size) are mixed as a common material in the conductive paste for the underlayer. In addition, the underlayer conductive paste contains a binder and a solvent.

Next, as shown in S11 of FIG. 4 and FIG. 5H, in S10 of FIG. 5, the element body 2 coated with the base layer conductive paste is fired to integrate the internal electrode layers 3A and 3B and the dielectric layer 4. At the same time, the base layer 7 integrated with the base body 2 is formed. At this time, since the base layer conductive paste is not applied to the positions where the slits 8 are to be formed, the base layer 7 is not formed at the positions where the slits 8 are to be formed. The base body 2 and the base layer conductive paste are fired, for example, in a firing furnace at 1000 to 1400° C. for 10 minutes to 2 hours. When a base metal such as Ni or Cu is used for the internal electrode layers 3A and 3B, the internal electrode layers 3A and 3B can be fired in a reducing atmosphere in order to prevent oxidation of the internal electrode layers 3A and 3B. In forming the underlying layer 7, re-oxidation treatment may be performed at a temperature of 600° C. to 1000° C. in an N ₂ gas atmosphere.

Next, as shown in S12 of FIG. 4 and FIG. 5I, a Cu plated layer 9A, a Ni plated layer 9B and an Sn plated layer 9C are sequentially formed on the base layer 7. Next, as shown in FIG. Here, the plating layer 9 can be formed by putting the element 2 on which the base layer 7 is formed in a barrel together with the plating solution, and energizing the barrel while rotating it. At this time, the plating layer 9 is formed in a slit shape so as to cover the base layer 7 at the formation position of the slit portion 8 .

(Second embodiment)

6A is a cross-sectional view showing the configuration of a circuit board on which a multilayer ceramic capacitor according to the second embodiment is mounted, and FIG. 6B is a circuit on which the multilayer ceramic capacitor is mounted when the external electrodes in FIG. 6A have no slits. 3 is a cross-sectional view showing the configuration of a substrate; FIG. In addition, in FIG. 6A, the multilayer ceramic capacitor 1A of FIG. 1 is schematically shown.

In FIG. 6A, land electrodes 12A and 12B are formed on the circuit board 11. As shown in FIG. The circuit board 11 may be a printed board or a semiconductor substrate such as Si. The laminated ceramic capacitor 1A is connected to land electrodes 12A, 12B via solder layers 13A, 13B attached to the external electrodes 6A, 6B.

Here, the amount of solder 13A and 13B wetted upward is suppressed by the slit portion 8, so the amount of solder on the side surface is reduced. Therefore, the stress concentrated at the position S where the edge line LY of the base body 2 and the external electrodes 6A and 6B contact can be reduced, and the occurrence of cracks can be suppressed. At this time, if the line on the ridgeline side of the slit portion 8 is formed so as to separate from the ridgeline LY of the adjacent element body 2 as it cuts from the opening toward the end surface of the element body 2, the solders 13A and 13B are formed in the side surfaces. It is easy for the solders 13A and 13B to get wet on the upper side of the end surface, and the solders 13A and 13B are less likely to stay. Also, if the line on the ridgeline side of the slit portion 8 cuts from the opening toward the end face of the element body 2 and is formed so as to approach the ridgeline LY of the adjacent element body 2 , the solders 13A and 13B are formed upward at the slit portion 8 . It is possible to more effectively suppress the wetting up to.

On the other hand, in FIG. 6B, a multilayer ceramic capacitor 1A' has external electrodes 6A' and 6B' without slits 8. As shown in FIG. The laminated ceramic capacitor 1A' is connected to land electrodes 12A and 12B via solder layers 13A' and 13B' attached to the external electrodes 6A' and 6B'.

Here, the solders 13A' and 13B' wet the side surfaces of the external electrodes 6A' and 6B'. Cracks are likely to occur at a position S' where the ridgeline LY of the edge line 1 and the external electrode poles 6A and 6B are in contact with each other.

(Third embodiment)
FIG. 7 is a flow chart showing another example of the manufacturing method of the laminated ceramic capacitor according to the third embodiment.
In steps S21 to S28 of FIG. 7, the body 2 from which the binder has been removed is manufactured by the same steps as steps S1 to S8 of FIG.

Next, as shown in S29 of FIG. 7, the element body 2 from which the binder has been removed in S28 of FIG. Firing of the body 2 is performed, for example, in a firing furnace at 1000 to 1350° C. for 10 minutes to 2 hours. When a base metal such as Ni or Cu is used for the internal electrode layers 3A and 3B, the internal electrode layers 3A and 3B can be fired in a reducing atmosphere in order to prevent oxidation of the internal electrode layers 3A and 3B.

Next, as shown in S30 of FIG. 7, an inhibitor that inhibits adhesion of the base layer conductive paste is selectively applied onto the base body 2. Next, as shown in FIG. At this time, the inhibitor is selectively applied to the formation position of the slit portion 8 in FIG. The inhibitor is, for example, silicone that does not wet with the base layer conductive paste. As a method for selectively applying the inhibitor onto the base body 2, a screen printing method, an inkjet printing method, a gravure printing method, or the like can be used.

Next, as shown in S31 in FIG. 7, the base layer conductive paste is applied to four surfaces, ie, both end surfaces of the element body 2 to which the inhibitor was applied in S30 of FIG. 7 and the peripheral surface of each end surface. dry. The base layer conductive paste contains metal powder or filler used as a conductive material for the base layer 7 . For example, when the metal used as the conductive material of the underlayer 7 is Cu, the underlayer conductive paste contains Cu powder or filler. In addition, the conductive paste for the underlayer contains a glass sintering aid (for example, SiO ₂ or the like).

Next, the base layer conductive paste applied to the base body 2 is fired so as to avoid the formation position of the slit portion 8 , thereby forming the base layer 7 integrated with the base body 2 . The underlayer conductive paste is fired, for example, in a firing furnace at a temperature of 600 to 900° C. for 10 minutes to 2 hours.

Next, as shown in S32 of FIG. 7, plating is performed by the same process as S12 of FIG.

(Fourth embodiment)
FIG. 8A is a perspective view showing the configuration of a laminated ceramic capacitor according to the fourth embodiment.
In FIG. 8A, a laminated ceramic capacitor 1B includes external electrodes 36A and 36B in place of the external electrodes 6A and 6B of the laminated ceramic capacitor 1A of FIG.

The external electrodes 36A and 36B have slit portions 38 instead of the slit portions 8 in FIG. The slit portion 38 opens toward the center of the element body 2 on the surface of the element body 2 on the boundary side of the external electrodes 36A and 36B. At this time, the slit portion 38 can reduce the stress applied to the edge line LY of the element body 2 via the external electrodes 36A and 36B. Each of the external electrodes 36A and 36B can be configured in the same manner as the external electrodes 6A and 6B in FIG. 1 except that a slit portion 38 is provided instead of the slit portion 8 in FIG. At this time, each of the external electrodes 36A and 36B includes a foundation layer 37 formed on the base body 2 and a plated layer 39 laminated on the foundation layer 37 . The plating layer 39 includes, for example, a Cu plating layer 39A formed on the underlying layer 37, a Ni plating layer 39B formed on the Cu plating layer 39A, and an Sn plating layer 39C formed on the Ni plating layer 39B. It can have a three-layer structure.

The slit portion 38 extends along the direction of the edge line LY of the element body 2 from the end portions of the external electrodes 36A and 36B. At this time, the slit portion 38 is opened at a position away from the edge line LY of the element body 2 . The slit portion 38 can be configured in the same manner as the slit portion 8 in FIG. 1 except that the arrangement position and the number of slit portions are different from those of the slit portion 8 in FIG. For example, the slit portions 38 can be provided in parallel on one surface of the element body 2 at regular intervals. Note that FIG. 8A shows an example in which the slit portions 38 are provided in each of the external electrodes 36A and 36B on the side of the plane (the pair of side surfaces of the element body 2) normal to the width direction DW. The slit portion 38 may have an oblique arc shape with respect to the ridgeline LY of the base body 2, or may have a wedge shape. The slit portion 38 may be formed in a straight line parallel to the ridgeline LY, or the tip of the slit portion 38 may be sharp-angled. The width and depth of the slit portion 38 of the external electrodes 36A and 36B and the distance from the edge line LY are set in the same manner as the width and depth of the slit portion 8 of the external electrodes 6A and 6B and the distance from the edge line LY in FIG. be able to.

Here, by increasing the number of slit portions 38 provided in each of the external electrodes 36A and 36B, the stress applied to the edge line LY of the element body 2 via the external electrodes 36A and 36B can be reduced more effectively. , the formation of cracks in the element body 2 can be suppressed.
In addition, since the effect of stress reduction due to the behavior of solder during mounting as described in the first and second embodiments can be similarly obtained, cracks in the element body 2 can be suppressed.

(Fifth embodiment)
FIG. 8B is a perspective view showing the structure of the laminated ceramic capacitor according to the fifth embodiment.
In FIG. 8B, a laminated ceramic capacitor 1C includes external electrodes 46A and 46B instead of the external electrodes 6A and 6B of the laminated ceramic capacitor 1A of FIG.

The external electrodes 46A and 46B have slit portions 48 instead of the slit portions 8 in FIG. The slit portion 48 opens on the surface of the element body 2 on the boundary side between the external electrodes 46A and 46B. At this time, the slit portion 48 can divide the stress directed toward the edge line LY of the element body 2 via the external electrodes 46A and 46B. Each of the external electrodes 46A and 46B can be configured in the same manner as the external electrodes 6A and 6B in FIG. 1 except that a slit portion 48 is provided instead of the slit portion 8 in FIG. At this time, each of the external electrodes 46A and 46B includes a foundation layer 47 formed on the base body 2 and a plated layer 49 laminated on the foundation layer 47 . The plating layer 49 includes, for example, a Cu plating layer 49A formed on the base layer 47, a Ni plating layer 49B formed on the Cu plating layer 49A, and an Sn plating layer 49C formed on the Ni plating layer 49B. It can have a three-layer structure.

The slit portion 48 extends along the direction of the edge line LY of the element body 2 from the end portions of the external electrodes 46A and 46B. At this time, the slit portion 48 is opened at a position away from the edge line LY of the element body 2 . The slit portion 48 can be configured in the same manner as the slit portion 8 in FIG. 1 except that the arrangement position and the number of slit portions are different from those of the slit portion 8 in FIG. For example, the slit portions 48 are formed not only on the sides (the pair of side surfaces of the element body 2) normal to the width direction DW but also to the sides (the lower surface and the upper surface of the element body 2) normal to the stacking direction DS. can also be provided. The slit portion 48 may have an oblique arc shape with respect to the ridgeline LY of the base body 2, or may have a wedge shape. The slit portion 48 may be formed in a straight line parallel to the ridgeline LY, or the tip of the slit portion 48 may be sharp-angled. The width and depth of the slit portion 48 of the external electrodes 46A and 46B and the distance from the edge line LY are set in the same manner as the width and depth of the slit portion 8 of the external electrodes 6A and 6B and the distance from the edge line LY in FIG. be able to.

Here, by providing the slit portions 48 on the pair of side surfaces, the lower surface, and the upper surface facing each other of the element body 2, not only the stress transmitted from the external electrodes 46A, 46B to the ridge line LY in the stacking direction DS, but also the external electrodes 46A, 46B The stress transmitted in the width direction DW from 46B to the ridge line LY can also be reduced, and cracks in the element body 2 can be suppressed.

(Sixth embodiment)
FIG. 9 is a perspective view showing a configuration example of a ceramic electronic component according to the sixth embodiment. In FIG. 9, a chip inductor is taken as an example of the ceramic electronic component.
In FIG. 8, chip inductor 21 includes element body 22 and external electrodes 26A and 26B. The element body 22 includes a coil pattern 23 , internal electrode layers 23 A and 23 B, and a magnetic material 24 . The magnetic material 24 is also used as a dielectric for insulating the internal electrode layers 23A and 23B. The shape of the element body 22 can be made into a substantially rectangular parallelepiped shape.

The coil pattern 23 and the internal electrode layers 23A, 23B are covered with a magnetic material 24. As shown in FIG. However, the end portion of the internal electrode layer 23A is exposed from the magnetic material 24 on one end face side of the element body 22 and connected to the external electrode 26A. An end portion of the internal electrode layer 23B is exposed from the magnetic material 24 on the other end face side of the element body 22 and connected to the external electrode 26B.

Materials for the coil pattern 23 and the internal electrode layers 23A and 23B can be selected from metals such as Cu, Fe, Zn, Al, Sn, Ni, Ti, Ag, Au, Pt, Pd, Ta and W. , an alloy containing these metals. The magnetic material 24 is, for example, ferrite.

The external electrodes 26A and 26B are separated from each other and located on the end surfaces of the element body 22 facing each other. Each of the external electrodes 26A and 26B is continuous from each end surface of the element body 22 to the side surfaces and upper and lower surfaces. The external electrodes 26A and 26B are provided with slit portions 28 . The slit portion 28 opens on the surface of the element body 22 on the boundary side of the external electrodes 26A and 26B. At this time, the slit portion 28 can divide the stress toward the ridgeline of the element body 22 via the external electrodes 26A and 26B.

The slit portion 28 extends along the direction of the ridgeline of the element body 2 from the end portions of the external electrodes 26A and 26B. At this time, the slit portion 28 is opened at a position away from the ridgeline of the element body 22 . In the example of FIG. 9, a case is shown in which the slit portions 28 are provided on the sides (a pair of side surfaces of the element body 22) normal to the width direction DW. A slit portion 28 may also be provided on the lower and upper surfaces of 22 . The slit portion 28 may have an oblique arc shape with respect to the ridge line of the base body 22, or may have a wedge shape. The slit portion 28 may be formed in a straight line parallel to the ridgeline, or the tip of the slit portion 28 may be sharp-angled. The width and depth of the slit portion 28 of the external electrodes 26A and 26B and the distance from the edge line LY are set in the same manner as the width and depth of the slit portion 8 of the external electrodes 6A and 6B and the distance from the edge line LY in FIG. be able to.

In the above-described embodiments, a laminated ceramic capacitor and a chip inductor are used as examples of ceramic electronic components, but chip resistors or sensor chips may be used. Further, in the above-described embodiments, the ceramic electronic component having two external electrodes was taken as an example, but the ceramic electronic component may have three or more external electrodes.

1A laminated ceramic capacitor 2 element body 2A laminated body 3A, 3B internal electrode layer 4 dielectric layer 5A, 5B cover layer 6A, 6B external electrode 7 base layer 8 slit portion 9, 9A to 9C plating layer

Claims (20)

a body having a dielectric and internal electrodes;
It is connected to the internal electrode at the end surface of the element body facing in the length direction, and is formed continuously on the side surface facing the end surface of the element body in the width direction and the upper and lower surfaces facing in the height direction, respectively. 1. A ceramic electronic component, comprising a pair of external electrodes having slit portions which are open at the center of said side surface and extend in the direction of the end face. 2. The ceramic electronic component according to claim 1, wherein said slit portion is located away from a ridge line of said element body. 3. The ceramic electronic component according to claim 1, wherein the element is exposed from the external electrode at the position of the slit. 4. The method according to any one of claims 1 to 3, wherein the width of the slit portion is (T/30) μm or more and (T/10) μm or less, where T is the dimension in the height direction of the side surface of the external electrode. A ceramic electronic component according to any one of claims 1 to 3. 5. The slit portion has a depth of (L/5) μm or more and (L/1.5) μm or less, where L is the length of the external electrode. 2. The ceramic electronic component according to item 1. The slit portion is separated from the ridgeline of the element body by (T/30) μm or more and (T/3) μm or less, where T is the dimension in the height direction of the side surface of the external electrode. 6. The ceramic electronic component according to any one of Items 1 to 5. 7. The ceramic electronic component according to any one of claims 1 to 6, wherein when the ceramic electronic component is seen through from the end face direction, the slit portion and the internal electrode located outermost in the height direction are positioned to overlap each other in the height direction. 1. A ceramic electronic component according to claim 1. 8. The ceramic electronic component according to claim 1, wherein said slit portion is formed in an oblique circular arc shape with respect to a ridge line of said element body. 9. The ceramic electronic component according to claim 1, wherein a plurality of said slit portions are provided on one side surface of said base body. 10. The ceramic electronic component according to any one of claims 1 to 9, wherein said slit portions are provided in parallel at regular intervals on one surface of said element body. 11. The ceramic electronic component according to any one of claims 1 to 10, wherein the slit portions are provided on the opposing side surfaces, respectively. The external electrodes are
an underlying layer containing a metal;
12. The ceramic electronic component according to claim 1, further comprising a plated layer formed on said underlayer. 13. The ceramic electronic component according to claim 12, wherein said underlayer comprises a common material mixed with said metal. 14. The ceramic electronic component according to claim 13, wherein the common material is mainly composed of the dielectric contained in the base body. 15. The ceramic electronic component according to any one of claims 12 to 14, wherein the base layer contains Ni as a main component. The ceramic electronic component according to any one of claims 12 to 14, wherein the base layer contains Cu as a main component. 17. The ceramic electronic component according to any one of claims 12 to 16, wherein the plating layer covers the base layer at the position of the slit. The internal electrodes are
a first internal electrode layer;
a second internal electrode layer laminated on the first internal electrode layer via a dielectric layer containing the dielectric;
The external electrodes are
a first external electrode connected to the first internal electrode layer;
18. The ceramic electronic component according to claim 1, further comprising a second external electrode provided separately from the first external electrode and connected to the second internal electrode layer. A circuit board on which the ceramic electronic component according to any one of claims 1 to 18 is mounted,
A circuit board, wherein the ceramic electronic component is connected via a solder layer attached to the conductor. a step of forming a body provided with a dielectric and an internal electrode, the internal electrode being drawn out to an end face;
a step of applying an inhibitor that inhibits the adhesion of the base material of the base layer of the external electrode so as to open in the center of the element body on the side surface opposite to the end face in the width direction and extend in a slit shape in the direction of the end face;
a step of applying the base material to the end face of the base body and part of four faces perpendicular to the end face;
a step of baking the base material to form a base layer having a slit portion that opens toward the center of the base on the side surface of the base and extends in the direction of the end face;
and forming a plated layer on the underlying layer.

Images