JP2022111560A - Slip defect evaluation method - Google Patents

Abstract

To provide a method for quantifying slip defects with good accuracy that occur on the principal surface of silicon wafers.SOLUTION: Provided is a method for evaluating slip defects on the principal surface of a silicon wafer using a particle counter of laser scattering type. The slip defect evaluation method includes: a step (S1) for detecting defects on the principal surface of the silicon wafer using the DNN channel of the particle counter and obtaining defect position data composed of defect points; a step (S2) for extracting a slip defect from the defect position data; and a step (S3) for evaluating the number of the defect points included in the extracted slip defect.SELECTED DRAWING: Figure 1

Description

The present invention relates to an evaluation method for slip defects detected on the main surface of a silicon wafer.

As a method for quantifying slip defects occurring in a silicon wafer, it is common to use an X-ray topograph (XRT) disclosed in Patent Document 1. As a method for evaluating the slip defect, Patent Document 2 discloses a method in which light with different wavelengths is applied from the front and back of the wafer, and information such as whether it is on the surface or inside the wafer and the size of the defect are obtained from the reflected light and transmitted light. , there is a description that the slip length can also be quantified. In addition, Patent Document 3 describes that quantification is possible with a laser scattering type inspection device.

In addition, in Patent Document 4, a plurality of pillars erected almost perpendicular to the main surface of the (001) wafer and support rods provided on each of these pillars are used to form <100> or <110> crystals on the back surface of the (001) wafer. It is described that holding the wafer in an orientation suppresses the occurrence of slip.

JP 2014-127685 A JP-A-10-062355 Japanese Patent Application Laid-Open No. 2001-345357 JP-A-9-139352 Japanese Patent Application Laid-Open No. 2013-238600

As a method for evaluating a slip defect, Patent Document 2 describes quantification of the slip defect length, but does not show a specific method. Moreover, although Patent Document 3 also mentions quantification, it is a quantification method for a limited location within the wafer surface. Also, the use of XRT in Patent Document 1 is excellent in revealing slip defects, but it is clear that quantification is difficult. Slip defects are mainly caused by heat treatment. Therefore, it is necessary to consider a heat treatment method that facilitates the quantification of slip defects. Patent document 4 describes shifting the placement of the wafer in the heat treatment furnace depending on the orientation of the wafer, but this is a method of suppressing slip defects and does not describe evaluation of slip defects.

SUMMARY OF THE INVENTION The present invention has been made in view of the problems described above, and an object of the present invention is to provide a method for accurately quantifying slip defects occurring on the main surface of a silicon wafer.

In order to solve the above problems, in the present invention,
A method for evaluating slip defects on the main surface of a silicon wafer using a laser scattering particle counter,
(S1) a step of detecting defects on the main surface of the silicon wafer using the DNN channel of the particle counter to obtain defect position data composed of defect points;
(S2) extracting slip defects from the defect position data; and (S3) evaluating the number of defect points included in the extracted slip defects;
To provide a slip defect evaluation method comprising:

By using this method, it is possible to quantify slip defects occurring on the main surface of a silicon wafer with high accuracy.

Moreover, it is preferable to use the main surface of the silicon wafer as the main surface.

It is particularly preferable to use the present invention for evaluation of the main surface, which is the device fabrication surface.

Moreover, in the step (S1), the defect to be detected is preferably a defect having a size of 0.1 μm or more.

As described above, the present invention does not require a highly sensitive particle counter, and slip defects can be detected relatively easily.

Further, in the step (S2), it is preferable to regard the aggregate of the adjacent defect points as a cluster defect, and extract the cluster defect as a slip defect.

In this way, the slip defect can be easily extracted with high precision.

At this time, it is preferable that the cluster defect is an aggregate of the defect points within a proximity distance of 30 μm.

Such close distances are suitable for extracting cluster defects.

At this time, it is preferable to evaluate the number of the defect points included in the cluster defect in the step (S3).

In this way, slip defects can be evaluated only by the number of defects without using indices such as length and area.

Moreover, it is preferable that the silicon wafer is placed in a heat treatment furnace with an orientation reference and subjected to heat treatment.

Such a silicon wafer further improves the accuracy of quantification.

As described above, according to the present invention, it is possible to accurately quantify slip defects occurring on the main surface of a silicon wafer. Therefore, it can be used as a criterion for determining silicon wafer manufacturing conditions, process control of the heat treatment process, and by setting a threshold value for the quantified slip defect detection amount, it is also possible to make pass/fail judgments before shipment. be.

FIG. 2 is a flow diagram showing a slip defect evaluation method of the present invention; It is an example of a silicon wafer map obtained with a DNN channel in Examples and Comparative Examples. It is an example of a silicon wafer map obtained in a DNN channel after extracting slip defects in Examples and Comparative Examples. It is an example of the silicon wafer map obtained by the DWN channel in a comparative example, and this silicon wafer map after slip defect extraction.

As described above, there has been a demand for development of a method for accurately quantifying slip defects occurring on the main surface of a silicon wafer.

As a result of intensive studies on the above-mentioned problems, the inventors of the present invention performed a defect inspection of a silicon wafer using a DNN channel, which is a channel of a particle counter of a laser scattering method, and based on the defect, by a predetermined method. We propose that slip defects on the entire surface of a silicon wafer can be quantified and evaluated by extracting slip defects. By enabling the quantification of slip defects in this way, for example, it can be used as a judgment material when determining the manufacturing conditions of silicon wafers, process control of the heat treatment process, and a threshold value for the quantified slip defect detection amount. It is also possible to make a pass/fail judgment before shipment by providing The present invention also proposes a method of placing a silicon wafer in a heat treatment furnace that facilitates quantification of slip defects during heat treatment in which slip defects occur.

That is, the present invention is a method for evaluating slip defects on the main surface of a silicon wafer using a laser scattering particle counter,
(S1) a step of detecting defects on the main surface of the silicon wafer using the DNN channel of the particle counter to obtain defect position data composed of defect points;
(S2) extracting slip defects from the defect position data; and (S3) evaluating the number of defect points included in the extracted slip defects;
It is a slip defect evaluation method including.

Although the present invention will be described in detail below, the present invention is not limited thereto.

<Method for evaluating slip defects>
FIG. 1 is a flow chart showing the slip defect evaluation method of the present invention. In the present invention, the steps (S1) to (S3) described later are performed in order, but in the previous stage from the flow shown in FIG. As described above, the heat treatment process for silicon wafers is the most representative process for generating slip defects. Therefore, it is preferable that the heat treatment step is included before the flow shown in FIG.

When performing the heat treatment process of the silicon wafer, it is preferable to perform the heat treatment while the silicon wafer is placed in the heat treatment furnace on the basis of the orientation.

Slip defects are known to occur mainly in the heat treatment process. In the heat treatment process, when the silicon wafer is placed in the heat treatment furnace, conventionally, a method of placing the silicon wafer on the basis of the notch that aligns the position of the notch indicating the orientation has been generally adopted. However, since the orientation of the notch is determined according to the device manufacturer's specifications, specifically, in the case of a silicon wafer having a (100) main surface, there are a plurality of notch orientations such as <100> and <110>. When heat-treating samples having a plurality of such notch orientations at the same time, the notch reference is not the above-mentioned notch reference, but the orientation reference is <100>. Holding the wafer in an orientation further improves the accuracy of the quantification.

Each step of the slip defect evaluation method of the present invention will be described in detail below.

<(S1) step>
The (S1) step is a step of detecting defects on the main surface of the silicon wafer using the DNN channel of the particle counter and obtaining defect position data composed of defect points.

The particle counter used in the present invention is a laser scattering method, and any particle counter that can detect defects using a DNN channel in the measurement can be used. It is preferred to use the SurfScan series. In order to identify the defect position, the particle counter must be able to output the position coordinates of the detected defect.

The laser scattering particle counter used in the present invention includes, for example, two types of incident systems and two types of detection systems. At this time, the high-angle side of the two types of incidence systems with respect to the wafer is high-angle incidence (Normal), and the other is low-angle incidence (Oblique). Further, of the two types of detection systems, the high angle side with respect to the wafer is high angle detection (Narrow), and the other is low angle detection (Wide). By combining these two types of incident systems and two types of detection systems, DWN (high-angle incidence/low-angle detection), DNN (high-angle incidence/high-angle detection), DWO (low-angle incidence/low-angle detection), and Four types of measurement modes (channels) of DNO (low angle incidence/high angle detection) are possible.

Specifically, the DWN represents the path that carries scattered light focused by an elliptical mirror from normal illumination. DNN represents the path carrying scattered light focused by a lens concentrator from normal illumination. A DWO represents the path that carries scattered light focused by an elliptical mirror from oblique illumination. And DNO represents the path that carries the scattered light focused by the lens concentrator from the oblique illumination.

Among these, the DNN channel is used in the present invention because it is particularly easy to detect slip defects when using the DNN channel. Here, Patent Document 5 also has a detailed description of the DNN channel.

The main surface of a silicon wafer includes two surfaces, a main surface and a main back surface. A slip defect is a defect that can be detected on either of these surfaces, but the slip defect evaluation method of the present invention is preferably applied to the main surface, which is the device fabrication surface.

Among various defects obtained by a particle counter, it is preferable to set the detected defect size to 0.1 μm or more. Since this is larger than several tens of nanometers required as a defect size to be detected by device manufacturers in recent years, the present invention does not require a highly sensitive particle counter, and detection of slip defects can be performed relatively easily. be.

Further, the defect position data composed of the defect points obtained in this step is numerical data listing the position coordinates of the locations where the defects are detected on the silicon wafer. Each position coordinate, which is discrete data, is a defect point. By plotting this defect position data, a defect silicon wafer map as shown in FIG. 2a, which will be described later, is obtained. The linear shape (slip defect) shown in FIG. 2a is a collection of a plurality of position coordinates (defect points).

<(S2) step>
The (S2) step is a step of extracting a slip defect from the defect position data.

Extracting a slip defect means selecting a defect point derived from a slip defect from among all the defect points included in the defect position data. A method for extracting a slip defect is not particularly limited.

Extraction of slip defects is, for example, extraction of cluster defects, which are collections of adjacent defect points. Here, cluster defects are described. Slip defects originally occur linearly according to the crystal orientation. However, as described above, detection of defects in the particle counter results in discrete points (defect points). Therefore, by connecting the discrete points, it becomes possible to recognize the slip defect. This is a cluster defect, which is a collection of defect points. Specifically, in the present invention, it is necessary to perform operations to combine adjacent defect points within 30 μm, for example, so a computer capable of performing such operations is prepared. For example, Klarity Defect, which is defect analysis software manufactured by KLA, can be used.

In defining a cluster defect, it is necessary to determine the distance (proximity distance) to determine how close adjacent defect points are to be regarded as a cluster defect. In the present invention, the proximity distance is preferably within 30 μm. A cluster defect, which is a collection of defect points, can be recognized by combining defect points that are adjacent to each other within 30 μm from among the discrete defect points.

Here, a specific example of a 300 mm silicon wafer will be described with respect to coordinates at which an actual slip defect is detected as a defect point using a DNN channel. When the coordinates are (X, Y) and the unit is μm, the center of the silicon wafer is defined as (0, 0) and the notch position is defined as (0, −150000). Here, as two defect points actually adjacent to each other, the coordinates of the first defect point A are (141028, 11771), and the coordinates of the second defect point B adjacent to A are (141043, 11770 )Met. Since the distance between AB of these two points is 15.0 μm, if the proximity distance is 30 μm, these two points will be included in the cluster defect. By extracting defect points generated within a predetermined proximity distance (for example, within 30 μm) as cluster defects in this way, it is possible to reliably extract slip defects, and at the same time slip defects existing farther away than that can be reliably extracted. Defect points that are not can be removed.

Next, it was verified whether the cluster defects obtained by the above work were slip defects. There are various types of defects such as particles and pits, but the percentage of defects other than slip defects (hereinafter referred to as other defects) among the cluster defects extracted under the conditions described above was calculated. As a result, even in the case of samples with many other defects, the ratio of other defects is about 0.1%, and slip defects are dominant, that is, slip defects can be selectively extracted from various defects. It was found that other defects do not affect practical sample comparison.

<(S3) step>
The (S3) step is a step of evaluating the number of defect points included in the extracted slip defects.

The (S3) step is a task of counting the number of defects included in the slip defects extracted in the (S2) step. It should be noted that this work does not count the number of cluster defects to which defect points have been combined, but counts back the number of defect points before combining. This work also requires the above-mentioned computer, and preferably the above-mentioned Klarity Defect can be used.

In this way, by first detecting the position of the defect point and extracting a collection of adjacent defect points from the defect coordinates as a cluster defect, slip defects and defects other than slip defects can be reliably discriminated, and defects other than slip defects can be identified. By returning cluster defects from which defects have been removed to the original defect points and evaluating the number of the defect points, it is possible to quantitatively evaluate only slip defects.

A cluster defect is a collection of defect points as described above. Therefore, when cluster defects themselves are used for evaluation of slip defects, indicators of length and area are also required, but in the present invention, only the number of defects constituting cluster defects is simply used. In this way, by returning to the number of defects before they are combined as cluster defects for evaluation, slip defects can be evaluated only by the number of defects without using indices such as length and area.

EXAMPLES The present invention will be specifically described below using Examples and Comparative Examples, but the present invention is not limited to these.

<Example 1>
In Example 1, a silicon wafer having a diameter of 300 mm and a main surface of (100) plane was used. By the way, to briefly describe the production flow of this silicon wafer, it consists of production of a silicon single crystal ingot, ingot slicing, chamfering, lapping, etching, polishing, and cleaning in order.

After these production flows, the silicon wafer samples were subjected to heat treatment using a heat treatment pattern that easily causes slip defects. The method of placing the silicon wafer in this heat treatment uses the orientation reference described above.

2a and 2b are different silicon wafer samples. Both figures are silicon wafer maps created from defect position data obtained by measurement with a particle counter after the heat treatment. The particle counter used here is SurfScan series SP3 manufactured by KLA, the defect size is 0.1 μm or more, and the channel is a DNN channel. As can be seen from this silicon wafer map, slip defects and other defects can be confirmed. The process up to this point corresponds to S1 in FIG.

Thus, after the silicon wafer map is created by the DNN channel, the work of extracting slip defects is performed. In Example 1, this extraction work is performed by the Klarity Defect. Here, the proximity distance between adjacent defect points is set to within 30 μm, and the defect points in the defect position data are combined, and only the defect points that are combined are extracted from all the defect points. A map is shown in FIG. It can be seen from FIG. 3 that slip defects are well extracted. Incidentally, FIG. 2a corresponds to the sample of FIG. 3a, and FIG. 2b corresponds to the sample of FIG. 3b. The process up to this point corresponds to S2 in FIG.

After obtaining the silicon wafer map of FIG. 3, the step of outputting the number of defect points appearing in this figure is S3 in FIG. Note, as noted above, that in this work there is no counting of cluster defects of combined defect points. Defects extracted in a cluster form become defects having length and area, so elements of length and area are required when quantifying slip defects. However, in the case of the present invention, since the number of defective points is counted before bonding, the elements of length and area are unnecessary and simple. Incidentally, the above Klarity Defect was also used in this step.

In Example 1, it was verified that the cluster defects extracted as shown in FIG. 3 are not different from slip defects. Specifically, defects extracted as slip defects as shown in FIG. 3 were observed under a microscope. As the observation procedure, 10 silicon wafers were prepared from S1 to S3 in FIG. Confirmed whether or not defects are present. Incidentally, microscopic observation was carried out by differential interference interference observation using an OPTELICS hybrid microscope manufactured by Lasertec. One of the maps specifically used is FIG. 3a. As a result, slip defects were detected at a rate of 100% at a total of 50 points (5 points per silicon wafer×10 wafers).

From the above, when Example 1 is compared with Comparative Example 1, which will be described later, it can be seen that the present invention reliably extracts slip defects. Here, the quantification of slip defects will be described. On the defect position data, the slip defect is configured as a collection of discrete defect points. Therefore, if the slip defect can be extracted with high accuracy as shown in FIG. It becomes a quantitative value of the slip defect.

By the way, to show the specific number of defects, the number of defects shown in FIG. 2a before extracting slip defects was 58781, and the number of defects shown in FIG. 2b was 42284. Next, in the state of FIG. 3 extracted as cluster defects, the number of defect points when the cluster defects were returned to the original discrete defect points was 18055 in FIG. 3a and 4341 in FIG. 3b. As described above, in FIG. 2, slip defects are not extracted, so it is not possible to compare slip defects from the number of defects shown in FIGS. 2a and 2b. Comparing slip defects based on the number of defects is highly reliable and easy.

<Comparative Example 1>
In Comparative Example 1, for 10 silicon wafers, 5 defect points per silicon wafer were arbitrarily selected from the silicon wafer map before extracting slip defects as shown in FIG. 2, and these were observed with a microscope. and checked for slip defects. One of the maps specifically used is FIG. 2a. As a result, slip defects were found in 22 out of 50 points, resulting in a slip defect ratio of 44%.

<Comparative Example 2>
In Comparative Example 2, an attempt was made to extract slip defects using a DWN channel (see Patent Document 5) that is different from the DNN channel. The sample used was the same silicon wafer as the sample used in FIGS. 2a and 3a of Example 1. FIG. FIG. 4a shows a state in which defects of 0.1 .mu.m or more are focused on by measuring with the above SP3 DWN channel for this silicon wafer. Next, the work of extracting slip defects was performed in the same manner as in the first embodiment. A silicon wafer map after the extraction operation is shown in FIG. 4b. The maps of the DNN channel and the DWN channel are compared in FIG. 4a with respect to FIG. 2a, and in FIG. 4b with respect to FIG. 3a. As can be seen from both maps in FIG. 4, slip defects are not accurately extracted in the DWN channel, making it difficult to quantify slip defects.

Here again, when showing the specific number of defect points, the number of defect points shown in FIG. 4a before extracting the slip defect was 38781. Next, in FIG. 4B where the same extraction work as in Example 1 was performed, the number of defect points was 2274. In FIG. From this result, it was found that the slip defect could not be detected by the method according to Comparative Example 2 also numerically. Thus, it was proved that slip defect extraction in a DNN channel like the present invention is excellent.

It should be noted that the present invention is not limited to the above embodiments. The above-described embodiment is an example, and any device having substantially the same configuration as the technical idea described in the claims of the present invention and exhibiting the same effects is the present invention. is included in the technical scope of

As described above, as shown by the effects of the present invention, slip defects occurring on the main surface of a silicon wafer can be quantified with high accuracy. Therefore, it can be used in various cases such as being used as a judgment material when determining the manufacturing conditions of silicon wafers and process control of heat treatment processes.

Claims (7)

A method for evaluating slip defects on the main surface of a silicon wafer using a laser scattering particle counter,
(S1) a step of detecting defects on the main surface of the silicon wafer using the DNN channel of the particle counter to obtain defect position data composed of defect points;
(S2) extracting slip defects from the defect position data; and (S3) evaluating the number of defect points included in the extracted slip defects;
A slip defect evaluation method comprising: 2. The slip defect evaluation method according to claim 1, wherein the main surface of the silicon wafer is the main surface. 3. The slip defect evaluation method according to claim 1, wherein in said step (S1), said defect to be detected is a defect having a size of 0.1 [mu]m or more. 4. The method according to any one of claims 1 to 3, wherein in the step (S2), a cluster defect is regarded as a cluster defect, and the cluster defect is extracted as a slip defect. Method for evaluating slip defects described. 5. The slip defect evaluation method according to claim 4, wherein said cluster defect is an aggregate of said defect points within a proximity distance of 30 [mu]m. 6. The slip defect evaluation method according to claim 4, wherein in said step (S3), the number of said defect points included in said cluster defect is evaluated. 7. The slip defect evaluation method according to any one of claims 1 to 6, wherein the silicon wafer is placed in a heat treatment furnace on an orientation basis and heat treated.

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