JP2022102065A - Inspection device for arc discharge detector - Google Patents

Abstract

To provide an inspection device for an arc discharge detector that can confirm that the arc discharge detector operates correctly by superimposing a high-frequency signal component imitating an arc discharge on a low-frequency AC signal supplied to an electric circuit connected to a commercial power supply.SOLUTION: Two series of high-frequency transmission means generate two series of high-frequency pulse signals with different delay times from each other, and superimpose them on a sine waveform of a low-frequency AC signal of a commercial power supply as a base. The two series of high-frequency pulse signals are made to be generated at an interval within a half wave period of the sine waveform of the low-frequency AC signal of the commercial power supply. As a result, a third pulse signal of the two series is detected by an arc discharge detector as a high-frequency signal component imitating an arc discharge.SELECTED DRAWING: Figure 5

Description

There is an application for exception of loss of novelty

The present invention relates to an inspector for an arc discharge detection device that inspects the operation of the arc discharge detection device that detects an arc discharge.

Some arc discharges occur between different poles and some occur between the same poles. Since a large short-circuit current flows in an arc discharge generated between different poles, various detection methods have been conventionally proposed. On the other hand, in the arc discharge generated between the same poles, various energies are generated depending on the load current. In addition, the arc discharge that occurs between the same poles is often minute and intermittent, and there are many places where it occurs, so it is uncertain. Therefore, it is difficult to detect it.

Therefore, most of the conventional devices for detecting an arc discharge detect an arc discharge generated between different poles, and few detect an arc discharge generated between the same poles.

For example, the arc detector shown in Patent Document 1 below also detects an arc short-circuit phenomenon involving an arc between core wires in a cord or indoor wiring that could not be detected by an instantaneous circuit breaker, that is, an arc discharge generated between different poles. be. However, by applying this technique to a series arc that occurs in indoor wiring, that is, an arc discharge that occurs between the same poles, the series arc is detected, the electric circuit is cut off, and a fire is prevented.

Specifically, in the above arc detector, as a method of detecting a series arc, when the effective value voltage of the outlet port becomes a predetermined voltage (for example, 70V) or less, an arc discharge due to the series arc occurs. We are proposing a method to determine that there is.

However, although the conventional arc detector can detect a series arc that causes a voltage drop of about 30 V, it cannot detect a series arc at an earlier stage that causes a voltage drop smaller than that.

In response to this, the present inventors have proposed an arc discharge detection circuit shown in Patent Document 2 below, and an arc discharge detection device, an arc discharge alarm device, and a circuit breaker provided with the arc discharge detection circuit.

Japanese Unexamined Patent Publication No. 2001-045652 Japanese Unexamined Patent Publication No. 2019-184381

The arc discharge detection device shown in Patent Document 2 makes it possible to detect a series arc in a more initial stage more reliably and accurately, and by installing this device, the arc discharge can be effectively detected. be able to.

However, the fire caused by the arc discharge is visually identifiable and has an overt property, but the arc discharge generated in the wiring before the fire is not visually identifiable and has a potential property. Have. Therefore, after installing the arc discharge detection device, it is difficult to determine whether or not this device is operating normally.

Therefore, the present invention addresses the above and superimposes a high-frequency signal component imitating an arc discharge on a low-frequency AC signal supplied to an electric circuit connected to a commercial power supply to detect an arc discharge. It is an object of the present invention to provide an inspection device for an arc discharge detector capable of confirming that the circuit operates accurately.

In solving the above problems, as a result of diligent research, the present inventors have designed a circuit in which two high-frequency signal components are superimposed at intervals within the half-wave period of the sinusoidal waveform of the low-frequency AC signal flowing in the electric circuit. The present invention has been completed by finding that the above problems can be solved.

That is, according to the description of claim 1, the inspection device for an arc discharge detection device according to the present invention is described.
It is an inspection device for confirming the operation of the arc discharge detection device by superimposing a high frequency signal component imitating an arc discharge on a low frequency AC signal supplied to an electric circuit connected to a commercial power supply.
A voltage dividing waveform output means for outputting a half-wave divided voltage waveform (A) based on the sine and cosine waveform (1) of the low-frequency AC signal, and a voltage dividing waveform output means.
A first pulse generating means (10) that generates a first pulse signal (B) having a predetermined voltage value while the divided voltage waveform is equal to or higher than a predetermined threshold voltage.
It has two series of high frequency transmitting means (120, 130) that generate the high frequency signal component imitating an arc discharge by using the first pulse signal generated by the first pulse generating means as a trigger pulse.
The two series of high frequency transmitting means include a second pulse generating means and a third pulse generating means (20, 30), respectively.
The second pulse generation means uses the first pulse signal generated by the first pulse generation means by each delay means as a trigger pulse, and delays the second pulse signal (C1) by a predetermined non-detection time. , C2),
The third pulse generating means uses the second pulse signal of the two series generated by each of the second pulse generating means as a trigger pulse, and receives the second pulse signal at the falling edge of the second pulse signal of the two series. By generating two series of third pulse signals (D1, D2) with a time length shorter than the time length,
The second-series third pulse signals generated by the two-series high-frequency transmitting means are generated at intervals within the half-wave cycle of the sinusoidal waveform of the low-frequency AC signal while having different delay times by each delay means. As a result, the second series of third pulse signals are output as the high frequency signal component imitating an arc discharge.

Further, according to the second aspect of the present invention, the inspection device for the arc discharge detection device according to the first aspect of the present invention.
The two series of high frequency transmitting means include a continuous transmitting means (40, 50) for generating a continuous high frequency signal (F) and a fourth pulse generating means for generating a fourth pulse signal (E1, E2), respectively. ,
The fourth pulse generating means continuously generates a high frequency signal transmitted by the continuous transmitting means as the fourth pulse signal in place of the third pulse signal during the time length during which the third pulse signal is generated. It is characterized by.

Further, according to the third aspect of the present invention, the inspection device for the arc discharge detection device according to the first or second aspect of the present invention.
The first pulse generating means is characterized by comprising a comparator (10).

Further, according to the description of claim 4, the present invention is the inspection device for an arc discharge detection device according to any one of claims 1 to 3.
It has a pulse changeover switch (7e) for switching the operation of the two-series high-frequency transmitting means between the two-series operation and the one-series operation.
In the case of two-series operation, the arc discharge detection device recognizes that the arc discharge is caused by transmitting the third pulse signal of the two series.
In the case of one-series operation, the arc discharge detection device does not recognize the arc discharge because the third pulse signal of only one of the two series is transmitted.

Further, according to the description of claim 5, the present invention is the inspection device for an arc discharge detection device according to any one of claims 1 to 4.
It has a pulse generation switch (7d), and is characterized in that the high frequency signal component simulating an arc discharge is transmitted only at predetermined time intervals.

Further, according to the description of claim 6, the present invention is the inspection device for an arc discharge detection device according to any one of claims 1 to 5.
It is characterized in that it is used by connecting to an outlet (6) provided in the electric circuit connected to a commercial power source.

The reference numerals in parentheses of each of the above means indicate the correspondence with the specific means described in the embodiment described later.

According to the above configuration, the inspection device for an arc discharge detection device has a voltage division waveform output means, a first pulse generation means, and two series of high frequency transmission means. The partial pressure waveform output means outputs a half-wave divided waveform based on a sine and cosine waveform of a low-frequency AC signal. The first pulse generating means generates a first pulse signal having a predetermined voltage value while the voltage dividing waveform is equal to or higher than a predetermined threshold voltage.

The two-series high-frequency transmitting means have the same configuration, and each includes a second pulse generating means and a third pulse generating means. The second pulse generation means uses the first pulse signal generated by the first pulse generation means by each delay means as a trigger pulse to generate two series of second pulse signals delayed by a predetermined non-detection time.

The third pulse generating means uses the second pulse signal of the two series generated by each second pulse generating means as a trigger pulse, and the time length of the second pulse signal at the falling edge of the second pulse signal of the two series. Generates a two-series third pulse signal with a shorter time length.

In such a configuration, the two-series third pulse signals generated by the two-series high-frequency transmitting means have different delay times due to each delay means, and the intervals within the half-wave cycle of the sine waveform of the low-frequency AC signal are different. Generate with. These two series of third pulse signals are output as high frequency signal components imitating arc discharge.

As a result, according to the above configuration, the arc discharge detection device operates accurately by superimposing the high frequency signal component imitating the arc discharge on the low frequency AC signal supplied to the electric circuit connected to the commercial power supply. It is possible to provide an inspection device for an arc discharge detection device that can confirm.

Further, according to the above configuration, the two-series high-frequency transmission means may include a continuous transmission means and a fourth pulse generation means, respectively. The fourth pulse generating means can continuously generate a high frequency signal transmitted by the continuous transmitting means as the fourth pulse signal in place of the third pulse signal during the time length during which the third pulse signal is generated. As a result, the above-mentioned action and effect can be exerted more effectively.

Further, according to the above configuration, the first pulse generating means may be composed of a comparator. This makes it possible to exert the above-mentioned action and effect more concretely.

Here, the cause of generating the high frequency signal is not only the arc discharge but also the opening / closing surge and noise. Therefore, it is not possible to determine whether or not the arc discharge is true simply by superimposing the high frequency signal component on the low frequency AC signal.

Therefore, according to the above configuration, it may have a pulse changeover switch that switches the operation of the two-series high-frequency transmission means between the two-series operation and the one-series operation. In the case of two-series operation, the arc discharge detection device recognizes the arc discharge by transmitting the second-series third pulse signal. On the other hand, in the case of one-series operation, the arc discharge detection device does not recognize the arc discharge because the third pulse signal of only one of the two series is transmitted. This makes it possible to confirm the malfunction of the arc discharge detection device.

Further, according to the above configuration, the inspection device for the arc discharge detection device may have a pulse generation switch. This makes it possible to transmit a high frequency signal component that imitates an arc discharge only at predetermined time intervals.

Further, according to the above configuration, the arc discharge detection device inspection device may be used by being connected to an outlet provided in an electric circuit connected to a commercial power source. This makes it possible to confirm the operation of the arc discharge detection device by a simpler method.

It is a figure which shows the high frequency signal generated by one shot superimposed on the sine and cosine waveform of a low frequency AC signal. It is a figure which shows the high frequency signal which occurs continuously or intermittently superimposed on the sine and cosine waveform of a low frequency AC signal. It is a conceptual diagram which shows the state which the inspection device for an arc discharge detection apparatus which concerns on this invention is used for the outlet line of the indoor wiring of a commercial power source. FIG. 3 is a perspective view showing the appearance of the inspection device for an arc discharge detection device used in FIG. It is a figure which shows one Embodiment of the whole electronic circuit in the inspection apparatus for arc discharge detection apparatus which concerns on this invention. It is a figure which shows the partial circuit 110 in the electronic circuit of FIG. It is a figure which shows the partial circuit 120 in the electronic circuit of FIG. It is a figure which shows the partial circuit 130 in the electronic circuit of FIG. It is a figure which shows the partial circuit 140 in the electronic circuit of FIG. It is a figure which shows the partial circuit 150 in the electronic circuit of FIG. It is a figure which shows an example of the output signal obtained from the predetermined terminal pair of the electronic circuit of FIG. It is a figure which shows an example of the high frequency output signal which the partial circuit shown in FIG. 7 and FIG. 8 emits.

First, the detection of arc discharge will be described. When a series arc in the initial stage is generated on the electric circuit of the commercial power supply, a peculiar high frequency signal is generated accordingly. Then, the high frequency signal is superimposed on the low frequency (for example, 60 Hz) AC signal supplied by the commercial power supply and transmitted on the electric circuit. Here, the peculiar high-frequency signal is a signal having a frequency exceeding 10 kHz and is generated continuously or intermittently.

The arc discharge detection device according to the present invention selects and detects a high-frequency signal when the high-frequency signal is superimposed on the low-frequency AC signal of a commercial power source. Here, as an arc discharge detection circuit used in the arc discharge detection device, the above Patent Document 2 will be described below as an example. The arc discharge detection circuit is not limited to the following examples, and may be any circuit that selects and detects a high frequency signal.

The arc discharge detection circuit according to Patent Document 2 is composed of a capacitor connected in series, a resistor, and an output terminal pair. The arc discharge detection circuit is connected in parallel with the commercial power supply between the indoor wiring lines of the commercial power supply. Here, the impedance of the resistance does not depend on the frequency of the electric signal applied to the resistance. On the other hand, the impedance of a capacitor depends on the frequency of the electric signal applied to the capacitor.

As a result, when a high-frequency signal of arc discharge is superimposed on a low-frequency signal of a commercial power supply is applied to the capacitor, the capacitor does not pass the low-frequency signal component but passes only the high-frequency signal component.

Therefore, if a circuit configuration in which a capacitor and a resistor are connected in series, such as an arc discharge detection circuit, the low frequency signal component of the superimposed signal does not pass through the capacitor, so a voltage is generated in the resistor by the low frequency signal component. do not do. On the other hand, since the high frequency signal component passes through the capacitor, a voltage is generated in the resistance by the high frequency signal component. That is, when a voltage is generated in the pair of output terminals at both ends of the resistor, the voltage is generated by the high frequency signal.

Therefore, if the voltage of the pair of output terminals at both ends of the resistor is monitored and the voltage is detected, the voltage can be detected as an arc discharge as if it was generated by a high frequency signal.

However, the cause of generating high frequency signals is not only arc discharge but also switching surge and noise, so even if a voltage is generated in the output terminal pair, the voltage is generated due to arc discharge. It cannot be concluded that it is.

Therefore, the arc discharge detection circuit according to Patent Document 2 is continuously or intermittently within a predetermined time (for example, within a half-wave cycle of a sinusoidal waveform of a low-frequency AC signal), except for a single high-frequency signal. I try to select and detect what occurs.

FIG. 1 is a diagram showing a single-shot high-frequency signal superimposed on a sine and cosine waveform of a low-frequency AC signal. In FIG. 1, one high-frequency signal 2a is superimposed on a half-wave of a sine and cosine waveform 1 of a low-frequency AC signal. The high frequency signal 2a is generated independently, periodically or irregularly. Each of the high frequency signals 2a is single-shot and is determined to be an opening / closing surge, noise, or the like. Therefore, the arc discharge detection device is configured not to detect such a high frequency signal 2a generated in a single shot as an arc.

On the other hand, FIG. 2 is a diagram showing a high-frequency signal that is continuously or intermittently generated superimposed on a sine and cosine waveform of a low-frequency AC signal. In FIG. 2, two high-frequency signals 2b and 2c are superimposed on a half-wave of a sine and cosine waveform 1 of a low-frequency AC signal. The high frequency signals 2b and 2c are generated continuously or intermittently within a predetermined time (within the half-wave cycle of the sine and cosine waveform in FIG. 2). Such a plurality of high-frequency signals 2b and 2c may have an arc discharge, unlike opening / closing surges and noise. Therefore, the arc discharge detection device is configured to detect such continuously or intermittently generated high frequency signals 2b and 2c as an arc.

Next, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following embodiments. FIG. 3 is a conceptual diagram showing a state in which the inspection device for an arc discharge detection device according to the present invention is used as an outlet line for indoor wiring of a commercial power source.

In FIG. 3, the arc discharge detecting device 3 for detecting the arc discharge is arranged near the switchboard 4 of the commercial power supply. The indoor wiring 5 of the commercial power supply is provided with outlets 6 at several locations (two locations in FIG. 3). In the present embodiment, the arc discharge detection device inspection device 7 according to the present invention can be easily used by inserting the outlet plug 7a into the outlet 6. In addition, when using the inspection device for the arc discharge detection device, it may be connected between the lines of the indoor wiring by another method without going through the outlet.

FIG. 4 is a perspective view showing the appearance of the inspection device for the arc discharge detection device used in FIG. In FIG. 4, the arc discharge detection device inspection device 7 is composed of an inspection device main body 7b and an outlet plug 7a. An electronic circuit (described later) of the inspection device is housed inside the inspection device main body 7b. Further, a power switch 7c, a pulse generation switch 7d (described later), and a pulse changeover switch 7e (described later) are provided on the upper surface of the inspection device main body 7b.

Next, the electronic circuit of the inspection device 7 for the arc discharge detection device according to the present embodiment will be described. FIG. 5 is a diagram showing an embodiment of an electronic circuit in an inspection device for an arc discharge detection device according to the present invention. In FIG. 5, the electronic circuit 100 is connected to the indoor wiring of a commercial power source (used by inserting the outlet plug 7a into the outlet 6 as described above). Therefore, the terminal Ta and the terminal Tb in FIG. 5 are taken from the different poles of the indoor wiring, respectively. Further, FIG. 11 is a diagram showing an example of an output signal obtained from a predetermined terminal pair of the electronic circuit of FIG.

In FIG. 5, the electronic circuit 100 is composed of five subcircuits 110, 120, 130, 140, 150. The partial circuit 110 includes a comparator 10 and outputs a square wave B (see FIG. 11) from the half-wave partial pressure waveform A (see FIG. 11) shown in FIG. 11 based on the sine and cosine waveform of the AC commercial power supply. .. The partial circuits 120 and 130 basically have the same configuration, and are provided with one-shot pulse circuits 20 and 30, respectively, and have rectangular waves C1 and C2 (see FIG. 11) delayed from the rectangular wave B by a predetermined time. It outputs and outputs rectangular waves D1 and D2 (see FIG. 11), which have shorter transmission times, respectively.

Further, these partial circuits 120 and 130 further include transmission circuits 40 and 50 to output continuous high frequency F (see FIG. 12 described later) having an extremely short transmission time, and square waves D1 and D2 (FIG. 12). 11) is generated, instead of the square waves D1 and D2, continuous high frequencies E1 and E2 (see FIG. 11) having the same extremely short transmission time are continuously generated. The partial circuit 140 is a switch circuit for operating the electronic circuit 100. Further, the partial circuit 150 is a circuit for superimposing the rectangular waves E1 and E2 on the sine and cosine waveform of the AC commercial power supply.

Hereinafter, the configuration and operation of each partial circuit will be described in detail. FIG. 6 is a diagram showing a partial circuit 110 in the electronic circuit 100 according to the present embodiment. In FIG. 6, the partial circuit 110 includes one diode bridge 111, one diode 112, one Zener diode 113, one transistor 114, and three resistors 115, 116, 117. It is composed of two capacitors 118 and 119 and a set of comparators 10.

The diode bridge 111 converts the AC power supply between the terminals Ta and Tb of the indoor wiring into a DC power supply. One end of the resistor 115 is connected to the DC (+) side of the diode bridge 111. The other end of the resistor 115 is connected to the collector of the transistor 114, one end of the resistor 116, and one end of the capacitor 118. The other end of the resistor 116 is connected to the base of the transistor 114 and the output end of the Zener diode 113. The other end of the capacitor 118 and the input end of the Zener diode 113 are connected to the DC (−) side of the diode bridge 111.

The emitter of the transistor 114 is connected to one end of the capacitor 119 and is one input end of the comparator 10. Further, the input end of the diode 112 is connected to the terminal Ta of the indoor wiring. The output end of the diode 112 is connected to one end of the resistor 117, and the other end of the resistor 117 is the other input end of the comparator 10.

In FIG. 6, the comparator 10 is composed of seven resistors 11 to 17 and an operational amplifier 18. One input end input to the comparator 10 from the emitter of the transistor 114 is connected to one end of the resistor 11 and serves as one output terminal W1 or W2 of the comparator 10. The other end of the resistance 11 is connected to each end of the resistance 12 and the resistance 13. The other end of the resistor 13 is connected to the negative (−) side input end of the operational amplifier 18. The other end of the resistor 12 is connected to the DC (−) side of the diode bridge 111.

Further, the other input end input from the other end of the resistor 117 to the comparator 10 is connected to each one end of the resistance 14 and the resistance 15. The other end of the resistor 14 is connected to the DC (−) side of the diode bridge 111. The other end of the resistor 15 is connected to the positive (+) side input end of the operational amplifier 18. Then, the resistor 16 is inserted between the output end and the + side input end of the operational amplifier 18 to form positive feedback.

Further, the output end of the operational amplifier 18 is connected to one end of the resistor 17 and serves as the other output terminals X1 and X2 of the comparator 10. The other end of the resistor 17 is connected to the DC (−) side of the diode bridge 111.

The resistance 11 and the resistance 12 divide the power supply voltage supplied from the DC (+) side of the diode bridge 111 so that a voltage of, for example, +5.6 V is applied to the negative side input end of the operational amplifier 18. As a result, the operational amplifier 18 outputs high (H), for example, + 9V when a voltage of +5.6V or more is applied to the + side input end, while a voltage of less than +5.6V is output to the + side input end. When applied, it outputs low (L), for example 0V.

Therefore, when the half-wave voltage divider waveform A of FIG. 11 is input to the comparator 10, the comparator 10 outputs the “H” level of + 9V only in the section where the input voltage is +5.6V or more. The rectangular wave B in FIG. 11 shows an output signal from the comparator 10.

Note that FIG. 11A shows an example of a half-wave 1/18 voltage division waveform of the sine and cosine waveform indicated by the reference numeral “A” in FIG. Further, FIG. 11B shows an example of a rectangular wave pulse output from the output end of the operational amplifier 18, that is, from the position indicated by the reference numeral “B” in FIG.

While the voltage of the voltage waveform of the half-wave divided waveform A in FIG. 11 is +5.6 V or more, the comparator 10 is shown in the square wave B in FIG. 11, for example, a rectangular wave having a time length of 3.5 ms. A pulse is generated and output to the two partial circuits 120 and 130, respectively. The two sets of output terminal pairs W1-X1 and W2-X2 of the comparator 10 are input to the partial circuits 120 and 130, respectively.

First, the partial circuit 120 will be described. FIG. 7 is a diagram showing a partial circuit 120 in the electronic circuit 100 according to the present embodiment. In FIG. 7, the partial circuit 120 includes four inverters 121, 122, 123, 124, one resistor 125, one capacitor 126, one NAND circuit 127, and one diode 128. It is composed of a set of one-shot pulse circuits 20 and a set of transmission circuits 40. Each inverter operates as a NOT circuit.

One output terminal X1 of the comparator 10 (see FIG. 6) is connected to the input end of the inverter 121. The output end of the inverter 121 is connected to one end of the resistor 125, the other end of the resistor 125 is connected to the input end of the inverter 122 and one end of the capacitor 126, and the other end of the capacitor 126 is the DC (-) of the diode bridge 111. ) Is connected. The output end of the inverter 122 is connected to the input end of the inverter 123, and the output end of the inverter 123 is one input end of the one-shot pulse circuit 20.

When the output of the comparator 10 is “H” shown in the rectangular wave B of FIG. 11, the output end of the inverter 121 becomes “L” and no current flows through the resistor 125. On the other hand, when the output of the comparator 10 is switched from "H" to "L", a current flows through the resistor 125. This current supplies an electric charge to the capacitor 126 and flows until the capacitor 126 is fully charged. When the capacitor 126 is fully charged, no current flows through the resistor 125, and the potential at the connection point between the capacitor 126 and the resistor 125 rises. In response to this, the inverter 122 starts operating.

When the input end of the inverter 122 becomes “H”, the output end of the inverter 122 becomes “L”. As a result, when the input end of the inverter 123 becomes “L”, the output end of the inverter 123 becomes “H”. However, the inverter 123 does not immediately output "L" even if "H" is output from the inverter 121. This is because the inverter 122 outputs "H" after being delayed by a time corresponding to the CR time constant determined by the capacitance of the capacitor 126 and the resistance value of the resistor 125.

The rectangular wave C1 in FIG. 11 shows how the inverter 123 starts outputting the rectangular wave pulse C1 from the time when the delay is 100 μs. This delay time "100 μs" is shorter than the half cycle "8 ms" when the frequency of the commercial power supply is "60 Hz". Note that FIG. 11C1 shows an example of a rectangular wave pulse output from the output end of the inverter 122, that is, from the position indicated by the reference numeral “C1” in FIG.

The one-shot pulse circuit 20 is composed of two NAND circuits 21 and 22, two inverters 23 and 24, one capacitor 25, and two resistors 26 and 27.

The output end of the inverter 123 is connected to one input end of the NAND circuit 21, and the output end of the inverter 24 is connected to the other input end of the NAND circuit 21. The output ends of the NAND circuit 21 are connected to both input ends of the NAND circuit 22. The output end of the NAND circuit 22 is connected to one end of the capacitor 25, and the other end of the capacitor 25 is connected to one end of the resistor 26. The other end of the resistor 26 is connected to the input end of the inverter 23 and one end of the resistor 27. The other end of the resistor 27 is connected to the other output terminal W1 of the comparator 10.

The output end of the inverter 23 is connected to the input end of the inverter 24 and is an output terminal 28 of the one-shot pulse circuit 20. The NAND circuit 22 is used as a NOT circuit, that is, an inverter.

The one-shot pulse circuit 20 starts operating when the input drops from "H" to "L". Such a pulse that starts the operation of the one-shot pulse circuit 20 is called a trigger pulse.

When the one-shot pulse circuit 20 starts operating, the output terminal 28 outputs a time constant determined by the capacitance of the capacitor 25 and the resistance value of the resistance 27, that is, a square wave pulse having a time length corresponding to the CR time constant. 11D1 shows, as an example, a square wave pulse having a time length of 200 μs generated at the position of the output terminal 28, that is, the position indicated by the reference numeral “D1” in FIG.

The output terminal 28 of the one-shot pulse circuit 20 is connected to one input end of the NAND circuit 127, and the output terminal 46 of the transmission circuit 40 is connected to one input end. The output end of the NAND circuit 127 is connected to the input end of the inverter 124. The output end of the inverter 124 is connected to the input end of the diode 128, and the output end of the diode 128 is the output terminal Y1 of the partial circuit 120.

The transmission circuit 40 is composed of two inverters 41 and 42, two resistors 43 and 44, and one capacitor 45. The input end of the inverter 41 is connected to one end of the resistor 43. The output end of the inverter 41 is connected to one end of the resistor 43 and the input end of the inverter 42. The output end of the inverter 42 is connected to one end of the capacitor 45, and is connected to the other input end of the NAND circuit 127 as the output terminal 46 of the transmission circuit 40. The other end of the capacitor 45 is connected to the other ends of the resistor 43 and the resistor 44.

In such a configuration, the transmission frequency of the transmission circuit 40 transmits a high frequency pulse in inverse proportion to the capacitance of the capacitor and the resistance value of the resistor. FIG. 12 is a diagram showing an example of high frequency output signals transmitted by the partial circuits 120 and 130. Here, FIG. 12 (1) shows, as an example, a continuous high-frequency pulse F transmitted by the transmission circuit 40 with an extremely short transmission time (30 μs).

As described above, the output terminal 28 of the one-shot pulse circuit 20 is connected to one input terminal of the NAND circuit 127, and the output terminal 46 of the transmission circuit 40 is connected to the other input terminal. In this state, the rectangular wave pulse (200 μs) of FIG. 11D1 is input from the one-shot pulse circuit 20 to one input end of the NAND circuit 127, and the transmission circuit 40 to FIG. 12 (1) is input to the other input end. Continuous high frequency pulse F (30 μs) is input.

A high frequency pulse F that violently repeats "H" and "L" is input to the other input end of the NAND circuit 127. Therefore, in the portion where the square wave pulse D1 is "H", the NAND circuit 127 outputs "L" when the high frequency pulse F is "H", and the NAND circuit 127 is "L" when the high frequency pulse F is "L". Output "H". On the other hand, in the portion where the rectangular wave pulse D1 is "L", only the high frequency pulse F violently repeats "H" and "L", and the NAND circuit 127 outputs "H" in this portion.

The output of the NAND circuit 127 becomes the input of the inverter 124, and the inverter 124 operates as a NOT circuit. Therefore, as shown in FIG. 11 (E1), the output of the inverter 124 has several high frequency pulses F of 30 μs only during the transmission time (for example, 200 μs) of the rectangular wave pulse D1 output by the one-shot pulse circuit 20. (3-4) continuous pulse E1 is transmitted. This single-shot continuous high-frequency pulse is output from the output terminal Y1 of the partial circuit 120 and the output terminal Y2 of the partial circuit 130 described later.

Next, the partial circuit 130 will be described. FIG. 8 is a diagram showing a partial circuit 130 in the electronic circuit 100 according to the present embodiment. In FIG. 8, the partial circuit 130 includes four inverters 131, 132, 133, 134, one resistor 135, one capacitor 136, one NAND circuit 137, and one diode 138. It is composed of a set of one-shot pulse circuits 30 and a set of transmission circuits 50. Each inverter operates as a NOT circuit. As described above, the configuration and operation of the partial circuit 130 are the same as those of the partial circuit 120.

However, in the partial circuit 130, the pulse changeover switch 7e (see FIG. 4) is added in addition to the above configuration. In FIG. 8, the pulse changeover switch 7e is connected to both ends of the pulse changeover switch 7e so as to bypass the capacitor 136 (operation will be described later).

Further, the configuration and operation of the one-shot pulse circuit 30 and the transmission circuit 50 in the partial circuit 130 are the same as those of the one-shot pulse circuit 20 and the transmission circuit 40 in the partial circuit 120. In FIG. 8, the output terminal of the one-shot pulse circuit 30 is indicated by the reference numeral “38”, and the output terminal of the transmission circuit 50 is indicated by the reference numeral “56”. Further, the output end of the diode 138 is the output terminal Y2 of the partial circuit 130.

In such a configuration, the other output terminal X2 of the comparator 10 (see FIG. 5) is connected to the input end of the inverter 131. The output end of the inverter 131 is connected to one end of the resistor 135, the other end of the resistor 135 is connected to the input end of the inverter 132 and one end of the capacitor 136, and the other end of the capacitor 136 is grounded. Further, as described above, the pulse changeover switch 7e is connected to both ends thereof so as to bypass the capacitor 136. The output end of the inverter 132 is connected to the input end of the inverter 133, and the output end of the inverter 133 is one input end of the one-shot pulse circuit 30.

Here, when the pulse changeover switch 7e is “ON”, no electric charge is supplied to the capacitor 136, and the partial circuit 130 stops operating. On the other hand, when the pulse changeover switch 7e is "OFF", the operation is the same as that of the partial circuit 120.

That is, when the output of the comparator 10 is “H” shown in the rectangular wave B2 of FIG. 11, the output end of the inverter 131 becomes “L” and no current flows through the resistor 135. On the other hand, when the output of the comparator 10 is switched from "H" to "L", a current flows through the resistor 135. This current supplies an electric charge to the capacitor 136 and flows until the capacitor 136 is fully charged. When the capacitor 136 is fully charged, no current flows through the resistor 135, and the potential at the connection point between the capacitor 136 and the resistor 135 rises. In response to this, the inverter 132 starts operating.

When the input end of the inverter 132 becomes “H”, the output end of the inverter 132 becomes “L”. As a result, when the input end of the inverter 133 becomes “L”, the output end of the inverter 133 becomes “H”. However, the inverter 133 does not immediately output "L" even if "H" is output from the inverter 131. This is because the inverter 132 outputs "H" after being delayed by a time corresponding to the CR time constant determined by the capacitance of the capacitor 136 and the resistance value of the resistor 135.

The rectangular wave C2 in FIG. 11 shows how the inverter 133 starts the output of the rectangular wave pulse C2 from the time when the delay is 2 ms. This delay time "2 ms" is different (longer) from the delay time "100 μs" of the rectangular wave pulse C1 output by the inverter 123 in the partial circuit 120, and is half of the case where the frequency of the commercial power supply is "60 Hz". The time is shorter than the cycle "8 ms". Note that FIG. 11C2 shows an example of a rectangular wave pulse output from the output end of the inverter 132, that is, from the position indicated by the reference numeral “C2” in FIG.

The configuration of the one-shot pulse circuit 30 is the same as that of the one-shot pulse circuit 20. That is, the one-shot pulse circuit 30 is composed of two NAND circuits 31, 32, two inverters 33, 34, one capacitor 35, and two resistors 36, 37. The operation of the one-shot pulse circuit 30 is the same as that of the one-shot pulse circuit 20, and is omitted here. The output end of the inverter 33 is the output terminal 38 of the one-shot pulse circuit 30.

When the input drops from "H" to "L", the one-shot pulse circuit 30 starts operation using this as a trigger pulse. When the one-shot pulse circuit 30 starts operating, a time constant determined by the capacitance of the capacitor 35 and the resistance value of the resistor 37, that is, a rectangular wave pulse having a time length corresponding to the CR time constant is output from the output terminal 38. 11D2 shows, as an example, a square wave pulse having a time length of 200 μs generated at the position of the output terminal 38, that is, the position indicated by the reference numeral “D2” in FIG.

The output terminal 38 of the one-shot pulse circuit 30 is connected to one input end of the NAND circuit 137, and the output terminal (described later) of the transmission circuit 50 is connected to one input end. The output end of the NAND circuit 137 is connected to the input end of the inverter 134. The output end of the inverter 134 is connected to the input end of the diode 138, and the output end of the diode 138 is the output terminal Y2 of the partial circuit 130.

The configuration of the transmission circuit 50 is the same as that of the transmission circuit 40. That is, the transmission circuit 50 is composed of two inverters 51 and 52, two resistors 53 and 54, and one capacitor 55. Further, the operation of the transmission circuit 50 is the same as that of the transmission circuit 40, and is omitted here. The output end of the inverter 52 is connected to the other input end of the NAND circuit 137 as the output terminal 56 of the transmission circuit 50. In such a configuration, the transmission frequency of the transmission circuit 50 transmits a high frequency pulse in inverse proportion to the capacitance of the capacitor and the resistance value of the resistance, similarly to the transmission circuit 40 described above (see FIG. 12 (1)).

As described above, the output terminal 38 of the one-shot pulse circuit 30 is connected to one input terminal of the NAND circuit 137, and the output terminal 56 of the transmission circuit 50 is connected to the other input terminal. In this state, the rectangular wave pulse (200 μs) of FIG. 11D2 is input from the one-shot pulse circuit 30 to one input end of the NAND circuit 137, and the transmission circuit 50 to FIG. 12 (1) is input to the other input end. Continuous high frequency pulse F (30 μs) is input.

A high frequency pulse F that violently repeats "H" and "L" is input to the other input end of the NAND circuit 137. Therefore, in the portion where the square wave pulse D2 is "H", the NAND circuit 137 outputs "L" when the high frequency pulse F is "H", and the NAND circuit 137 is "L" when the high frequency pulse F is "L". Output "H". On the other hand, in the portion where the rectangular wave pulse D2 is "L", only the high frequency pulse F violently repeats "H" and "L", and the NAND circuit 137 outputs "H" in this portion.

The output of the NAND circuit 137 becomes the input of the inverter 134, and the inverter 134 operates as a NOT circuit. Therefore, as shown in FIG. 11 (E2), the output of the inverter 134 has several high frequency pulses F of 30 μs only during the transmission time (for example, 200 μs) of the rectangular wave pulse D2 output by the one-shot pulse circuit 30. (3-4) continuous pulse E2 is transmitted. This single-shot continuous high-frequency pulse is output from the output terminal Y2 of the partial circuit 130.

As described above, when the pulse changeover switch 7e is “OFF”, the partial circuit 130 operates in the same manner as the partial circuit 120. Therefore, the partial circuit 120 and the partial circuit 130 operate in a similar manner, and two types of high frequency pulses E1 + E2 having different delay times are transmitted from the output terminal Y1 and the output terminal Y2 (see FIG. 11). On the other hand, when the pulse changeover switch 7e is “ON”, the partial circuit 120 operates but the partial circuit 130 does not operate, so that only one type of high frequency pulse E1 is transmitted from only the output terminal Y1 (FIG. 11). reference).

The high-frequency pulse E1 + E2 transmitted when the pulse changeover switch 7e is “OFF” is generated at the same timing as the delay time of the square wave D1 and the square wave D2. That is, in the present embodiment, the delay times of the rectangular wave D1 and the rectangular wave D2 are 100 μs and 2 ms, respectively. The interval between these square waves D1 and D2 is shorter than the half-wave half-period "8 ms" of the sine and cosine waveform when the frequency of the commercial power supply is "60 Hz", and is transmitted between the half-waves (FIG. 2). reference). Therefore, the continuous pulses E1 + E2 transmitted in the same cycle as the square waves D1 and D2 are detected as an arc discharge by the arc discharge detecting device.

FIG. 9 is a diagram showing a partial circuit 140 in the electronic circuit 100 according to the present embodiment. The partial circuit 140 is a switch circuit for operating the electronic circuit 100. The partial circuit 140 is composed of two NAND circuits 141, 142, four resistors 143, 144, 145, 146, two capacitors 147, 148, and a pulse generation switch 7d.

In the partial circuit 140, the NAND circuit 141, 142, the resistor 146, and the capacitor 148 form a one-shot pulse circuit that transmits a switch pulse G (see FIG. 12 (2)). The output terminal Z1 of the partial circuit 120 is connected to one input end of the NAND circuit 141, and the output end of the pulse generation switch 7d is connected to the other input end of the NAND circuit 141.

The output end of the NAND circuit 141 is connected to one end of the capacitor 148 and serves as the output terminal Z2 of the one-shot pulse circuit. The other end of the capacitor 148 is connected to one end of the resistor 146 and both input ends of the NAND circuit 142. The NAND circuit 142 is used as a NOT circuit, that is, an inverter. The output terminal of the NAND circuit 142 is connected to the output terminal Z1 of the partial circuit 120, and is connected to one input end of the NAND circuit 141.

In such a configuration, when the pulse generation switch 7d is “OFF”, the input is “H” at the other input end of the NAND circuit 141. On the other hand, when the pulse generation switch 7d is set to "ON", "H" becomes "L". When the other input end of the NAND circuit 141 becomes "L", one switch pulse G is transmitted from the output terminal Z2 in inverse proportion to the capacitance of the capacitor 148 and the resistance value of the resistor 146. FIG. 12 (2) is a diagram showing an example of a switch pulse G of a rectangular wave having a predetermined transmission time (for example, 100 ms) transmitted by a partial circuit 140 as a switch circuit.

FIG. 10 is a diagram showing a partial circuit 150 in the electronic circuit 100 according to the present embodiment. The partial circuit 150 is a circuit that superimposes a high frequency pulse signal generated by the electronic circuit 100 on a sine waveform of an AC commercial power supply. The partial circuit 150 includes one NAND circuit 151, one inverter 152, two resistors 153, 154, one FET (Field Effect Transistor) 155, a resistor load 156, and a capacitor load 157 if necessary. It is composed of and.

The output terminals Y1 and Y2 of the partial circuits 120 and 130 are connected to one input end of the NAND circuit 151, and the output terminal Z2 of the partial circuit 140 as a switch circuit is connected to the other input end. In this state, high-frequency pulses E1 + E2 continuous from the partial circuits 120 and 130 at predetermined intervals of FIG. 11 are input to one input end of the NAND circuit 151, and the partial circuits 140 to 12 (FIG. 12) are input to the other input end. The switch pulse G of 2) is input.

High-frequency pulses E1 + E2 that repeat "H" and "L" at predetermined intervals are input to one input end of the NAND circuit 151. Therefore, in the portion where the switch pulse G is "H", the NAND circuit 151 outputs "L" when the high frequency pulse E1 + E2 is "H", and the NAND circuit 151 outputs "L" when the high frequency pulse E1 + E2 is "L". Is output. On the other hand, in the portion where the switch pulse G is "L", only the high frequency pulse E1 + E2 repeats "H" and "L", and the NAND circuit 151 outputs "H" in this portion.

The output of the NAND circuit 151 becomes the input of the inverter 152, and the inverter 152 operates as a NOT circuit. Therefore, as shown in FIG. 12 (3), the output of the inverter 152 is a high frequency pulse of 30 μs only during the transmission time (for example, 100 ms) of the switch pulse G of the rectangular wave output by the partial circuit 140 as the switch circuit. F is a high-frequency intermittent pulse K that transmits several (3 to 4) continuous pulses E1 and E2 at predetermined intervals (see FIG. 12 (3) K).

The output of the inverter 152 is connected to one end of the resistor 153, the other end of the resistor 153 is connected to one end of the resistor 154, and is connected to the gate of the FET 155. When the high frequency intermittent pulse K is input to the gate, the FET 155 superimposes this as a high frequency steep pulse on the sine and cosine waveform of the commercial power supply.

Although a normal transistor may be used instead of the FET, the FET has a short ON / OFF operating time and can superimpose a steep pulse having a higher frequency than the normal transistor on the sine and cosine waveform of the commercial power supply. Preferred in terms of points. Further, the resistance load 156 serves to superimpose a steeper pulse on the sinusoidal waveform of the commercial power supply. Further, by using a capacitor load 157 together as necessary, a steeper pulse can be superimposed on the sine and cosine waveform of the commercial power supply.

As described above, when the pulse changeover switch 7e is “OFF”, both the partial circuit 120 and the partial circuit 130 are operated, so that the high frequency pulse E1 from the partial circuit 120 and the E2 from the partial circuit 130 are combined. The generated high frequency intermittent pulse K can be superimposed on the sine waveform of the commercial power supply. By superimposing the high-frequency intermittent pulse K on the sine and cosine waveform of the commercial power supply in this way, the arc discharge detection device 3 operates to detect the pseudo arc discharge.

On the other hand, when the pulse changeover switch 7e is "ON", the partial circuit 120 operates but the partial circuit 130 does not operate. Therefore, only the portion of the high frequency pulse E1 from the partial circuit 120, not the high frequency intermittent pulse K, is superimposed on the sine and cosine waveform of the commercial power supply. As described above, when only the portion of the high frequency pulse E1 is superimposed on the sine and cosine waveform of the commercial power supply, the arc discharge detection device 3 does not operate as an opening / closing surge or noise other than the arc discharge.

As described above, according to the present invention, the arc discharge detection device operates accurately by superimposing a high frequency signal component imitating an arc discharge on a low frequency AC signal supplied to an electric circuit connected to a commercial power supply. It is possible to provide an inspection device for an arc discharge detection device that can confirm that the operation is performed.

1 ... Sine and cosine waveform, 2a, 2b, 2c ... High frequency signal, 3 ... Arc discharge detector,
4 ... Switchboard, 5 ... Indoor wiring, 6 ... Outlet,
7 ... Inspector for arc discharge detector, 7a ... Outlet plug,
7b ... Inspector body, 7c ... Power switch, 7d ... Pulse generation switch,
7e ... pulse changeover switch, 10 ... comparator, 18 ... operational amplifier,
20, 30 ... One-shot pulse circuit, 40, 50 ... Transmission circuit,
21,22,31,32,127,137,141,142,151 ... NAND circuit, 23,24,41,42,121-124,131-134,152 ... Inverter,
100 ... Electronic circuit, 110, 120, 130, 140, 150 ... Partial circuit,
111 ... Diode bridge, 155 ... FET, A ... Half-wave partial pressure waveform,
B ... 1st pulse signal (square wave), C1, C2 ... 1st pulse signal (square wave), D1, D2 ... 1st pulse signal (square wave), E1, E2 ... 1st pulse signal (high frequency), F ... high frequency pulse signal, G ... switch pulse, K ... high frequency intermittent pulse.

Claims (6)

It is an inspection device for confirming the operation of the arc discharge detection device by superimposing a high frequency signal component imitating an arc discharge on a low frequency AC signal supplied to an electric circuit connected to a commercial power supply.
A voltage dividing waveform output means for outputting a half-wave divided voltage waveform based on the sine and cosine waveform of the low-frequency AC signal, and a voltage dividing waveform output means.
A first pulse generating means that generates a first pulse signal having a predetermined voltage value while the divided voltage waveform is equal to or higher than a predetermined threshold voltage.
It has two series of high frequency transmitting means for generating the high frequency signal component imitating an arc discharge by using the first pulse signal generated by the first pulse generating means as a trigger pulse.
The two series of high frequency transmitting means include a second pulse generating means and a third pulse generating means, respectively.
The second pulse generation means generates two series of second pulse signals delayed by a predetermined non-detection time by using the first pulse signal generated by the first pulse generation means by each delay means as a trigger pulse. death,
The third pulse generating means uses the second pulse signal of the two series generated by each of the second pulse generating means as a trigger pulse, and receives the second pulse signal at the falling edge of the second pulse signal of the two series. By generating two series of third pulse signals with a time length shorter than the time length,
The second-series third pulse signals generated by the two-series high-frequency transmitting means are generated at intervals within the half-wave cycle of the sinusoidal waveform of the low-frequency AC signal while having different delay times by each delay means. As a result, the inspection device for an arc discharge detection device is characterized in that the third pulse signal of the two series is output as the high frequency signal component imitating the arc discharge. The two series of high frequency transmitting means include a continuous transmitting means for generating a continuous high frequency signal and a fourth pulse generating means for generating a fourth pulse signal.
The fourth pulse generating means continuously generates a high frequency signal transmitted by the continuous transmitting means as the fourth pulse signal in place of the third pulse signal during the time length during which the third pulse signal is generated. The inspection device for an arc discharge detection device according to claim 1. The inspector for an arc discharge detecting device according to claim 1 or 2, wherein the first pulse generating means includes a comparator. It has a pulse changeover switch that switches the operation of the two-series high-frequency transmitting means between the two-series operation and the one-series operation.
In the case of two-series operation, the arc discharge detection device recognizes that the arc discharge is caused by transmitting the third pulse signal of the two series.
The first to third aspects of claim 1 to 3, wherein in the case of one-series operation, the arc discharge detection device does not recognize the arc discharge by transmitting the third pulse signal of only one of the two series. The inspection device for an arc discharge detection device according to any one of them. The inspection device for an arc discharge detection device according to any one of claims 1 to 4, further comprising a pulse generation switch and transmitting the high frequency signal component imitating an arc discharge only at predetermined time intervals. .. The inspection device for an arc discharge detection device according to any one of claims 1 to 5, wherein the inspection device is used by connecting to an outlet provided in the electric circuit connected to a commercial power source.

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