JP2022098887A - Multi-display - Google Patents

Abstract

To provide a multi-display that can remove the spaces between units and can attain a seamless curved surface.SOLUTION: The multi-display includes a plurality of display panel units 2 including a display region E in which a plurality of pixels are arranged in a plane. The plurality of display panel units 2 is elastic and has a curved surface developing into a flat surface. By abutting adjacent ones of the display panel units 2 to each other while bending the display panel units 2, the display regions form one bending display screen.SELECTED DRAWING: Figure 1

Description

The present invention relates to a multi-display.

For example, an organic EL display device (organic EL display) using an organic electroluminescence (EL) element has high brightness and self-luminous emission, can be driven by DC low voltage, and has high responsiveness. Since it emits light from a solid organic film, it has excellent display performance and can be made thinner, lighter, and consume less power. Therefore, it is expected as a display device to replace the liquid crystal display device in the future (see, for example, Patent Document 1 below).

Specifically, the organic EL display device includes a display panel including a display area in which a plurality of pixels are arranged in a matrix in a plane. The display panel includes a plurality of scanning lines (gate lines), a plurality of signal lines (data lines), and a plurality of power supply lines (power supply lines) arranged horizontally and vertically in the plane of the display area. Each region is partitioned by the scanning lines and a plurality of signal lines, and a pixel circuit constituting the above-mentioned pixels is provided.

The display panel includes an organic EL element which is a light emitting element, a capacitor which is a holding capacity, and two thin film transistor (TFT) elements which are switching elements as a pixel circuit. In the display panel, the potential (image data) of the signal line is held in the holding capacitance connected to the signal line via the selection TFT element by the switching operation of the selection TFT element connected to the scanning line. Further, a drive current flows through the organic EL element connected to the power supply line via the drive TFT element according to the potential of the holding capacity. This makes it possible to make the organic EL element emit light (light).

Further, the display panel is provided with a peripheral area called a bezel (picture frame) so as to surround the periphery of the display area. In the peripheral area, a plurality of connecting portions corresponding to each of the plurality of scanning lines and the plurality of signal lines drawn out of the display area are provided side by side in the horizontal direction and the vertical direction of the peripheral area. ing. The plurality of scanning lines and the plurality of signal lines are electrically connected to an external drive circuit (driver) via a flexible printed wiring board (FPC) connected to the plurality of connecting portions.

By the way, as a multi-display, a plurality of display panels are arranged in a plane and displayed as one screen. Further, among the multi-displays, a spherical display in which rectangular display panels are arranged along a spherical surface has also been proposed (see, for example, Patent Document 2 below).

However, in such a spherical display, since the spherical surface cannot be developed as it is on a flat surface, a gap is always generated between adjacent display panels. Therefore, it is impossible to realize a seamless spherical display without gaps.

Japanese Unexamined Patent Publication No. 2013-105148 Japanese Unexamined Patent Publication No. 2011-170350

The present invention has been proposed in view of such conventional circumstances, and when a plurality of display panel units are arranged side by side to form one curved display screen, a seamless curved surface is formed by eliminating gaps between the units. It is intended to provide a multi-display that can be configured.

In order to achieve the above object, the present invention provides the following means.
[1] A plurality of display panel units including a display area in which a plurality of pixels are arranged side by side in a plane are provided.
The plurality of display panel units are expandable and contractible, have a shape in which a curved surface is developed into a plane, and by abutting adjacent objects while curving each other, one display in which each of the display areas is curved. A multi-display that is characterized by constituting the screen.
[2] The multi-display according to the above [1], wherein the plurality of display panel units have shapes that match each other.
[3] The multi-display according to the above [1] or [2], wherein the support member for supporting the plurality of display panel units in a curved state is provided.
[4] The display panel unit has a pixel circuit board provided with pixel circuits constituting the pixels.
The pixel circuit board is arranged on one surface side of the substrate, and has a plurality of first wirings electrically connected to each of the plurality of pixel circuits.
A plurality of contact plugs arranged in the thickness direction of the substrate and electrically connected to each of the plurality of first wirings, and a plurality of contact plugs.
A plurality of second wirings arranged on the other side of the substrate and electrically connected to each of the plurality of contact plugs.
It has a plurality of connections that are arranged on the other side of the substrate and are electrically connected to each of the plurality of second wirings.
The multi-display according to any one of the above [1] to [3], wherein the plurality of connecting portions are provided in an area overlapping the display area in a plan view.
[5] The pixel circuit board includes a plurality of scanning lines arranged in one direction intersecting in the plane of the display area, and a plurality of signal lines arranging in other directions intersecting in the plane of the display area. ,
The pixel circuit is provided for each region partitioned by the plurality of scanning lines and the plurality of signal lines.
The first wiring, the contact plug, and the second wiring are provided corresponding to the scanning line and the signal line, respectively.
The multi according to the above [4], wherein the plurality of connection portions are provided side by side for each line sequence corresponding to each of the plurality of scanning lines and the plurality of signal lines. display.
[6] The plurality of scanning lines are electrically connected to the first flexible printed wiring board via the plurality of connecting portions.
The multi-display according to the above [5], wherein the plurality of signal lines are electrically connected to a second flexible printed wiring board via the plurality of connection portions.
[7] The plurality of scanning lines are electrically connected to the scanning line drive circuit via the first flexible printed wiring board.
The multi-display according to the above [6], wherein the plurality of signal lines are electrically connected to a signal line drive circuit via the second flexible printed wiring board.
[8] The plurality of display panel units are characterized by having a structure in which adjacent units arranged side by side in one direction or the other direction are connected to each other via the pixel circuit board [5]. The multi-display according to any one of [7].
[9] In the plurality of display panel units, adjacent ones arranged side by side in the one direction or the other direction are connected to each other via the first flexible printed wiring board or the second flexible printed wiring board. The multi-display according to the above [6] or [7], which has the above-mentioned structure.
[10] The above-mentioned [8] or [9], wherein the plurality of connecting portions are provided side by side in the one direction or the other direction with the connected position interposed therebetween. Multi-display.

As described above, according to the present invention, when a plurality of display panel units are arranged side by side to form one curved display screen, it is possible to form a seamless curved surface by eliminating gaps between the units. It is possible to provide.

It is a perspective view which shows the structure of the multi-display which concerns on 1st Embodiment of this invention. Of the configurations of the multi-display shown in FIG. 1, (A) is a plan view in which a plurality of display panel units are developed, and (B) is a perspective view showing a support member. It is sectional drawing which shows the structure of the multi-display shown in FIG. It is a circuit diagram which shows the structure of a display panel unit. It is a circuit diagram which shows the structure of a pixel circuit. It is sectional drawing of the main part which shows the structure of a display panel unit. It is sectional drawing which shows the structure of a pixel circuit board. It is a perspective plan view which shows the structure of a pixel circuit board. It is sectional drawing for demonstrating the process of manufacturing a pixel circuit board. It is sectional drawing for demonstrating the process of manufacturing a pixel circuit board. It is sectional drawing for demonstrating the process of manufacturing a pixel circuit board. It is sectional drawing for demonstrating the process of manufacturing a pixel circuit board. It is sectional drawing for demonstrating the process of manufacturing a pixel circuit board. It is sectional drawing for demonstrating the process of manufacturing a pixel circuit board. It is sectional drawing for demonstrating the process of manufacturing a pixel circuit board. It is sectional drawing for demonstrating the process of manufacturing a pixel circuit board. It is a perspective view for demonstrating the process of manufacturing a multi-display. It is a top view which developed the plurality of display panel units constituting the multi-display which concerns on 2nd Embodiment of this invention. It is sectional drawing which shows the structure of the multi-display shown in FIG. It is a top view which shows the structure of the multi-display which concerns on 3rd Embodiment of this invention. It is sectional drawing which shows the structure of the multi-display shown in FIG. It is sectional drawing which shows the structure of a pixel circuit board and a connecting member. It is a perspective plan view which shows the structure of a pixel circuit board and connection wiring. It is sectional drawing which shows the structure of the multi-display which concerns on 4th Embodiment of this invention. It is a perspective view which shows the structure of the multi-display which concerns on 5th Embodiment of this invention. Of the configurations of the multi-displays shown in FIGS. 25, (A) is a plan view in which a plurality of display panel units are developed, and (B) is a perspective view showing a support member. It is sectional drawing which shows the structure of the multi-display shown in FIG. It is a top view which shows the structure of the multi-display which concerns on 6th Embodiment of this invention. It is sectional drawing which shows the structure of the multi-display shown in FIG. 28. FIG. 28 is a cross-sectional view showing another configuration of the multi-display shown in FIG. 28.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
In addition, the drawings used in the following explanation may schematically show the characteristic parts for convenience in order to make the features easy to understand, and it is said that the number of each component and the dimensional ratio are the same as the actual ones. Is not always. Further, the materials, dimensions, etc. exemplified in the following description are examples, and the present invention is not necessarily limited to them, and the present invention can be appropriately modified without changing the gist thereof. ..

(First Embodiment)
First, as a first embodiment of the present invention, for example, the multi-display 1A shown in FIGS. 1 to 8 will be described.

Note that FIG. 1 is a perspective view showing the configuration of the multi-display 1A. 2A and 2B are perspective views showing a plan view in which a plurality of display panel units 2 are developed, and FIG. 2B is a perspective view showing a support member 50 in the configuration of the multi-display 1A. FIG. 3 is a cross-sectional view showing the configuration of the multi-display 1A. FIG. 4 is a circuit diagram showing the configuration of the display panel unit 2. FIG. 5 is a circuit diagram showing the configuration of the pixel circuit 3. FIG. 6 is a cross-sectional view of a main part showing the configuration of the display panel unit 2. FIG. 7 is a cross-sectional view showing the configuration of the pixel circuit board 4. FIG. 8 is a perspective plan view showing the configuration of the pixel circuit board 4.

As shown in FIGS. 1, 2, and 3, the multi-display 1A of the present embodiment includes a plurality of display panel units 2 including a display area E in which a plurality of pixels P are arranged side by side in a plane, and a plurality of display panels 1A. It includes a support member 50 that supports the display panel unit 2 in a curved state.

The plurality of display panel units 2 are stretchable and have a shape in which a curved surface is developed into a plane. That is, these plurality of display panel units 2 have a shape divided so as to draw contour lines along boundary lines adjacent to each other when the curved surface is developed on a plane.

In the multi-display 1A, the plurality of display panel units 2 are attached to one surface side of the support member 50 in a state where adjacent objects of the plurality of display panel units 2 are butted against each other while being curved. As a result, one display screen S in which the display areas E of the plurality of display panel units 2 are curved is configured.

In the present embodiment, a hemispherical (dome) -shaped three-dimensional shape (3D) multi-display 1A is configured. Further, the inner surface of the multi-display 1A constitutes a spherical concave display screen S. The plurality of display panel units 2 have a boat-shaped conic shape (non-rectangular shape) in which a hemisphere is developed into a plane by, for example, an interruption projection (a boat-shaped polyconic projection in the present embodiment).

The plurality of display panel units 2 have shapes that match each other, are arranged side by side in one direction (vertical direction in FIG. 2A), and have a structure in which adjacent ones are connected to each other. is doing.

The support member 50 is formed in a hemispherical shape according to the three-dimensional shape of the multi-display 1A by using a transparent resin material such as an acrylic resin. The plurality of display panel units 2 are bonded to one surface (outer surface) side of the support member 50 via the first adhesive layer 51. As a result, the support member 50 supports the plurality of display panel units 2 in a hemispherically curved state. In addition, in FIG. 3, it is represented as a cross-sectional shape when the multi-display 1A has a planar shape.

A transparent adhesive material such as an epoxy resin adhesive is used for the first adhesive layer 51.

Further, the antireflection layer 52 is arranged on the other surface (inner surface) side of the support member 50. The antireflection layer 52 is located on the surface side of each display panel unit 2 to prevent reflection of external light, and is composed of a film-shaped circular polarizing plate.

The antireflection layer 52 is attached to the surface (inner surface) of the support member 50 opposite to each display panel unit 2 via the second adhesive layer 53. As the second adhesive layer 53, the same one as that of the first adhesive layer 51 is used.

The display panel unit 2 is an organic EL display device (organic EL display) that performs color display using an organic EL element.

Specifically, as shown in FIGS. 4, 5 and 6, the display panel unit 2 has a pixel circuit board 4 provided with a pixel circuit 3 constituting the pixel P.

The pixel circuit board 4 has a plurality of scanning lines 5 arranged in one direction (vertical direction in FIGS. 4 and 5) intersecting in the plane of the display area E, and another direction (vertical direction) intersecting in the plane of the display area E. A plurality of signal lines 6 and a plurality of power supply lines 7 arranged in a horizontal direction in FIGS. 4 and 5 are included. The pixel circuit board 4 has a structure in which a pixel circuit 3 is provided for each region partitioned by the plurality of scanning lines 5, the plurality of signal lines 6, and the plurality of power supply lines 7.

Further, the display panel unit 2 has a plurality of pixels (referred to as “sub-pixels”) P corresponding to at least the three primary colors of red (R), green (G), and blue (B) as one pixel unit (“pixel””. The pixel unit Pu has a structure in which the pixel units Pu are periodically arranged side by side in the plane.

In the present embodiment, the pixel P corresponding to red (R), the pixel P corresponding to green (G), and the pixel P corresponding to blue (B) are periodically arranged in other directions, whereby 1 One pixel unit Pu is configured. Further, in the present embodiment, the pixel units Pu having a rectangular shape in a plan view are arranged side by side in a matrix in the plane of the display area E having a non-rectangular shape in a plan view, so that the pixel units Pu have a non-rectangular shape in a plan view. The display panel unit 2 is configured.

The pixel unit Pu is not necessarily limited to the above-described configuration, and for example, in addition to the pixels P corresponding to the red (R), green (G), and blue (B), the white (W) is used. It is also possible to configure by four pixels P including the pixel P corresponding to. Further, the configuration is not limited to the configuration in which the plurality of pixels P corresponding to the color display described above are arranged, and the configuration in which the plurality of pixels P corresponding to the monochrome display are arranged is also possible.

As shown in FIGS. 5 and 7, the pixel circuit 3 includes an organic EL element 8 which is a light emitting element, a capacitor 9 which is a holding capacity C, and two TFT elements (selection TFT element 10 and a drive) which are switching elements. The TFT element 11) is provided.

The organic EL element 8 has a structure in which a pixel electrode 13, an organic functional layer 14, and a common electrode 15 are sequentially laminated on one surface (surface in FIG. 7) of a substrate 12 constituting a pixel circuit board 4. Have. That is, the organic EL element 8 has a structure in which the organic functional layer 14 is sandwiched between the pixel electrode 13 serving as the positive electrode (+) and the common electrode 15 serving as the negative electrode (−).

The substrate 12 is made of a flexible substrate such as a plastic substrate. In the present embodiment, as the substrate 12, for example, a film-shaped plastic substrate having a thickness of 10 μm or less is used. A resin material such as polyimide is used for the plastic substrate.

The substrate 12 is not necessarily limited to the configuration using the flexible substrate described above, and a configuration using a rigid substrate such as a glass substrate is also possible.

The pixel electrode 13 is provided corresponding to each of the plurality of pixels P. A metal electrode material such as aluminum (Al) is used for the pixel electrode 13. The pixel electrode 13 is formed on the interlayer insulating layer 16 that covers the surface on which the two TFT elements 10 and 11 described later are formed. For the interlayer insulating layer 16, for example, silicon oxide (SiO _x ) or the like is used. The pixel electrode 13 is electrically connected to the source electrode 11s side of the driving TFT element 11.

The organic functional layer 14 has, for example, a structure in which a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are sequentially laminated (referred to as “heterostructure”). ing. A bank layer 17 is provided on the interlayer insulating layer 16 except on the surface of the pixel electrode 13. For the bank layer 17, for example, a coating type organic insulating material or the like is used. The organic functional layer 14 is embedded and formed inside the bank layer 17.

The common electrode 15 constitutes one solid electrode common among the plurality of pixels P. For the common electrode 15, a transparent electrode material such as indium tin oxide (ITO) is used. The common electrode 15 is formed so as to cover the surface on which the organic functional layer 14 and the bank layer 17 are formed. Further, a protective layer 18 is formed on the common electrode 15 so as to cover the entire surface of the substrate 12. For the protective layer 18, for example, a coating type organic insulating material or the like is used.

The common electrode 15 is electrically connected to the GND wire 19. The GND wire 19 is provided on the surface of the gate insulating layer 20 constituting the two TFT elements 10 and 11 described later. The GND wire 19 is electrically connected to the common electrode 15 via a contact plug 21a penetrating the interlayer insulating layer 16, a contact electrode 21b formed on the interlayer insulating layer 16 and a contact plug 21c penetrating the bank layer 17. Has been done.

In the organic EL element 8, holes injected / transported from the pixel electrode 13 side via the hole injection layer and the hole transport layer, and holes injected / transported from the common electrode side via the electron injection layer and the electron transport layer. It is possible to emit light by recombining the electrons with the light emitting layer in the light emitting layer.

The organic EL element 8 has a top emission structure that extracts light from one surface side of the substrate 12 (hereinafter, one surface of the substrate 12 is referred to as a “front surface” and the other surface of the substrate 12 is referred to as a “back surface”. Distinguish as.).

Further, when color display is performed using the organic EL element 8, the organic EL element that emits white light is combined with a color filter corresponding to red (R), green (G), and blue (B). .. Alternatively, an organic EL element that emits each color light of red light, green light, and blue light may be combined.

In the holding capacitance C, one end side of the capacitor 9 is electrically connected to the source electrode 10s side of the selection TFT element 10 and the gate electrode 11g side of the driving TFT element 11, and the other end side of the capacitor 9 is the driving TFT element 11. It is provided in a state of being electrically connected to the source electrode 11s side.

The two TFT elements 10 and 11 are provided side by side on the substrate 12. Oxide semiconductors such as indium (In) -tin (Sn) -zinc (Zn) oxide (InSnZnO) are used for the two TFT elements 10 and 11. Further, the oxide semiconductor may be an oxide containing at least one metal element such as In, gallium (Ga), Zn, Sn, and Al, and may be a polycrystalline silicon, an amorphous silicon, an organic semiconductor, or the like. There may be. For the gate insulating layer 20, for example, silicon oxide (SiO _x ) or the like is used.

In the selection TFT element 10, the gate electrode 10g is electrically connected to the scanning line 5, the drain electrode 10d is electrically connected to the signal line 6, and the source electrode 10s holds the gate electrode 11g of the driving TFT element 11. It is provided in a state of being electrically connected to one end side of the capacitance C (capacitor 9).

In the driving TFT element 11, the gate electrode 10g is electrically connected to the source electrode 10s of the selection TFT element 10 and the holding capacity C (one end side of the capacitor 9), and the drain electrode 11d is electrically connected to the power supply line 7. The source electrode 11s is provided in a state of being electrically connected to the pixel electrode 13 and the other end side of the holding capacity C (capacitor 9).

In the display panel unit 2, the potential (image data) of the signal line 6 is held in the holding capacitance C via the selection TFT element 10 by the switching operation of the selection TFT element 10. Further, a drive current from the power supply line 7 flows through the organic EL element 8 via the drive TFT element 11 according to the potential of the holding capacity C. As a result, the organic EL element 8 can be made to emit light (lights up).

By the way, as shown in FIGS. 6, 7 and 8, the pixel circuit board 4 of the present embodiment has a plurality of first wirings 31 arranged on the surface side of the board 12 and arranged in the thickness direction of the board 12. It has a plurality of contact plugs 32, a plurality of second wirings 33 arranged on the back surface side of the substrate 12, and a plurality of connection portions 34 arranged on the back surface side of the substrate 12.

The plurality of first wirings 31 are electrically connected to each of the plurality of pixel circuits 3. The plurality of contact plugs 32 are electrically connected to each of the plurality of first wirings 31. The plurality of second wirings 33 are electrically connected to each of the plurality of contact plugs 32. That is, the first wiring 31 and the second wiring 33 are electrically connected via the contact plug 32.

The first wiring 31 and the second wiring 33 are linearly patterned using a conductive material such as copper, aluminum, molybdenum, or chromium. The contact plug 32 is formed by being embedded in a contact hole penetrating the substrate 12 by using a coating type copper such as silver (Ag) paste or a conductive material such as aluminum, molybdenum, or chromium.

The first wiring 31, the contact plug 32, and the second wiring 33 are provided corresponding to each of the plurality of scanning lines 5. That is, each scanning line 5 is routed from the front surface side to the back surface side of the substrate 12 by the first wiring 31, the contact plug 32, and the second wiring 33.

Further, the first wiring 31, the contact plug 32, and the second wiring 33 are provided corresponding to each of the plurality of signal lines 6. That is, each signal line 6 is routed from the front surface side to the back surface side of the substrate 12 by the first wiring 31, the contact plug 32, and the second wiring 33.

The plurality of connection portions 34 electrically connect each of the plurality of second wiring 33 and each of the plurality of terminals provided on one end side of the flexible printed wiring board (FPC) 35.

The connecting portion 34 uses a connecting material such as an anisotropic conductive film (ACF) or an anisotropic conductive paste (ACP) so as to traverse the ACF or ACP between the plurality of second wirings 33. By forming and providing conductivity at a position overlapping with each second wiring 33 while maintaining insulation between each second wiring 33, each of the second wiring 33 and each terminal of the FPC 35 can be connected to each other. The FPC 35 and the pixel circuit board 4 are bonded to each other while being electrically connected to each other.

The plurality of scanning lines 5 are connected to the FPC 35 (hereinafter, if necessary, "first flexible printed wiring") via the plurality of connection portions 34 (hereinafter, referred to as "first connection portion 34A" if necessary). It is electrically connected to the board (FPC) 35A ".

The first connecting portions 34A are provided side by side in one direction (vertical direction in FIG. 8) for each line sequence corresponding to each of the plurality of scanning lines 5. The first FPC35A is provided with a scanning line drive circuit (gate driver) 36 including, for example, a shift register and a level shifter. The plurality of scanning lines 5 are electrically connected to the gate driver 36 via the first FPC35A. The gate driver 36 sequentially supplies scanning signals to the plurality of scanning lines 5, and switches the drive of the selection TFT element 10 in response to the scanning signals.

The plurality of signal lines 6 are connected to the FPC 35 (hereinafter, if necessary, "second flexible printed wiring") via the plurality of connection portions 34 (hereinafter, referred to as "second connection portion 34B" if necessary). It is electrically connected to the board (FPC) 35B ".

The second connection portion 34B is provided side by side in another direction (horizontal direction in FIG. 8) for each line sequence corresponding to each of the plurality of signal lines 6. The second FPC35B is provided with a signal line drive circuit (data driver) 37 including, for example, a shift register, a level shifter, a video line, an analog switch, and the like. The plurality of signal lines 6 are electrically connected to the data driver 37 via the second FPC 35B. The data driver 37 supplies image data to a plurality of signal lines 6.

In the area overlapping the display area E of the pixel circuit board 4 in a plan view, a plurality of contact plugs 32 (hereinafter, “first contact” as necessary) are used for each line sequence corresponding to each of the plurality of scanning lines 5. (Distinguished as "plug 32A") are provided side by side in one direction (vertical direction in FIG. 8).

The plurality of first contact plugs 32A are electrically connected to one end side of each second wiring 33 (hereinafter, if necessary, distinguished as "first back surface wiring 33A"). On the other hand, the plurality of first connection portions 34A are electrically connected to the other end side of each first back surface wiring 33A.

Further, in the area overlapping the display area E of the pixel circuit board 4 in a plan view, a plurality of contact plugs 32 (hereinafter, "second" as necessary) are used for each line sequence corresponding to each of the plurality of signal lines 6. The contact plug 32B ”is provided side by side in another direction (horizontal direction in FIG. 8).

The plurality of second contact plugs 32B are electrically connected to one end side of each second wiring 33 (hereinafter, referred to as “second back surface wiring 33B” if necessary). On the other hand, the plurality of second connecting portions 34B are electrically connected to the other end side of each second back surface wiring 33B.

Further, the first wiring 31, the contact plug 32, and the second wiring 33 are provided corresponding to each of the plurality of power supply lines 7. That is, each power line 7 is routed from the front surface side to the back surface side of the substrate 12 by the first wiring 31, the contact plug 32, and the second wiring 33.

The plurality of first wirings 31 provided corresponding to each of the plurality of power supply lines 7 are the plurality of contact plugs 32 provided corresponding to each of the plurality of power supply lines 7 (hereinafter, if necessary, ". Electrically connected to one common second wiring 33 (hereinafter, if necessary, distinguished as "third back surface wiring 33C") via "third contact plug 32C"). Has been done.

A plurality of third contact plugs 32C are provided side by side in one direction (vertical direction in FIG. 8) in a region overlapping the display region E of the pixel circuit board 4 in a plan view. The plurality of third contact plugs 32C are electrically connected to the third back surface wiring 33C extending in one direction (vertical direction in FIG. 8).

Further, the first wiring 31, the contact plug 32 and the second wiring 33 are provided corresponding to the GND line 19. That is, the GND line 19 is routed from the front surface side to the back surface side of the substrate 12 by the first wiring 31, the contact plug 32, and the second wiring 33.

The first wiring 31 provided corresponding to the GND line 19 is distinguished as a plurality of contact plugs 32 provided corresponding to the GND line 19 (hereinafter, as necessary, as a "fourth contact plug 32D"). It is electrically connected to one common second wiring 33 (hereinafter, referred to as "fourth back surface wiring 33D" if necessary) via a common second wiring 33.

A plurality of fourth contact plugs 32D are provided side by side in one direction (vertical direction in FIG. 8) in a region overlapping the display region E of the pixel circuit board 4 in a plan view. The plurality of fourth contact plugs 32D are electrically connected to the fourth back surface wiring 33D extending in one direction (vertical direction in FIG. 8).

The pixel circuit board 4 is provided with an interlayer insulating layer 38 that covers the back surface of the board 12. The first back surface wiring 33A and the third back surface wiring 33C are electrically connected to the first contact plug 32A and the third contact plug 32C penetrating the substrate 12 and the interlayer insulating layer 38. On the other hand, the second back surface wiring 33B and the fourth back surface wiring 33D are electrically connected to the second contact plug 32B and the fourth contact plug 32D penetrating the substrate 12.

As a result, a part of the first back surface wiring 33A and a part of the second back surface wiring 33B are arranged so as to intersect each other. Further, the third back surface wiring 33C and a part of the second back surface wiring 33B are arranged so as to intersect each other.

As shown in FIG. 2A, the plurality of display panel units 2 are arranged in one direction (vertical direction in FIG. 2A) and adjacent to each other are connected to each other via the pixel circuit board 4. have.

The plurality of first connection portions 34A are provided side by side in one direction (vertical direction in FIG. 2A) with the connected position of each pixel circuit board 4 (display panel unit 2) interposed therebetween. That is, on each pixel circuit board 4, a plurality of first connection portions 34A are located on the center side in another direction (horizontal direction in FIG. 2A), and are located in one direction (FIG. 2A). In the vertical direction), they are arranged side by side.

As a result, on the back side of each display panel unit 2, a plurality of first FPC35A provided with a gate driver 36 for each line row of the plurality of scanning lines 5 are laterally arranged in the other direction (FIG. 2A). It is located on the center side of the direction) and is arranged side by side in one direction (vertical direction in FIG. 2A).

On the other hand, on each pixel circuit board 4, a plurality of second connection portions 34B are located on the center side in one direction (vertical direction in FIG. 2A) and in the other direction (FIG. 2A). In the horizontal direction), they are arranged side by side.

As a result, on the back side of each display panel unit 2, a plurality of second FPC35Bs provided with a data driver 37 for each line sequence of the plurality of signal lines 6 are vertically arranged in one direction (FIG. 2A). It is located on the center side of the direction) and is arranged side by side in another direction (horizontal direction in FIG. 2A).

In the display panel unit 2 having the above configuration, a plurality of connection portions 34 (first connection portion 34A and second connection portion 34B) are provided in an area that overlaps with the display area E described above in a plan view. ing. As a result, the first FPC35A and the second FPC35B are connected via the plurality of connecting portions 34 in the area overlapping the display area E of the display panel unit 2 in a plan view, and the first FPC35A and the second FPC35A and the second FPC35A are connected. The gate driver 36 and the data driver 37 provided on the FPC 35B can be arranged on the back surface side of the pixel circuit board 4.

Further, the region overlapping the display region E of the pixel circuit board 4 in a plan view substantially coincides with the outer shape of the substrate 12. As a result, it is not necessary to provide a peripheral area for arranging the gate driver 36 and the data driver 37 outside the display area E, and the peripheral area of the display panel unit 2 can be reduced.

Therefore, in the multi-display 1A of the present embodiment, when a plurality of display panel units 2 are arranged in a plane and displayed as one screen, it is possible to configure a seamless (inconspicuous) display screen S.

Next, the manufacturing method of the display panel unit 2 will be described with reference to FIGS. 9 to 16.
9 to 16 are cross-sectional views for explaining a process of manufacturing the pixel circuit board 4.

When manufacturing the display panel unit 2, it has a step of manufacturing a pixel circuit board 4.

In the step of manufacturing the pixel circuit board 4, first, as shown in FIG. 9, a substrate 12 formed in a film shape on the surface of the first glass substrate 101 is prepared. Then, on one surface (surface) of the substrate 12, the first wiring 31 including the scanning line 5, the signal line 6, the power supply line 7, and the GND line 19 described above, the contact plug 21a, the contact electrode 21b, and the contact are formed. The plug 21c, the selection TFT element 10 including the organic EL element 8 (pixel electrode 13, organic functional layer 14 and common electrode 15) constituting the pixel circuit 3, the capacitor 9, and the gate insulating layer 20, and the driving TFT element 11. , The interlayer insulating layer 16, the bank layer 17, and the protective layer 18 are formed.

In addition, conventionally known film forming process, photolithography process and the like can be used for these forming steps, and the forming method thereof is not particularly limited.

Next, as shown in FIG. 10, the second glass substrate 103 is attached to the uppermost layer of the substrate 12 via the adhesive layer 102.

Next, as shown in FIG. 11, the laser beam L is irradiated from the first glass substrate 101 side toward the substrate 12. At this time, the laser beam L passes through the first glass substrate 101 and is absorbed by the substrate 12, so that a part of the plastic film near the interface with the first glass substrate 101 evaporates due to heat. As a result, as shown in FIG. 12, the first glass substrate 101 can be peeled off from the other surface (back surface) of the substrate 12.

Next, as shown in FIG. 13, a contact hole 104 penetrating the substrate 12 and the gate insulating layer 20 is formed at a position where the second contact plug 32B and the fourth contact plug 32D of the substrate 12 are formed.

Next, as shown in FIG. 14, after the second contact plug 32B and the fourth contact plug 32D are embedded and formed in the contact hole 104, the second back surface wiring 33B and the fourth back surface wiring are formed on the back surface of the substrate 12. The 33D is patterned.

Next, as shown in FIG. 15, after the interlayer insulating layer 38 is formed on the back surface of the substrate 12, the substrate 12 and the interlayer insulation are formed at the positions where the first contact plug 32A and the third contact plug 32C of the substrate 12 are formed. A contact hole 105 is formed through the layer 38.

Next, as shown in FIG. 16, after the first contact plug 32A and the third contact plug 32C are embedded and formed in the contact hole 105, the first back surface wiring 33A and the third back surface wiring are formed on the back surface of the substrate 12. 33C is patterned.

Next, after forming ACPs to be the first connection portion 34A and the second connection portion 34B, the first FPC35A and the second FPC35B are formed via the first connection portion 34A and the second connection portion 34B. To connect. Finally, the second glass substrate 103 is removed together with the adhesive layer 102. This makes it possible to manufacture the display panel unit 2.

In the display panel unit 2, the adjacent units described above are connected to each other via a pixel circuit board 4. Therefore, using the substrate 12, it is possible to collectively manufacture a plurality of display panel units 2 connected to each other.

In the method of manufacturing the display panel unit 2, a plurality of connection portions 34 (first connection portion 34A and second connection portion 34B) are provided in a region overlapping the display region E described above in a plan view. It is possible to arrange the gate driver 36 and the data driver 37 provided in the FPC 35A of 1 and the data driver 37 of the second FPC 35B on the back surface side of the pixel circuit board 4. As a result, it is not necessary to provide a peripheral area for arranging the gate driver 36 and the data driver 37 outside the display area E, and it is possible to manufacture the display panel unit 2 in which the peripheral area is reduced.

Further, by using a film-shaped plastic substrate having a thickness of 10 μm or less as the substrate 12, the size (opening diameter) of the contact holes 104 and 105 described above can be miniaturized. This makes it possible to reduce the size of the pixel P and improve the definition of the display panel unit 2.

Next, the manufacturing method of the multi-display 1A will be described with reference to FIG.
Note that FIG. 17 is a perspective view for explaining a process of manufacturing the multi-display 1A.

When manufacturing the multi-display 1A, as shown in FIG. 17, adjacent objects of the plurality of display panel units 2 described above are butted against each other while being curved, and the plurality of display panel units 2 are supported by the support member 50. It is bonded to one surface (outer surface) side via the first adhesive layer 51. Further, the antireflection layer 52 is attached to the other surface (inner surface) side of the support member 50 via the second adhesive layer 53. This makes it possible to manufacture the multi-display 1A.

In the multi-display 1A of the present embodiment, when the plurality of display panel units 2 described above are arranged side by side to form one curved display screen S, it is possible to eliminate gaps between the units and form a seamless curved surface. .. Therefore, in this multi-display 1A, it is possible to suppress deterioration of image quality between display panel units 2 adjacent to each other.

In the multi-display 1A, the plurality of display panel units 2 described above are arranged side by side in one direction (vertical direction), and a plurality of first display panel units 2 are interposed below the connected positions of the display panel units 2. The connection portions 34A (gate driver 36) are provided side by side in one direction (vertical direction).

On the other hand, a plurality of display panel units 2 are arranged side by side in other directions (horizontal directions), and a plurality of second connection portions 34B (data) are sandwiched between the connected positions of the display panel units 2. It is also possible to have a configuration in which the driver 37) is provided side by side in another direction (horizontal direction).

In the multi-display 1A, the plurality of display panel units 2 described above are connected via the pixel circuit board 4, but at least a part or all of the display panel units 2 may not be connected. good. In this case, the plurality of display panel units 2 can connect the support member 50 as a connecting member.

In the multi-display 1A, the concave display screen S is formed by the inner surface of the spherical concave shape described above, but it is also possible to form the convex display screen S by the outer surface of the spherical convex shape. In this case, the plurality of display panel units 2 may be configured to be bonded to the inner surface side of the support member 50 via the first adhesive layer 51.

When the concave display screen S is configured, it is preferable to connect the FPC 35 to each display panel unit 2 after the plurality of display panel units 2 are attached to the support member 50. On the other hand, when the convex display screen S is configured, it is preferable to connect the FPC 35 to each display panel unit 2 before attaching the plurality of display panel units 2 to the support member 50.

(Second embodiment)
Next, as a second embodiment of the present invention, for example, the multi-display 1B shown in FIGS. 18 and 19 will be described.

Note that FIG. 18 is a plan view of a plurality of display panel units 2 constituting the multi-display 1B. FIG. 19 is a cross-sectional view showing the configuration of the multi-display 1. Further, in the following description, the same parts as those of the multi-display 1A will be omitted and the same reference numerals will be given in the drawings.

As shown in FIGS. 18 and 19, the multi-display 1B of the present embodiment is connected via the FPC 35 instead of the configuration in which the plurality of display panel units 2 described above are connected via the pixel circuit board 4. It has a structure.

Specifically, the plurality of display panel units 2 have a structure in which adjacent units arranged in one direction (vertical direction in FIG. 18) are connected to each other via a first FPC35A. That is, these plurality of display panel units 2 are connected with the first FPC35A as a connecting member.

As a result, on the back side of each display panel unit 2, the first FPC35A provided with the gate driver 36 for each line row of the plurality of scanning lines 5 is on the center side in the other direction (horizontal direction in FIG. 18). It is located in one direction (vertical direction in FIG. 18) and extends in one direction.

In the multi-display 1B of the present embodiment, when the plurality of display panel units 2 described above are arranged side by side to form one curved display screen S, it is possible to eliminate gaps between the units and form a seamless curved surface. .. Therefore, in this multi-display 1B, it is possible to suppress deterioration of image quality between display panel units 2 adjacent to each other.

In the multi-display 1B, the plurality of display panel units 2 described above are arranged side by side in one direction (vertical direction), and a plurality of first display panel units 2 are interposed below the connected positions of the display panel units 2. The connection portions 34A (gate driver 36) are provided side by side in one direction (vertical direction).

On the other hand, a plurality of display panel units 2 are arranged side by side in other directions (horizontal directions), and a plurality of second connection portions 34B (data) are sandwiched between the connected positions of the display panel units 2. It is also possible to have a configuration in which the driver 37) is provided side by side in another direction (horizontal direction).

In this case, the plurality of display panel units 2 can be configured such that the second FPC35B is used as a connecting member and the adjacent ones arranged side by side in another direction (horizontal direction) are connected via the second FPC35B. Is.

In the multi-display 1B, similarly to the multi-display 1A, not only the case where the concave display screen S is formed by the inner surface of the spherical concave shape, but also the convex display screen S is formed by the outer surface of the spherical concave shape. It is possible to do.

(Third embodiment)
Next, as a third embodiment of the present invention, for example, the multi-display 1C shown in FIGS. 20 to 23 will be described.

Note that FIG. 20 is a plan view showing the configuration of the multi-display 1C. FIG. 21 is a cross-sectional view showing the configuration of the multi-display 1C. FIG. 22 is a cross-sectional view showing the configuration of the pixel circuit board 4 and the connecting member 43. FIG. 23 is a perspective plan view showing the configurations of the pixel circuit board 4 and the connection wiring 44. Further, in the following description, the same parts as those of the multi-display 1A will be omitted and the same reference numerals will be given in the drawings.

As shown in FIGS. 20 and 21, the multi-display 1C of the present embodiment includes a plurality of rectangular display panel units 41 instead of the above-mentioned non-rectangular display panel unit 2 and hemispherical support member 50. It is provided with a plate-shaped support member 42 that supports the display panel units 41 in a state of being arranged in a plane, and a plate-shaped connecting member 43 that connects adjacent ones of a plurality of display panel units 41.

In the multi-display 1C, in a state where adjacent objects of the plurality of display panel units 41 are butted against each other, the front surface side of the plurality of display panel units 41 is placed on one surface side of the support member 42 via the first adhesive layer 51. By sticking them together, the display areas E of the plurality of display panel units 41 constitute one display screen S.

In the present embodiment, the rectangular pixel units Pu in the plan view are arranged side by side in a matrix in the plane of the rectangular display area E in the plan view, so that the rectangular display panel unit 41 in the plan view is arranged. Is configured. The display panel unit 41 has basically the same configuration as the display panel unit 2 except for the above display panel unit 2.

In the present embodiment, the nine display panel units 41 are arranged side by side in the vertical direction and three in the horizontal direction to form a rectangular display screen G in a plan view. However, the display panel unit The number of 41s to be arranged can be changed as appropriate.

The support member 42 is made of a transparent flexible substrate such as a plastic substrate, and has a shape corresponding to the display screen S. A resin material such as polyimide is used for the plastic substrate. The support member 42 is not necessarily limited to the configuration using the flexible substrate described above, and when a rigid substrate is used for the substrate 12, for example, a configuration using a transparent rigid substrate such as a glass substrate is used. It is also possible to do.

Further, an antireflection layer 52 is arranged on the other surface side of the support member 42. The antireflection layer 52 is attached to the surface of the support member 42 opposite to each display panel unit 41 via a second adhesive layer 53.

A plurality of display panels arranged in one direction (vertical direction in FIG. 20) located on one end side (right end side in FIG. 20) in the other direction (horizontal direction in FIG. 20) among the plurality of display panel units 41. The unit 41 (hereinafter, referred to as “display panel unit 41A” if necessary) has a plurality of first FPC35A provided with a gate driver 36.

On the back side of each display panel unit 41A, a plurality of first FPC35A provided with a gate driver 36 for each line row of the plurality of scanning lines 5 are arranged side by side in one direction (vertical direction in FIG. 20). ing.

On the other hand, among the plurality of display panel units 41, display panels located on one end side (upper end side in FIG. 20) in one direction (vertical direction in FIG. 20) and arranged in the other direction (horizontal direction in FIG. 20). The unit 41 (hereinafter, referred to as “display panel unit 41B” as necessary) has a plurality of second FPC35Bs provided with a data driver 37.

On the back side of each display panel unit 41B, a plurality of second FPC 35Bs provided with a data driver 37 for each line sequence of the plurality of signal lines 6 are arranged side by side in other directions (horizontal direction in FIG. 20). ing.

As shown in FIGS. 21, 22 and 23, the connecting members 43 are provided in a grid pattern in a plan view along the boundary lines of the display panel units 2 adjacent to each other. Further, on the surface of the connecting member 43 facing the display panel unit 41, a plurality of connection wirings 44 for electrically connecting between the display panel units 41 adjacent to each other are provided. The connection wiring 44 is linearly patterned using the same conductive material as the first wiring 31 and the second wiring 33.

Specifically, between the display panel units 41 adjacent to each other, a plurality of connection wirings 44 that electrically connect between the plurality of scanning lines 5 (first back surface wiring 33A) among the plurality of connection wirings 44. (Hereinafter, if necessary, it is distinguished as "first connection wiring 44A".) And a plurality of connection wirings 44 (hereinafter, "1st connection wiring 44A") that electrically connect between the plurality of signal lines 6 (second back surface wiring 33B). , If necessary, distinguish it as "second connection wiring 44B") and a plurality of connection wiring 44 (hereinafter, necessary) for electrically connecting between the plurality of power supply lines 7 (third back surface wiring 33C). (Different as "third connection wiring 44C") and a plurality of connection wiring 44s (hereinafter, "hereinafter," if necessary) that electrically connect between the GND line 19 (fourth back surface wiring 33D). It is distinguished as a fourth connection wiring 44D ").

As a result, the gate driver 36 provided in the display panel unit 41A at the right end can be driven while connecting the scanning lines 5 between the plurality of display panel units 41 adjacent to each other in the lateral direction.

Further, between a plurality of display panel units 41 adjacent to each other in the vertical direction, it is possible to drive the data driver 37 provided in the display panel unit 41B at the upper end while connecting the signal lines 6.

In the multi-display 1C of the embodiment having the above configuration, it is not necessary to arrange the gate driver 36 and the data driver 37 in all the display panel units 41 described above. Therefore, in this multi-display 1C, it is possible to reduce the number of gate drivers 36 and data drivers 37 that drive each display panel unit 41 when a plurality of display panel units 41 are arranged side by side to form one display screen S. Is.

Further, in the multi-display 1C of the present embodiment, when the plurality of display panel units 41 described above are arranged side by side to form one display screen S, it is possible to eliminate a gap between the units and form a seamless flat surface. .. Therefore, in this multi-display 1C, it is possible to suppress deterioration of image quality between display panel units 41 adjacent to each other.

Although the multi-display 1C has a configuration using the plate-shaped connecting member 43 described above, the connecting member 43 may have a configuration using an FPC. That is, the connecting member 43 can be electrically connected by using an FPC instead of the connection wiring 44 that electrically connects between the display panel units 41 adjacent to each other as described above.

Further, regarding the connecting member 43, the first connecting wiring 44A and the third connecting wiring 44C are provided, and one connecting member 43 extending in the vertical direction is provided, and the second connecting wiring 44B and the fourth connecting wiring 44B are connected. It is also possible to provide the wiring 44D and dispose of the wiring 44D separately from the other connecting member 43 extending in the lateral direction.

(Fourth Embodiment)
Next, as a fourth embodiment of the present invention, for example, the multi-display 1D shown in FIG. 24 will be described.

Note that FIG. 24 is a cross-sectional view showing the configuration of the multi-display 1D. Further, in the following description, the same parts as those of the multi-displays 1A and 1C will be omitted and the same reference numerals will be given in the drawings.

As shown in FIG. 24, the multi-display 1D of the present embodiment has a configuration in which the connecting member 43 is used as a support member. That is, the connecting member 43 has a shape corresponding to the display screen S, and is electrically connected between the above-mentioned display panel units 41 adjacent to each other via a plurality of connection wirings 44, and has a plurality of displays. It is bonded to the back surface side of the panel unit 41 via the adhesive layer 45.

In this case, the adhesive layer 45 is not limited to the same transparent adhesive material as the first adhesive layer 51, but an opaque adhesive material can be used. Further, it is possible to omit the support member 42 that supports the surface side of the plurality of display panel units 41.

In the present embodiment, the support member 42 is omitted, so that the first adhesive layer 51, the antireflection layer 52, and the second adhesive layer 53 are omitted. The antireflection layer 52 may be bonded to the surface side of the panel unit 41 via the second adhesive layer 53.

In the multi-display 1D of the embodiment having the above configuration, it is not necessary to arrange the gate driver 36 and the data driver 37 in all the display panel units 41 described above. Therefore, in this multi-display 1D, it is possible to reduce the number of gate drivers 36 and data drivers 37 that drive each display panel unit 41 when a plurality of display panel units 41 are arranged side by side to form one display screen S. Is.

Further, in the multi-display 1D of the present embodiment, when the plurality of display panel units 41 described above are arranged side by side to form one display screen S, it is possible to eliminate a gap between the units and form a seamless flat surface. .. Therefore, in this multi-display 1C, it is possible to suppress deterioration of image quality between display panel units 41 adjacent to each other.

The multi-display 1D has a configuration in which the above-mentioned plate-shaped connecting member 43 is used as a support member (support substrate), but when the connecting member 43 is used as a support member, the shape of the connecting member 43 is changed. It can be changed as appropriate. Further, the connecting member 43 may be configured such that a connecting wiring 44 is provided on a support member that supports the back surface side of a plurality of display panel units 41 such as a frame and a housing.

(Fifth Embodiment)
Next, as a fifth embodiment of the present invention, for example, the multi-display 1E shown in FIGS. 25 to 27 will be described.

Note that FIG. 25 is a perspective view showing the configuration of the multi-display 1E. 26 is a plan view in which a plurality of display panel units 2 are developed, and FIG. 26B is a perspective view showing a support member 50 in the configuration of the multi-display 1E. FIG. 27 is a cross-sectional view showing the configuration of the multi-display 1E. In addition, in FIG. 27, it is represented as a cross-sectional shape when the multi-display 1E has a planar shape. Further, in the following description, the same parts as those of the multi-display 1A will be omitted and the same reference numerals will be given in the drawings.

As shown in FIGS. 25, 26, and 27, the multi-display 1E of the present embodiment has a plurality of display panel units 2 in a state where adjacent objects of the plurality of display panel units 2 are butted against each other while being curved. Is attached to the other surface (inner surface) side of the support member 50 via the adhesive layer 45.

Further, the support member 50 is used as the connecting member 43 to electrically connect the display panel units 2 adjacent to each other via a plurality of connection wirings 44, and also has an adhesive layer on the back surface side of the plurality of display panel units 2. They are pasted together via 45.

On the back side of each display panel unit 2, a plurality of first FPC35A provided with a gate driver 36 for each line row of the plurality of scanning lines 5 are provided in other directions (horizontal direction in FIG. 26A). It is located on the center side and is arranged side by side in one direction (vertical direction in FIG. 26A).

On the other hand, among the plurality of display panel units 41, the display panel unit 2 located at the center in one direction (vertical direction in FIG. 26A) (hereinafter, referred to as “display panel unit 2AB” is distinguished as necessary. ) Have a plurality of second FPC35Bs provided with a data driver 37.

On the back side of the display panel unit 2A, a plurality of second FPC35Bs provided with a data driver 37 for each line sequence of the plurality of signal lines 6 are centered in one direction (vertical direction in FIG. 26A). It is located on the side and is arranged side by side in another direction (horizontal direction in FIG. 26A).

Between the display panel units 2 adjacent to each other, among the plurality of connection wirings 44, the plurality of signal lines 6 (second back surface wiring 33B) are electrically connected via the second connection portion 34B. A plurality of connection wirings 44 (hereinafter, "second connection wirings 44B" are provided as necessary.

As a result, it is possible to drive the data driver 37 provided in the central display panel unit 2A while connecting the signal lines 6 between the plurality of display panel units 2 adjacent to each other in the vertical direction.

The support member 50 is provided with a first opening 50a for pulling out the first FPC35A to the outer surface side and a second opening 50b for pulling out the second FPC35B to the outer surface side. As a result, the gate driver 36 and the data driver 37 are arranged on the outer surface side of the support member 50.

In the multi-display 1E of the embodiment having the above configuration, it is not necessary to arrange the data driver 37 in all the display panel units 2 described above. Therefore, in this multi-display 1E, it is possible to reduce the number of data drivers 37 that drive each display panel unit 2 when a plurality of display panel units 2 are arranged side by side to form one curved display screen S. ..

Further, in the multi-display 1E of the present embodiment, when the plurality of display panel units 2 described above are arranged side by side to form one curved display screen S, it is possible to eliminate a gap between the units and form a seamless curved surface. Is. Therefore, in this multi-display 1E, it is possible to suppress deterioration of image quality between display panel units 2 adjacent to each other.

In the multi-display 1E, the first adhesive layer 51, the antireflection layer 52, and the second adhesive layer 53 are omitted by supporting the back surface side of the plurality of display panel units 2 described above with the support member 50. However, the antireflection layer 52 may be bonded to the surface side of the plurality of display panel units 2 via the second adhesive layer 53.

(Sixth Embodiment)
Next, as a sixth embodiment of the present invention, for example, the multi-display 1F shown in FIGS. 28 to 30 will be described.

Note that FIG. 28 is a plan view showing the configuration of the multi-display 1F. FIG. 29 is a cross-sectional view showing the configuration of the multi-display 1F. FIG. 30 is a cross-sectional view showing another configuration of the multi-display 1F. In addition, in FIG. 29 and FIG. 30, it is represented as a cross-sectional shape when the multi-display 1F has a planar shape. Further, in the following description, the same parts as those of the multi-display 1A will be omitted and the same reference numerals will be given in the drawings.

The multi-display 1F of the present embodiment has a configuration in which a shielding layer 54A as shown in FIGS. 28 and 29 is provided in addition to the configuration of the multi-display 1A.

The shielding layer 54A is made of a resin having a light-shielding property such as a black resist material used as a black matrix. The shielding layer 54A is provided between the display panel unit 2 and the support member 50. The shielding layer 54A is preferably provided on the side closer to the display panel unit 2. Therefore, in the present embodiment, the shielding layer 54A is provided on the surface of the support member 50 facing the display panel unit 2.

The shielding layer 54A is provided in a grid pattern in a plan view along the boundary lines adjacent to each other of the display panel unit 2 and the boundary lines adjacent to each other of the pixel unit Pu.

In the multi-display 1F of the present embodiment, by providing the shielding layer 54A between the display panel units 2 adjacent to each other as described above, the seam between the panels can be hidden by the shielding layer 54A. This makes it possible to suppress deterioration of image quality between the display panel units 2 adjacent to each other.

Further, in the multi-display 1F of the present embodiment, by providing the shielding layer 54A between the plurality of pixel units Pu adjacent to each other as described above, the boundary lines adjacent to each other of the display panel unit 2 and the pixel units Pu adjacent to each other are provided. It is possible to eliminate the distinction from the matching boundary line. Thereby, as the multi-display 1A, when a plurality of display panel units 2 are arranged in a plane and displayed as one screen, it is possible to configure a seamless (inconspicuous) display screen S.

The multi-display 1F of the present embodiment may be configured to include the shielding layer 54B as shown in FIG. 30 instead of the shielding layer 54A.

The shielding layer 54B is made of a light-reflecting metal such as silver or aluminum. The shielding layer 54B is provided between the support member 50 and the antireflection layer 52. The shielding layer 54B is preferably provided on the side close to the antireflection layer 52. Therefore, in the present embodiment, the shielding layer 54B is provided on the surface of the antireflection layer 52 facing the support member 50.

The shielding layer 54B is provided in a grid pattern in a plan view along the boundary lines adjacent to each other of the display panel unit 2 and the boundary lines adjacent to each other of the pixel unit Pu.

In the multi-display 1F of the present embodiment, by providing the shielding layer 54B between the display panel units 2 adjacent to each other as described above, the seam between the panels can be hidden by the shielding layer 54B. In particular, since the antireflection layer 52 shields the light reflected by the shielding layer 54B by the circular polarizing plate, the portion provided with the shielding layer 54B does not reflect and looks black. This makes it possible to suppress deterioration of image quality between the display panel units 2 adjacent to each other.

Further, in the multi-display 1F of the present embodiment, by providing the shielding layer 54B between the plurality of pixel units Pu adjacent to each other as described above, the boundary lines adjacent to each other of the display panel unit 2 and the pixel units Pu adjacent to each other are provided. It is possible to eliminate the distinction from the matching boundary line. Thereby, as the multi-display 1B, when a plurality of display panel units 2 are arranged in a plane and displayed as one screen, it is possible to configure a seamless (inconspicuous) display screen S.

The multi-display 1F of the present embodiment is not limited to the configuration of the multi-display 1A, and the shielding layers 54A and 54B can be added to the configurations of the multi-displays 1B to 1F.

The present invention is not necessarily limited to that of the above embodiment, and various modifications can be made without departing from the spirit of the present invention.
For example, in the above embodiment, the above-mentioned hemispherical (dome) -shaped three-dimensional (3D) multi-displays 1A, 1B, 1D to 1F and the planar multi-display 1C are exemplified, but the multi-display to which the present invention is applied is exemplified. The shape of the display is not necessarily limited to such a shape, and the shape can be appropriately changed, for example, a spherical shape, a tubular shape, or a round (arch) shape.

In the above embodiment, the boat-shaped conical (non-rectangular) display panel unit 2 in which the hemisphere is expanded into a plane is illustrated, but the shape of the display panel unit 2 can also be changed as appropriate. be.

In the above embodiment, the case where the present invention is applied to the above-mentioned organic EL display is illustrated, but the light emitting element is not necessarily limited to the one using an organic EL element, for example, a micro LED or the like. An LED element or a light emitting element such as a quantum dot may be used. The present invention can also be applied to liquid crystal displays and the like.

The present invention can be widely applied to various applications such as a virtual space (VR) display, a planetarium, a globe, a driving simulator, an in-vehicle display, and an omnidirectional display as the above-mentioned three-dimensional shape (3D) multi-display. It is possible.

1A-1F ... Multi-display 2 ... Display panel unit 3 ... Pixel circuit 4 ... Pixel circuit board 5 ... Scanning line 6 ... Signal line 7 ... Power supply line 8 ... Organic EL element 9 ... Condenser 10 ... Selective TFT element 11 ... For driving TFT element 12 ... Substrate 13 ... Pixel electrode 14 ... Organic functional layer 15 ... Common electrode 16 ... Interlayer insulation layer 17 ... Bank layer 18 ... Protective layer 19 ... GND wire 20 ... Gate insulation layer 31 ... First wiring 32 ... Contact plug 32A ... 1st contact plug 32B ... 2nd contact plug 32C ... 3rd contact plug 32D ... 4th contact plug 33 ... 2nd wiring 33A ... 1st backside wiring 33B ... 2nd backside wiring 33C ... Third back side wiring 33D ... Fourth back side wiring 34 ... Connection part 34A ... First connection part 34B ... Second connection part 35 ... Flexible printed wiring board (FPC) 35A ... First FPC 35B ... Second FPC 36 ... Scanning line drive circuit (gate driver) 37 ... Signal line drive circuit (data driver) 38 ... Interlayer insulation layer 41 ... Display panel unit 42 ... Support member 43 ... Connecting member 44 ... Connection wiring 44A ... First connection wiring 44B ... Second connection wiring 44C ... Third connection wiring 44D ... Fourth connection wiring 50 ... Support member 50a ... First opening 50b ... Second opening 45 ... Adhesive layer 51 ... First adhesive layer 52 ... Antireflection layer (circular polarizing plate) 53 ... Second adhesive layer 54A ... Shielding layer (resin) 54B ... Shielding layer (metal) C ... Holding capacity P ... Pixel Pu ... Pixel unit E ... Display area S ... Display screen

Claims (10)

It has a plurality of display panel units including a display area in which a plurality of pixels are arranged side by side in a plane.
The plurality of display panel units are expandable and contractible, have a shape in which a curved surface is developed into a plane, and by abutting adjacent objects while curving each other, one display in which each of the display areas is curved. A multi-display that is characterized by constituting the screen. The multi-display according to claim 1, wherein the plurality of display panel units have shapes that match each other. The multi-display according to claim 1 or 2, further comprising a support member that supports the plurality of display panel units in a curved state. The display panel unit has a pixel circuit board provided with a pixel circuit constituting the pixel.
The pixel circuit board is arranged on one surface side of the substrate, and has a plurality of first wirings electrically connected to each of the plurality of pixel circuits.
A plurality of contact plugs arranged in the thickness direction of the substrate and electrically connected to each of the plurality of first wirings, and a plurality of contact plugs.
A plurality of second wirings arranged on the other side of the substrate and electrically connected to each of the plurality of contact plugs.
It has a plurality of connections that are arranged on the other side of the substrate and are electrically connected to each of the plurality of second wirings.
The multi-display according to any one of claims 1 to 3, wherein the plurality of connecting portions are provided in an area that overlaps with the display area in a plan view. The pixel circuit board includes a plurality of scanning lines arranged in one direction intersecting in the plane of the display area and a plurality of signal lines arranging in other directions intersecting in the plane of the display area.
The pixel circuit is provided for each region partitioned by the plurality of scanning lines and the plurality of signal lines.
The first wiring, the contact plug, and the second wiring are provided corresponding to the scanning line and the signal line, respectively.
The multi-display according to claim 4, wherein the plurality of connecting portions are provided side by side for each line sequence corresponding to each of the plurality of scanning lines and the plurality of signal lines. .. The plurality of scanning lines are electrically connected to the first flexible printed wiring board via the plurality of connecting portions.
The multi-display according to claim 5, wherein the plurality of signal lines are electrically connected to the second flexible printed wiring board via the plurality of connection portions. The plurality of scanning lines are electrically connected to the scanning line drive circuit via the first flexible printed wiring board.
The multi-display according to claim 6, wherein the plurality of signal lines are electrically connected to a signal line drive circuit via the second flexible printed wiring board. 5. The multi-display described in item 1. The plurality of display panel units have a structure in which adjacent units arranged side by side in the one direction or the other direction are connected to each other via the first flexible printed wiring board or the second flexible printed wiring board. The multi-display according to claim 6 or 7, characterized in that it has. The multi-display according to claim 8 or 9, wherein the plurality of connecting portions are provided side by side in the one direction or the other direction with the connected position interposed therebetween.

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